JP2013093565A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2013093565A JP2013093565A JP2012218995A JP2012218995A JP2013093565A JP 2013093565 A JP2013093565 A JP 2013093565A JP 2012218995 A JP2012218995 A JP 2012218995A JP 2012218995 A JP2012218995 A JP 2012218995A JP 2013093565 A JP2013093565 A JP 2013093565A
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- transistor
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- potential
- gate electrode
- conductive film
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Abstract
【解決手段】複数の画素を選択するための信号を走査線に供給する走査線駆動回路が、上記信号を生成するシフトレジスタを有しており、上記シフトレジスタにおいて、複数のトランジスタのゲート電極として機能する一の導電膜を複数に分割し、上記分割された導電膜どうしを、分割された導電膜と異なる層に形成された導電膜により、電気的に接続する構成を有する。上記複数のトランジスタには、シフトレジスタの出力側のトランジスタが含まれるものとする。
【選択図】図1
Description
図1に、本発明の一態様に係る半導体装置の、回路構成の一例を示す。図1に示す半導体装置100は、少なくともトランジスタ101と、トランジスタ102とを含む複数のトランジスタを有する。
本実施の形態では、図4に示したパルス発生回路300を複数段接続させることで構成されるシフトレジスタについて説明する。
本発明の一態様に係る半導体装置が有する、パルス発生回路の構成例について説明する。
OLEDを用いた発光装置を例に挙げて、本発明の一態様に係る半導体表示装置の、画素と駆動回路の断面構造について、図11を用いて説明する。図11に、画素840と駆動回路841の断面図を一例として示す。
本実施の形態では、半導体表示装置の一形態に相当する、パネルの一例について説明する。図12に示すパネルは、基板700と、基板700上の画素部701、信号線駆動回路702a、信号線駆動回路702b、走査線駆動回路703a、及び走査線駆動回路703bとを有する。
本発明の一態様に係る半導体装置は、表示機器、パーソナルコンピュータ、記録媒体を備えた画像再生装置(代表的にはDVD:Digital Versatile Disc等の記録媒体を再生し、その画像を表示しうるディスプレイを有する装置)に用いることができる。その他に、本発明の一態様に係る半導体装置を用いることができる電子機器として、携帯電話、携帯型を含むゲーム機、携帯情報端末、電子書籍、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンター、プリンター複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図13に示す。
101 トランジスタ
102 トランジスタ
103 配線
104 配線
105 配線
106 配線
107 配線
110 導電膜
111 ゲート絶縁膜
112 半導体膜
113 導電膜
114 導電膜
115 導電膜
116 半導体膜
117 導電膜
118 導電膜
119 導電膜
120 開口部
121 開口部
122 導電膜
123 半導体膜
124 導電膜
125 導電膜
126 半導体膜
127 導電膜
128 導電膜
210 導電膜
211 ゲート絶縁膜
212 半導体膜
213 導電膜
214 導電膜
215 導電膜
216 半導体膜
217 導電膜
218 導電膜
219 導電膜
220 開口部
221 開口部
222 導電膜
223 半導体膜
224 導電膜
225 導電膜
226 半導体膜
227 導電膜
228 導電膜
300 パルス発生回路
301 トランジスタ
302 トランジスタ
303 トランジスタ
304 トランジスタ
305 トランジスタ
306 トランジスタ
307 トランジスタ
308 トランジスタ
309 トランジスタ
310 トランジスタ
311 トランジスタ
312 トランジスタ
313 トランジスタ
314 トランジスタ
315 トランジスタ
316 容量素子
317 配線
318 配線
319 配線
320 配線
321 配線
322 配線
323 配線
324 配線
325 配線
326 配線
327 配線
328 配線
329 配線
350 インバータ
351 インバータ
400 パルス発生回路
402 トランジスタ
403 トランジスタ
404 トランジスタ
405 配線
406 配線
407 配線
408 配線
409 配線
410 配線
411 配線
412 配線
413 配線
414 配線
415 トランジスタ
416 トランジスタ
417 トランジスタ
418 トランジスタ
419 トランジスタ
420 トランジスタ
430 パルス発生回路
432 トランジスタ
433 トランジスタ
434 トランジスタ
435 配線
436 配線
437 配線
438 配線
439 配線
440 配線
441 配線
442 配線
443 配線
444 配線
445 配線
446 トランジスタ
447 トランジスタ
448 トランジスタ
449 トランジスタ
450 トランジスタ
451 トランジスタ
452 トランジスタ
460 パルス発生回路
462 トランジスタ
463 トランジスタ
464 トランジスタ
465 配線
466 配線
467 配線
468 配線
469 配線
470 配線
471 配線
472 配線
474 配線
475 配線
476 トランジスタ
477 トランジスタ
478 トランジスタ
479 トランジスタ
480 トランジスタ
481 トランジスタ
482 トランジスタ
500 パルス発生回路
502 トランジスタ
503 トランジスタ
504 トランジスタ
505 配線
506 配線
507 配線
508 配線
509 配線
510 配線
511 配線
512 配線
514 配線
515 配線
516 トランジスタ
517 トランジスタ
518 トランジスタ
519 トランジスタ
520 トランジスタ
521 トランジスタ
522 トランジスタ
523 トランジスタ
530 パルス発生回路
532 トランジスタ
533 トランジスタ
534 トランジスタ
535 配線
536 配線
537 配線
538 配線
539 配線
540 配線
541 配線
542 配線
544 配線
545 配線
546 トランジスタ
547 トランジスタ
548 トランジスタ
549 トランジスタ
550 トランジスタ
551 トランジスタ
552 トランジスタ
553 トランジスタ
700 基板
701 画素部
702a 信号線駆動回路
702b 信号線駆動回路
703a 走査線駆動回路
703b 走査線駆動回路
800 基板
802 ゲート絶縁膜
812 導電膜
813 半導体膜
814 導電膜
815 導電膜
816 導電膜
817 半導体膜
818 導電膜
819 導電膜
820 絶縁膜
821 絶縁膜
822 導電膜
824 絶縁膜
825 EL層
826 導電膜
830 トランジスタ
831 トランジスタ
832 発光素子
840 画素
841 駆動回路
850 導電膜
851 導電膜
852 導電膜
853 導電膜
854 絶縁膜
5001 筐体
5002 筐体
5003 表示部
5004 表示部
5005 マイクロホン
5006 スピーカー
5007 操作キー
5008 スタイラス
5201 筐体
5202 表示部
5203 支持台
5401 筐体
5402 表示部
5403 キーボード
5404 ポインティングデバイス
5601 筐体
5602 筐体
5603 表示部
5604 表示部
5605 接続部
5606 操作キー
5801 筐体
5802 表示部
5803 音声入力部
5804 音声出力部
5805 操作キー
5806 受光部
Claims (8)
- 配線に電位を与える回路を有し、
前記回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極と異なる層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 配線に電位を与える回路を有し、
前記回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタが有するソース電極またはドレイン電極及び前記第2トランジスタが有するソース電極またはドレイン電極と同じ層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 複数の画素と、前記複数の画素に配線を介して電位を与える回路とを有し、
前記回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極と異なる層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 複数の画素と、前記複数の画素に配線を介して電位を与える回路とを有し、
前記回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタが有するソース電極またはドレイン電極及び前記第2トランジスタが有するソース電極またはドレイン電極と同じ層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 複数の画素と、走査線への電位の供給により前記複数の画素の選択を行う走査線駆動回路とを有し、
前記走査線駆動回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極と異なる層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 複数の画素と、走査線への電位の供給により前記複数の画素の選択を行う走査線駆動回路とを有し、
前記走査線駆動回路は、前記電位の出力側の第1トランジスタと、第2トランジスタとを少なくとも有し、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、同じ層において互いに離隔するように設けられており、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比より大きく、
前記第1トランジスタのゲート電極及び前記第2トランジスタのゲート電極は、前記第1トランジスタが有するソース電極またはドレイン電極及び前記第2トランジスタが有するソース電極またはドレイン電極と同じ層に設けられた導電膜を介して、電気的に接続されている半導体装置。 - 請求項1乃至請求項6のいずれか1項において、
前記第1トランジスタが有する半導体膜及び前記第2トランジスタが有する半導体膜は、酸化物半導体、或いは非晶質シリコンを含む半導体装置。 - 請求項1乃至請求項7のいずれか1項において、
前記第1トランジスタのチャネル長に対するチャネル幅の比は、前記第2トランジスタのチャネル長に対するチャネル幅の比の2倍以上大きい半導体装置。
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TWI638519B (zh) * | 2013-05-17 | 2018-10-11 | 半導體能源研究所股份有限公司 | 可程式邏輯裝置及半導體裝置 |
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