JP5276173B2 - ニア・コードワードのromリスト復号 - Google Patents
ニア・コードワードのromリスト復号 Download PDFInfo
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- JP5276173B2 JP5276173B2 JP2011522963A JP2011522963A JP5276173B2 JP 5276173 B2 JP5276173 B2 JP 5276173B2 JP 2011522963 A JP2011522963 A JP 2011522963A JP 2011522963 A JP2011522963 A JP 2011522963A JP 5276173 B2 JP5276173 B2 JP 5276173B2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1142—Decoding using trapping sets
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3707—Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3738—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with judging correct decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
- H03M13/3753—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding using iteration stopping criteria
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
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- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US8929708P | 2008-08-15 | 2008-08-15 | |
| US61/089,297 | 2008-08-15 | ||
| PCT/US2008/086537 WO2010019169A1 (en) | 2008-08-15 | 2008-12-12 | Rom list-decoding of near codewords |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012500513A JP2012500513A (ja) | 2012-01-05 |
| JP2012500513A5 JP2012500513A5 (enExample) | 2012-02-16 |
| JP5276173B2 true JP5276173B2 (ja) | 2013-08-28 |
Family
ID=41669126
Family Applications (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011522963A Expired - Fee Related JP5276173B2 (ja) | 2008-08-15 | 2008-12-12 | ニア・コードワードのromリスト復号 |
| JP2011522962A Expired - Fee Related JP5363573B2 (ja) | 2008-08-15 | 2008-12-12 | ニア・コードワードのramリスト復号 |
| JP2011523008A Pending JP2012500514A (ja) | 2008-08-15 | 2009-04-08 | 複数のチェックノード・アルゴリズムを用いる誤り訂正デコーダ |
| JP2013231731A Ceased JP2014027704A (ja) | 2008-08-15 | 2013-11-08 | 複数のチェックノード・アルゴリズムを用いる誤り訂正デコーダ |
Family Applications After (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011522962A Expired - Fee Related JP5363573B2 (ja) | 2008-08-15 | 2008-12-12 | ニア・コードワードのramリスト復号 |
| JP2011523008A Pending JP2012500514A (ja) | 2008-08-15 | 2009-04-08 | 複数のチェックノード・アルゴリズムを用いる誤り訂正デコーダ |
| JP2013231731A Ceased JP2014027704A (ja) | 2008-08-15 | 2013-11-08 | 複数のチェックノード・アルゴリズムを用いる誤り訂正デコーダ |
Country Status (7)
| Country | Link |
|---|---|
| US (17) | US8464129B2 (enExample) |
| EP (3) | EP2181504A4 (enExample) |
| JP (4) | JP5276173B2 (enExample) |
| KR (3) | KR101418467B1 (enExample) |
| CN (3) | CN101803205B (enExample) |
| TW (3) | TWI508460B (enExample) |
| WO (3) | WO2010019168A1 (enExample) |
Families Citing this family (248)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7958427B1 (en) * | 2007-03-30 | 2011-06-07 | Link—A—Media Devices Corporation | ECC with out of order completion |
| US8281212B1 (en) | 2007-03-30 | 2012-10-02 | Link—A—Media Devices Corporation | Iterative ECC decoder with out of order completion |
| US8359522B2 (en) | 2007-05-01 | 2013-01-22 | Texas A&M University System | Low density parity check decoder for regular LDPC codes |
| US8127209B1 (en) | 2007-07-30 | 2012-02-28 | Marvell International Ltd. | QC-LDPC decoder with list-syndrome decoding |
| US8799742B1 (en) * | 2007-07-30 | 2014-08-05 | Marvell International Ltd. | QC-LDPC decoder with list-syndrome decoding |
| US8219878B1 (en) | 2007-12-03 | 2012-07-10 | Marvell International Ltd. | Post-processing decoder of LDPC codes for improved error floors |
| US8245104B2 (en) | 2008-05-02 | 2012-08-14 | Lsi Corporation | Systems and methods for queue based data detection and decoding |
| US8370711B2 (en) | 2008-06-23 | 2013-02-05 | Ramot At Tel Aviv University Ltd. | Interruption criteria for block decoding |
| US20090319860A1 (en) * | 2008-06-23 | 2009-12-24 | Ramot At Tel Aviv University Ltd. | Overcoming ldpc trapping sets by decoder reset |
| US20100037121A1 (en) * | 2008-08-05 | 2010-02-11 | The Hong Kong University Of Science And Technology | Low power layered decoding for low density parity check decoders |
| KR101418467B1 (ko) | 2008-08-15 | 2014-07-10 | 엘에스아이 코포레이션 | 니어 코드워드들의 ram 리스트-디코딩 |
| US8185796B2 (en) * | 2008-08-20 | 2012-05-22 | Nec Laboratories America, Inc. | Mitigation of fiber nonlinearities in multilevel coded-modulation schemes |
| US8291285B1 (en) * | 2008-09-18 | 2012-10-16 | Marvell International Ltd. | Circulant processing scheduler for layered LDPC decoder |
| WO2010036209A1 (en) * | 2008-09-26 | 2010-04-01 | Agency For Science, Technology And Research | Decoding circuit and encoding circuit |
| US8219873B1 (en) * | 2008-10-20 | 2012-07-10 | Link—A—Media Devices Corporation | LDPC selective decoding scheduling using a cost function |
| US8321772B1 (en) * | 2008-10-20 | 2012-11-27 | Link—A—Media Devices Corporation | SOVA sharing during LDPC global iteration |
| US8161345B2 (en) | 2008-10-29 | 2012-04-17 | Agere Systems Inc. | LDPC decoders using fixed and adjustable permutators |
| TWI469533B (zh) * | 2008-11-07 | 2015-01-11 | Realtek Semiconductor Corp | 同位檢查碼解碼器及接收系統 |
| US9356623B2 (en) | 2008-11-26 | 2016-05-31 | Avago Technologies General Ip (Singapore) Pte. Ltd. | LDPC decoder variable node units having fewer adder stages |
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| US8234556B2 (en) * | 2008-12-30 | 2012-07-31 | Intel Corporation | Broadcast receiver and method for optimizing a scale factor for a log-likelihood mapper |
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| US8347195B1 (en) | 2009-01-22 | 2013-01-01 | Marvell International Ltd. | Systems and methods for near-codeword detection and correction on the fly |
| JP5506828B2 (ja) | 2009-03-05 | 2014-05-28 | エルエスアイ コーポレーション | 繰り返し復号器のための改良ターボ等化方法 |
| KR101321487B1 (ko) * | 2009-04-21 | 2013-10-23 | 에이저 시스템즈 엘엘시 | 기입 검증을 사용한 코드들의 에러-플로어 완화 |
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| JP5489552B2 (ja) * | 2009-06-19 | 2014-05-14 | 三菱電機株式会社 | 復号方法及び復号装置 |
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