JP2008544721A - 反復デコーダの電力削減のための方法及び装置 - Google Patents
反復デコーダの電力削減のための方法及び装置 Download PDFInfo
- Publication number
- JP2008544721A JP2008544721A JP2008519244A JP2008519244A JP2008544721A JP 2008544721 A JP2008544721 A JP 2008544721A JP 2008519244 A JP2008519244 A JP 2008519244A JP 2008519244 A JP2008519244 A JP 2008519244A JP 2008544721 A JP2008544721 A JP 2008544721A
- Authority
- JP
- Japan
- Prior art keywords
- iteration
- decoded codeword
- iterations
- confidence value
- specified threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
Abstract
【解決手段】本装置は、メモリ装置及び反復終了装置を備えている。メモリ装置は、最大反復数となる前における反復デコーダの反復ごとに、現在の反復における復号済み符号語を保存するためのものである。反復終了装置は、現在の反復における復号済み符号語と、前の反復において既に保存された復号済み符号語とを比較し、現在の反復における復号済み符号語が、前の反復において既に保存された復号済み符号語と一致するときに信頼値を増加し、信頼値が、予め指定された閾値を超えたときに、反復デコーダのそれ以上の反復を終了させるためのものである。
【選択図】図4
Description
105 データ・ソース
110 BCHエンコーダ
115 LDPCエンコーダ
120 変調器
125 通信チャネル
130 復調器
135 LDPCデコーダ
140 BCHデコーダ
145 データ・シンク
200、300 LDPCデコーダ
205、305 反復コントローラ
210、310 チェック・ノード・プロセッサ
215、315 ビット・ノード・プロセッサ
220、320 ビット判定モジュール
325 反復終了モジュール
330 復号済み符号語バッファ
Claims (18)
- 反復デコーダの電力消費を削減するための装置であって、
最大反復数となる前における反復デコーダの反復ごとに、現在の反復における復号済み符号語を保存するメモリ装置と、
現在の反復における復号済み符号語と、前の反復において既に保存された復号済み符号語とを比較し、現在の反復における復号済み符号語が、前の反復において既に保存された復号済み符号語と一致するときに信頼値を増加し、信頼値が、予め指定された閾値を超えたときに、反復デコーダのそれ以上の反復を終了させる反復終了装置と、
を備えている装置。 - 予め指定された閾値が1に等しい、
請求項1に記載の装置。 - 予め指定された閾値及び最大反復数の値が調節可能である、
請求項1に記載の装置。 - Kminが通常のチャネル条件下で符号語を復号するのに必要な最小反復数に等しく、
前記メモリ装置は、現在の反復数がKminに等しいときに、現在の反復における復号済み符号語を保存する、
請求項1に記載の装置。 - 前記反復終了装置は、信頼値が予め指定された閾値を超えないとき、信頼値を0にリセットする、
請求項1に記載の装置。 - 前記メモリ装置は、更に、信頼値を保存するためのものである、
請求項1に記載の装置。 - 前記反復デコーダは、反復コントローラを備えており、
前記反復終了装置は、停止反復制御信号を生成し、停止反復制御信号を反復コントローラに送信することによって、反復デコーダのそれ以上の反復を終了させる、
請求項1に記載の装置。 - 反復デコーダの電力消費を削減するための方法であって、
最大反復数となる前における反復デコーダの反復ごとに、現在の反復における復号済み符号語をバッファに保存するステップと、
現在の反復における復号済み符号語と、前の反復において既に保存された復号済み符号語とを比較するステップと、
現在の反復における復号済み符号語が、前の反復において既に保存された復号済み符号語と一致するときに信頼値を増加するステップと、
信頼値が、予め指定された閾値を超えたときに、反復デコーダのそれ以上の反復を終了させるステップと、
を含む方法。 - 予め指定された閾値が1に等しい、
請求項8に記載の方法。 - 予め指定された閾値及び最大反復数の値が調節可能である、
請求項8に記載の方法。 - Kminが通常のチャネル条件下で符号語を復号するのに必要な最小反復数に等しく、
前記保存するステップは、現在の反復数がKminに等しいときに開始される、
請求項8に記載の方法。 - 信頼値が、予め指定された閾値を超えないとき、信頼値を0にリセットするステップを、
更に含む請求項8に記載の方法。 - 信頼値をバッファに保存するステップを、
更に含む請求項8に記載の方法。 - 反復デコーダの電力消費を削減するための、コンピュータが使用可能なプログラムコードを含むコンピュータ使用可能媒体を有するコンピュータ・プログラム製品であって、
最大反復数となる前における反復デコーダの反復ごとに、現在の反復における復号済み符号語をバッファに保存させるコンピュータ使用可能プログラムコードと、
現在の反復における復号済み符号語が、前の反復において既に保存された復号済み符号語と一致するときに信頼値を増加するコンピュータ使用可能プログラムコードと、
信頼値が、予め指定された閾値を超えたときに、反復デコーダのそれ以上の反復を終了させるコンピュータ使用可能プログラムコードと、
を備えているコンピュータ・プログラム製品。 - 予め指定された閾値が1に等しい、
請求項14に記載のコンピュータ・プログラム製品。 - 予め指定された閾値及び最大反復数の値が調節可能である、
請求項14に記載のコンピュータ・プログラム製品。 - 信頼値が予め指定された閾値を超えないとき、信頼値を0にリセットするステップを、
更に含んでいる請求項14に記載のコンピュータ・プログラム製品。 - 信頼値をバッファに保存させるコンピュータ使用可能プログラムコードを、
更に備えている請求項14に記載のコンピュータ・プログラム製品。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2005/023007 WO2007001305A1 (en) | 2005-06-27 | 2005-06-27 | Stopping criteria in iterative decoders |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2008544721A true JP2008544721A (ja) | 2008-12-04 |
Family
ID=35539661
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008519244A Pending JP2008544721A (ja) | 2005-06-27 | 2005-06-27 | 反復デコーダの電力削減のための方法及び装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8171367B2 (ja) |
EP (1) | EP1897223A1 (ja) |
JP (1) | JP2008544721A (ja) |
MY (1) | MY152495A (ja) |
WO (1) | WO2007001305A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016504848A (ja) * | 2012-12-07 | 2016-02-12 | マイクロン テクノロジー, インク. | 階層化反復誤り訂正のための停止基準 |
Families Citing this family (81)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101192898B1 (ko) * | 2005-06-27 | 2012-10-18 | 톰슨 라이센싱 | 반복 디코더의 전력 감소를 위한 방법 및 장치 |
KR101021526B1 (ko) | 2007-10-30 | 2011-03-16 | 삼성전자주식회사 | 이동통신 시스템의 반복 복호 장치 및 방법 |
US8533384B2 (en) | 2007-12-27 | 2013-09-10 | Sandisk Enterprise Ip Llc | Flash memory controller garbage collection operations performed independently in multiple flash memory groups |
US8392786B2 (en) * | 2008-05-07 | 2013-03-05 | Broadcom Corporation | LDPC coding systems for 60 GHz millimeter wave based physical layer extension |
US8370711B2 (en) | 2008-06-23 | 2013-02-05 | Ramot At Tel Aviv University Ltd. | Interruption criteria for block decoding |
EP2181504A4 (en) * | 2008-08-15 | 2010-07-28 | Lsi Corp | DECODING LIST OF CODED WORDS CLOSE IN A ROM MEMORY |
US8369470B2 (en) * | 2008-11-25 | 2013-02-05 | Agere Systems, LLC | Methods and apparatus for adapting one or more equalization parameters by reducing group delay spread |
US8347155B2 (en) * | 2009-04-17 | 2013-01-01 | Lsi Corporation | Systems and methods for predicting failure of a storage medium |
CN102077173B (zh) | 2009-04-21 | 2015-06-24 | 艾格瑞系统有限责任公司 | 利用写入验证减轻代码的误码平层 |
US8291298B2 (en) * | 2009-04-29 | 2012-10-16 | Yim Tu Investments Ltd., Llc | Analog iterative decoder with early-termination |
US8442163B2 (en) * | 2009-08-24 | 2013-05-14 | Eric Morgan Dowling | List-viterbi hard iterative decoder for multilevel codes |
US8341486B2 (en) | 2010-03-31 | 2012-12-25 | Silicon Laboratories Inc. | Reducing power consumption in an iterative decoder |
US8555131B2 (en) | 2010-03-31 | 2013-10-08 | Silicon Laboratories Inc. | Techniques to control power consumption in an iterative decoder by control of node configurations |
US8433970B2 (en) | 2010-03-31 | 2013-04-30 | Silicon Laboratories Inc. | Techniques to control power consumption in an iterative decoder by control of node configurations |
US8237869B2 (en) | 2010-03-31 | 2012-08-07 | Silicon Laboratories Inc. | Multi-standard digital demodulator for TV signals broadcast over cable, satellite and terrestrial networks |
US8464142B2 (en) | 2010-04-23 | 2013-06-11 | Lsi Corporation | Error-correction decoder employing extrinsic message averaging |
US8499226B2 (en) | 2010-06-29 | 2013-07-30 | Lsi Corporation | Multi-mode layered decoding |
US8458555B2 (en) * | 2010-06-30 | 2013-06-04 | Lsi Corporation | Breaking trapping sets using targeted bit adjustment |
US8504900B2 (en) | 2010-07-02 | 2013-08-06 | Lsi Corporation | On-line discovery and filtering of trapping sets |
US8756479B2 (en) | 2011-01-14 | 2014-06-17 | Marvell World Trade Ltd. | LDPC multi-decoder architectures |
US8837611B2 (en) | 2011-02-09 | 2014-09-16 | Silicon Laboratories Inc. | Memory-aided synchronization in a receiver |
KR101919990B1 (ko) * | 2011-03-10 | 2018-11-19 | 삼성전자주식회사 | 데이터 처리 시스템 및 그것의 에러 정정 코드 처리 방법 |
ITBO20110385A1 (it) * | 2011-06-30 | 2012-12-31 | Consiglio Nazionale Ricerche | Metodo di decodifica di un messaggio codificato con un codice dg-ldpc |
US8793543B2 (en) | 2011-11-07 | 2014-07-29 | Sandisk Enterprise Ip Llc | Adaptive read comparison signal generation for memory systems |
US8768990B2 (en) | 2011-11-11 | 2014-07-01 | Lsi Corporation | Reconfigurable cyclic shifter arrangement |
US8644370B2 (en) | 2012-01-25 | 2014-02-04 | Silicon Laboratories | Providing slope values for a demapper |
US9699263B1 (en) | 2012-08-17 | 2017-07-04 | Sandisk Technologies Llc. | Automatic read and write acceleration of data accessed by virtual machines |
US8959274B2 (en) | 2012-09-06 | 2015-02-17 | Silicon Laboratories Inc. | Providing a serial download path to devices |
RU2012146685A (ru) | 2012-11-01 | 2014-05-10 | ЭлЭсАй Корпорейшн | База данных наборов-ловушек для декодера на основе разреженного контроля четности |
US9619317B1 (en) | 2012-12-18 | 2017-04-11 | Western Digital Technologies, Inc. | Decoder having early decoding termination detection |
US9122625B1 (en) | 2012-12-18 | 2015-09-01 | Western Digital Technologies, Inc. | Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems |
US8966339B1 (en) | 2012-12-18 | 2015-02-24 | Western Digital Technologies, Inc. | Decoder supporting multiple code rates and code lengths for data storage systems |
US9501398B2 (en) | 2012-12-26 | 2016-11-22 | Sandisk Technologies Llc | Persistent storage device with NVRAM for staging writes |
US9612948B2 (en) | 2012-12-27 | 2017-04-04 | Sandisk Technologies Llc | Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device |
US9239751B1 (en) | 2012-12-27 | 2016-01-19 | Sandisk Enterprise Ip Llc | Compressing data from multiple reads for error control management in memory systems |
US9454420B1 (en) | 2012-12-31 | 2016-09-27 | Sandisk Technologies Llc | Method and system of reading threshold voltage equalization |
US9870830B1 (en) | 2013-03-14 | 2018-01-16 | Sandisk Technologies Llc | Optimal multilevel sensing for reading data from a storage medium |
US9244763B1 (en) | 2013-03-15 | 2016-01-26 | Sandisk Enterprise Ip Llc | System and method for updating a reading threshold voltage based on symbol transition information |
US9367246B2 (en) | 2013-03-15 | 2016-06-14 | Sandisk Technologies Inc. | Performance optimization of data transfer for soft information generation |
US9136877B1 (en) * | 2013-03-15 | 2015-09-15 | Sandisk Enterprise Ip Llc | Syndrome layered decoding for LDPC codes |
US9092350B1 (en) | 2013-03-15 | 2015-07-28 | Sandisk Enterprise Ip Llc | Detection and handling of unbalanced errors in interleaved codewords |
US9236886B1 (en) | 2013-03-15 | 2016-01-12 | Sandisk Enterprise Ip Llc | Universal and reconfigurable QC-LDPC encoder |
US9159437B2 (en) | 2013-06-11 | 2015-10-13 | Sandisk Enterprise IP LLC. | Device and method for resolving an LM flag issue |
US9384126B1 (en) | 2013-07-25 | 2016-07-05 | Sandisk Technologies Inc. | Methods and systems to avoid false negative results in bloom filters implemented in non-volatile data storage systems |
US9524235B1 (en) | 2013-07-25 | 2016-12-20 | Sandisk Technologies Llc | Local hash value generation in non-volatile data storage systems |
US9235509B1 (en) | 2013-08-26 | 2016-01-12 | Sandisk Enterprise Ip Llc | Write amplification reduction by delaying read access to data written during garbage collection |
US9639463B1 (en) | 2013-08-26 | 2017-05-02 | Sandisk Technologies Llc | Heuristic aware garbage collection scheme in storage systems |
US9298608B2 (en) | 2013-10-18 | 2016-03-29 | Sandisk Enterprise Ip Llc | Biasing for wear leveling in storage systems |
US9442662B2 (en) | 2013-10-18 | 2016-09-13 | Sandisk Technologies Llc | Device and method for managing die groups |
US9436831B2 (en) | 2013-10-30 | 2016-09-06 | Sandisk Technologies Llc | Secure erase in a memory device |
US9263156B2 (en) | 2013-11-07 | 2016-02-16 | Sandisk Enterprise Ip Llc | System and method for adjusting trip points within a storage device |
US9244785B2 (en) | 2013-11-13 | 2016-01-26 | Sandisk Enterprise Ip Llc | Simulated power failure and data hardening |
US9703816B2 (en) | 2013-11-19 | 2017-07-11 | Sandisk Technologies Llc | Method and system for forward reference logging in a persistent datastore |
US9520197B2 (en) | 2013-11-22 | 2016-12-13 | Sandisk Technologies Llc | Adaptive erase of a storage device |
US9520162B2 (en) | 2013-11-27 | 2016-12-13 | Sandisk Technologies Llc | DIMM device controller supervisor |
US9582058B2 (en) | 2013-11-29 | 2017-02-28 | Sandisk Technologies Llc | Power inrush management of storage devices |
US9235245B2 (en) | 2013-12-04 | 2016-01-12 | Sandisk Enterprise Ip Llc | Startup performance and power isolation |
US9129665B2 (en) | 2013-12-17 | 2015-09-08 | Sandisk Enterprise Ip Llc | Dynamic brownout adjustment in a storage device |
US9703636B2 (en) | 2014-03-01 | 2017-07-11 | Sandisk Technologies Llc | Firmware reversion trigger and control |
US9454448B2 (en) | 2014-03-19 | 2016-09-27 | Sandisk Technologies Llc | Fault testing in storage devices |
US9448876B2 (en) | 2014-03-19 | 2016-09-20 | Sandisk Technologies Llc | Fault detection and prediction in storage devices |
US9390814B2 (en) | 2014-03-19 | 2016-07-12 | Sandisk Technologies Llc | Fault detection and prediction for data storage elements |
US9390021B2 (en) | 2014-03-31 | 2016-07-12 | Sandisk Technologies Llc | Efficient cache utilization in a tiered data structure |
US9626400B2 (en) | 2014-03-31 | 2017-04-18 | Sandisk Technologies Llc | Compaction of information in tiered data structure |
US9626399B2 (en) | 2014-03-31 | 2017-04-18 | Sandisk Technologies Llc | Conditional updates for reducing frequency of data modification operations |
US9697267B2 (en) | 2014-04-03 | 2017-07-04 | Sandisk Technologies Llc | Methods and systems for performing efficient snapshots in tiered data structures |
US10372613B2 (en) | 2014-05-30 | 2019-08-06 | Sandisk Technologies Llc | Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device |
US9093160B1 (en) | 2014-05-30 | 2015-07-28 | Sandisk Technologies Inc. | Methods and systems for staggered memory operations |
US10162748B2 (en) | 2014-05-30 | 2018-12-25 | Sandisk Technologies Llc | Prioritizing garbage collection and block allocation based on I/O history for logical address regions |
US10656840B2 (en) | 2014-05-30 | 2020-05-19 | Sandisk Technologies Llc | Real-time I/O pattern recognition to enhance performance and endurance of a storage device |
US10656842B2 (en) | 2014-05-30 | 2020-05-19 | Sandisk Technologies Llc | Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device |
US10146448B2 (en) | 2014-05-30 | 2018-12-04 | Sandisk Technologies Llc | Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device |
US10114557B2 (en) | 2014-05-30 | 2018-10-30 | Sandisk Technologies Llc | Identification of hot regions to enhance performance and endurance of a non-volatile storage device |
US9070481B1 (en) | 2014-05-30 | 2015-06-30 | Sandisk Technologies Inc. | Internal current measurement for age measurements |
US9703491B2 (en) | 2014-05-30 | 2017-07-11 | Sandisk Technologies Llc | Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device |
US9652381B2 (en) | 2014-06-19 | 2017-05-16 | Sandisk Technologies Llc | Sub-block garbage collection |
US9443601B2 (en) | 2014-09-08 | 2016-09-13 | Sandisk Technologies Llc | Holdup capacitor energy harvesting |
US10153786B1 (en) * | 2015-02-06 | 2018-12-11 | Marvell International Ltd. | Iterative decoder with dynamically-variable performance |
US9692450B2 (en) | 2015-05-11 | 2017-06-27 | Maxio Technology (Hangzhou) Ltd. | Systems and methods for early exit of layered LDPC decoder |
US10498362B2 (en) | 2016-12-19 | 2019-12-03 | Kabushiki Kaisha Toshiba | Low power error correcting code (ECC) system |
CN112152636B (zh) * | 2020-09-08 | 2023-09-29 | Oppo广东移动通信有限公司 | 译码方法及装置、设备、存储介质 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003032123A (ja) * | 2001-07-11 | 2003-01-31 | Mitsubishi Electric Corp | ターボ符号の誤り訂正復号方法および装置 |
JP2004527142A (ja) * | 2000-11-14 | 2004-09-02 | インターデイジタル テクノロジー コーポレーション | 循環冗長符号シグネチャ比較を行うターボ復号器 |
JP2005045735A (ja) * | 2003-07-25 | 2005-02-17 | Sony Corp | 符号検出装置及び方法、復号装置及び方法、並びに情報処理装置及び方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6292918B1 (en) * | 1998-11-05 | 2001-09-18 | Qualcomm Incorporated | Efficient iterative decoding |
US6665357B1 (en) | 1999-01-22 | 2003-12-16 | Sharp Laboratories Of America, Inc. | Soft-output turbo code decoder and optimized decoding method |
US7128270B2 (en) * | 1999-09-17 | 2006-10-31 | Silverbrook Research Pty Ltd | Scanning device for coded data |
US6879648B2 (en) | 2000-01-31 | 2005-04-12 | Texas Instruments Incorporated | Turbo decoder stopping based on mean and variance of extrinsics |
US6526531B1 (en) | 2000-03-22 | 2003-02-25 | Agere Systems Inc. | Threshold detection for early termination of iterative decoding |
US6865708B2 (en) | 2000-08-23 | 2005-03-08 | Wang Xiao-An | Hybrid early-termination methods and output selection procedure for iterative turbo decoders |
US6671852B1 (en) | 2000-09-06 | 2003-12-30 | Motorola, Inc. | Syndrome assisted iterative decoder for turbo codes |
US6518892B2 (en) | 2000-11-06 | 2003-02-11 | Broadcom Corporation | Stopping criteria for iterative decoding |
FR2822316B1 (fr) | 2001-03-19 | 2003-05-02 | Mitsubishi Electric Inf Tech | Procede d'optimisation, sous contrainte de ressoureces, de la taille de blocs de donnees codees |
US20030023920A1 (en) | 2001-07-26 | 2003-01-30 | Gibong Jeong | Method and apparatus for reducing the average number of iterations in iterative decoding |
KR20030016720A (ko) | 2001-08-21 | 2003-03-03 | 한국전자통신연구원 | 신호대 잡음비 추정에 의한 엘디피씨 복호화 장치의 최대반복 복호수 적응 설정 장치 및 그 방법과, 이 장치를포함하는 엘디피씨 복호화 장치 및 그 방법 |
US7093180B2 (en) | 2002-06-28 | 2006-08-15 | Interdigital Technology Corporation | Fast H-ARQ acknowledgement generation method using a stopping rule for turbo decoding |
US20050283707A1 (en) * | 2004-06-22 | 2005-12-22 | Eran Sharon | LDPC decoder for decoding a low-density parity check (LDPC) codewords |
-
2005
- 2005-06-27 WO PCT/US2005/023007 patent/WO2007001305A1/en active Application Filing
- 2005-06-27 EP EP05763816A patent/EP1897223A1/en not_active Withdrawn
- 2005-06-27 US US11/921,494 patent/US8171367B2/en active Active
- 2005-06-27 JP JP2008519244A patent/JP2008544721A/ja active Pending
-
2006
- 2006-06-19 MY MYPI20062884 patent/MY152495A/en unknown
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004527142A (ja) * | 2000-11-14 | 2004-09-02 | インターデイジタル テクノロジー コーポレーション | 循環冗長符号シグネチャ比較を行うターボ復号器 |
JP2003032123A (ja) * | 2001-07-11 | 2003-01-31 | Mitsubishi Electric Corp | ターボ符号の誤り訂正復号方法および装置 |
JP2005045735A (ja) * | 2003-07-25 | 2005-02-17 | Sony Corp | 符号検出装置及び方法、復号装置及び方法、並びに情報処理装置及び方法 |
Non-Patent Citations (2)
Title |
---|
A. MATACHE ET AL.: "Stopping Rules for Turbo Decoders", TMO PROGRESS REPORT, vol. N42-142, JPN5008009871, 15 August 2000 (2000-08-15), pages 1 - 22, XP002225478, ISSN: 0002093052 * |
ROSE Y.SHAO ET.AL.: "Two Simple Stopping Criteria for Turbo Decoding", IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 47, no. 8, JPN6010052717, August 1999 (1999-08-01), US, pages 1117 - 1120, XP011009477, ISSN: 0002093053 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016504848A (ja) * | 2012-12-07 | 2016-02-12 | マイクロン テクノロジー, インク. | 階層化反復誤り訂正のための停止基準 |
US10193577B2 (en) | 2012-12-07 | 2019-01-29 | Micron Technology, Inc. | Stopping criteria for layered iterative error correction |
US10998923B2 (en) | 2012-12-07 | 2021-05-04 | Micron Technology, Inc. | Stopping criteria for layered iterative error correction |
US11405058B2 (en) | 2012-12-07 | 2022-08-02 | Micron Technology, Inc. | Stopping criteria for layered iterative error correction |
Also Published As
Publication number | Publication date |
---|---|
EP1897223A1 (en) | 2008-03-12 |
US8171367B2 (en) | 2012-05-01 |
WO2007001305A1 (en) | 2007-01-04 |
MY152495A (en) | 2014-10-15 |
US20090249160A1 (en) | 2009-10-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2008544721A (ja) | 反復デコーダの電力削減のための方法及び装置 | |
JP5004249B2 (ja) | 反復復号器において電力を低減するための方法および装置 | |
US8347194B2 (en) | Hierarchical decoding apparatus | |
US7853854B2 (en) | Iterative decoding of a frame of data encoded using a block coding algorithm | |
US8448050B2 (en) | Memory system and control method for the same | |
JP5122551B2 (ja) | 対数尤度マッパのスケールファクタを最適化するブロードキャストレシーバ及び方法 | |
US20160027521A1 (en) | Method of flash channel calibration with multiple luts for adaptive multiple-read | |
JP4777876B2 (ja) | ターボデコーダの反復の早期終了 | |
CN106341136B (zh) | Ldpc解码方法及其装置 | |
JP2006121686A (ja) | 低密度パリティ検査コードを効率的に復号する方法及び装置 | |
TWI557747B (zh) | 記憶體控制模組與方法以及錯誤更正碼編/解碼電路與方法 | |
WO2019019550A1 (zh) | 应用于快闪存储器中的自适应ldpc码纠错码系统和方法 | |
JP2006325259A (ja) | 循環冗長符号シグネチャ比較を行うターボ復号器 | |
WO2018179246A1 (en) | Check bit concatenated polar codes | |
WO2020124980A1 (zh) | 应用于闪存控制器中的自适应polar码纠错码系统和方法 | |
US20210175908A1 (en) | Method and device for decoding staircase code, and storage medium | |
US9397699B2 (en) | Compact decoding of punctured codes | |
KR20080026559A (ko) | 반복 복호기에서의 중단 기준 | |
US11750219B2 (en) | Decoding method, decoder, and decoding apparatus | |
KR102197751B1 (ko) | 블록 터보 부호의 저 복잡도 오류정정을 위한 신드롬 기반의 혼합 복호 장치 및 그 방법 | |
US20170222659A1 (en) | Power improvement for ldpc | |
TWI645683B (zh) | 使用代數碼與ldpc碼的部分聯結編碼系統 | |
US11539380B2 (en) | Decoding device, decoding method, control circuit, and storage medium | |
RU2811072C1 (ru) | Способ декодирования, декодер и устройство декодирования | |
US20190097655A1 (en) | Low-density parity-check code decoder and decoding method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20100824 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20100730 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20101029 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20101102 |
|
A072 | Dismissal of procedure [no reply to invitation to correct request for examination] |
Free format text: JAPANESE INTERMEDIATE CODE: A073 Effective date: 20110117 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110128 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110426 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110509 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111209 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20120309 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20120316 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120608 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20120731 |