JP5101169B2 - 配線基板とその製造方法 - Google Patents
配線基板とその製造方法 Download PDFInfo
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- JP5101169B2 JP5101169B2 JP2007143340A JP2007143340A JP5101169B2 JP 5101169 B2 JP5101169 B2 JP 5101169B2 JP 2007143340 A JP2007143340 A JP 2007143340A JP 2007143340 A JP2007143340 A JP 2007143340A JP 5101169 B2 JP5101169 B2 JP 5101169B2
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Description
エッチングにより除去可能な支持体上に表面めっき層、外部接続用パッドを順次形成する工程、
当該外部接続用パッドの面積を表面めっき層のそれより小さくする加工を施す工程、
当該外部接続用パッドを形成した支持体上に所定数の絶縁層と配線層を形成する工程、
上記支持体をエッチングにより除去する工程、
を含む配線基板製造方法により製造することができる。
この例では、半導体素子を搭載する面の外部接続用パッドが表面めっき層より小さい配線基板を、その製造方法とともに説明する。
ここは、実施例1の配線基板と逆の面を半導体素子搭載面とする例を説明する。
なお、支持体51を除去する前の配線基板(図6(b)に示した状態の配線基板)に半導体素子を搭載してから支持体を除去することも可能である。
ここでは、表面めっき層が絶縁層の表面より凹んだ配線基板を説明する。このような配線基板の製造方法は、基本的には先の例で説明したのと同様であることから、表面めっき層が絶縁層の表面より凹んだ構造を形成する工程を中心に説明する。
ここでは、表面めっき層が絶縁層表面より突出した配線基板を説明する。このような配線基板の製造方法も、基本的には先の例で説明したのと同様であることから、表面めっき層が絶縁層の表面より突出した構造を形成する工程を中心に説明する。
2 表面めっき層
30、50、78、88 配線基板
31、51、71、81 支持体
33、52、74、84 表面めっき層
34、53、75、85 外部接続用パッド
35、54、76、86 絶縁層
36、55 ビア
37、56 配線層
38、57 外部接続用パッド
39、58 ソルダレジスト層
40、59 表面めっき層
Claims (19)
- 所定数の配線層と各配線層の間の絶縁層を有し、且つ、外部の回路に接続するための、表面めっき層を備えた外部接続用パッドを有する配線基板であって、
前記外部接続用パッドの面積が、その表面めっき層の面積よりも小さく、
前記外部接続用パッドが、前記表面めっき層の設けられた第1の面と、その反対側の第2の面とを有し、
前記外部接続用パッドが、配線基板表面となる最外層絶縁層中に埋設されており、
前記外部接続用パッドに備えられた前記表面めっき層の上面が、前記配線基板表面となる最外層絶縁層表面に露出しており、
前記外部接続用パッドの第2の面に、ビアが接続されており、
前記外部接続用パッドが、半導体素子又はその他の電子部品の搭載用である、
ことを特徴とする配線基板。 - 前記外部接続用パッドの外周部と前記表面めっき層の外周部とが、水平方向の間隔を有する、請求項1記載の配線基板。
- 前記外部接続用パッドが、前記表面めっき層の上面を除き、前記最外層絶縁層中に埋設されている、請求項1又は2記載の配線基板。
- 前記表面めっき層の上面が、前記最外層絶縁層表面より凹んで位置する、請求項1から3までのいずれか一つに記載の配線基板。
- 前記表面めっき層の上面が、前記最外層絶縁層表面より突出している、請求項1から3までのいずれか一つに記載の配線基板。
- 当該配線基板の前記外部接続用パッドが設けられた面とは反対側の面に、実装基板との接続用の外部接続パッドが設けられている、請求項1から5までのいずれか一つに記載の配線基板。
- 前記配線基板表面となる最外層絶縁層が、配線基板表面となる面と、その反対側の面とを有し、
前記最外層絶縁層の反対側の面から前記外部接続用パッドの第2の面に達するビアが設けられており、
前記最外層絶縁層の反対側の面におけるビアの径が、前記外部接続用パッドの第2の面側におけるビアの径より大きい、
請求項1から6までのいずれか一つに記載の配線基板。 - 前記外部接続用パッドに、バンプにより半導体素子又はその他の電子部品が搭載されている、請求項1から7までのいずれか一つに記載の配線基板。
- 前記外部接続用パッドの材料が銅又はその合金である、請求項1から8までのいずれか一つに記載の配線基板。
- 前記表面めっき層が、NiとAuの組み合わせ、NiとPdとAuの組み合わせ、Sn、又はSnとAgとの組み合わせにより形成されている、請求項1から9までのいずれか一つに記載の配線基板。
- 所定数の配線層と各配線層の間の絶縁層を有し、且つ、外部の回路に接続するための、表面めっき層を備えた外部接続用パッドを有する配線基板であり、
前記外部接続用パッドの面積が、その表面めっき層の面積よりも小さく、
前記外部接続用パッドが、前記表面めっき層の設けられた第1の面と、その反対側の第2の面とを有し、
前記外部接続用パッドが、配線基板表面となる最外層絶縁層中に埋設されており、
前記外部接続用パッドに備えられた前記表面めっき層の上面が、前記配線基板表面となる最外層絶縁層表面に露出しており、
前記外部接続用パッドの第2の面に、ビアが接続されており、
前記外部接続用パッドが、半導体素子又はその他の電子部品の搭載用である、
配線基板を製造する方法であって、
エッチングにより除去可能な支持体上に表面めっき層、外部接続用パッドを順次形成する工程、
当該外部接続用パッドの面積を表面めっき層の面積より小さくする加工を施す工程、
当該外部接続用パッドを形成した支持体上に所定数の絶縁層と配線層を形成する工程、
上記支持体をエッチングにより除去する工程、
を含むことを特徴とする配線基板製造方法。 - 前記外部接続用パッドの面積を表面めっき層の面積より小さくする加工をエッチングにより行う、請求項11記載の配線基板製造方法。
- 前記外部接続用パッドの面積を前記表面めっき層の面積より小さくする加工を施す工程により、前記外部接続用パッドの外周部と前記表面めっき層の外周部とに、水平方向の間隔を持たせる、請求項11又は12記載の配線基板製造方法。
- 前記支持体上に所定数の絶縁層と配線層を形成する工程が、前記支持体上に、前記外部接続用パッドを被覆するよう前記最外層絶縁層を積層する工程を有し、
前記支持体をエッチングにより除去する工程において、前記最外層絶縁層から前記支持体を除去することにより、前記表面めっき層の上面を除き、前記最外層絶縁層中に埋設された前記外部接続用パッドを得る、請求項11から13までのいずれか一つに記載の配線基板製造方法。 - 前記支持体上に表面めっき層、外部接続用パッドを順次形成する工程が、前記支持体上にめっき層を形成し、該めっき層上に前記表面めっき層、外部接続用パッドを順次形成する工程を有し、
前記支持体を除去する工程において、前記支持体を除去するとともに、前記めっき層を除去し、前記表面めっき層の上面が前記最外層絶縁層表面より凹んで位置する外部接続用パッドを得る、請求項11から14までのいずれか一つに記載の配線基板製造方法。 - 前記支持体上に表面めっき層、外部接続用パッドを順次形成する工程が、前記支持体上に凹部を形成し、該凹部内に前記表面めっき層、外部接続用パッドを順次形成する工程を有し、
前記支持体を除去する工程において、前記表面めっき層の上面が前記最外層絶縁層表面より突出した外部接続用パッドを得る、請求項11から14までのいずれか一つに記載の配線基板製造方法。 - 前記支持体上に所定数の絶縁層と配線層を形成する工程が、最上層に積層された絶縁層上に、実装基板との接続用の外部接続パッドを形成する工程を有する、請求項11から16までのいずれか一つに記載の配線基板製造方法。
- 前記支持体上に所定数の絶縁層と配線層を形成する工程が、
前記支持体上に前記外部接続用パッドを被覆するよう前記最外層絶縁層を積層する工程と、
前記最外層絶縁層に前記外部接続用パッドの第2の面に到達するビアを形成する工程と、
を有し、
前記最外層絶縁層の上面側の前記ビアの径が、前記外部接続用パッドの第2の面側におけるビアの径より大きい、請求項11から17までのいずれか一つに記載の配線基板製造方法。 - 前記配線基板の前記外部接続用パッドが、バンプにより半導体素子又はその他の電子部品を搭載するためのパッドである、請求項11から18までのいずれか一つに記載の配線基板製造方法。
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