JP2013251296A - 半導体装置 - Google Patents
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- 239000002344 surface layer Substances 0.000 claims description 10
- 238000009413 insulation Methods 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 description 7
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- 229920005591 polysilicon Polymers 0.000 description 3
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- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
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- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
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- H01L29/42312—Gate electrodes for field effect devices
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- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
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- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
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- H01L29/66007—Multistep manufacturing processes
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- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
【解決手段】複数のゲート電極17a、17bのうち、一部のゲート電極17aにおけるゲート電圧の変化速度が残部のゲート電極17bにおけるゲート電圧の変化速度より遅くされた半導体装置において、一部のゲート電極17aが配置されるゲート絶縁膜16にのみ接するようにエミッタ層20を形成する。これによれば、残部のゲート電極17bにターンオン電圧が印加されてゲート電圧が閾値電圧より大きくなってもドリフト層13に電子は供給されず、IGBT素子はターンオンしない。このため、一部のゲート電極17aによってIGBT素子のターンオンを制御することができ、IGBT素子のターンオフ時およびターンオン時のサージ電圧の大きさを小さくすることができる。
【選択図】図2
Description
本発明の第1実施形態について説明する。図1に示されるように、本実施形態の半導体装置は、IGBT素子が形成された半導体チップ10にゲート制御回路30が接続されて構成されている。まず、半導体チップ10の構成について説明する。
本発明の第2実施形態について説明する。本実施形態は、第1実施形態に対して第1、第2抵抗R1、R2を半導体チップ10内に組み込んだものであり、その他に関しては第1実施形態と同様であるため、ここでは説明を省略する。
上記各実施形態では、第1導電型をN型、第2導電型をP型とした例を説明したが、第1導電型をP型、第2導電型をN型としてもよい。
13 ドリフト層
14 ベース層
15 トレンチ
16 ゲート絶縁膜
17a 通常ゲート電極(ゲート電極の一部)
17b コントロールゲート電極(ゲート電極の残部)
20 エミッタ層
23 エミッタ電極
24 コレクタ電極
R1 第1抵抗
R2 第2抵抗
Claims (5)
- 第1導電型のドリフト層(13)と、
前記ドリフト層の表層部に形成された第2導電型のベース層(14)と、
前記ドリフト層のうち前記ベース層と離間した位置に形成された第2導電型のコレクタ層(11)と、
前記ベース層の表面に形成された複数のゲート絶縁膜(16)と、
前記ゲート絶縁膜上にそれぞれ形成された複数のゲート電極(17a、17b)と、
前記ベース層の表層部に形成されたエミッタ層(20)と、
前記エミッタ層および前記ベース層と電気的に接続されたエミッタ電極(23)と、
前記コレクタ層と電気的に接続されたコレクタ電極(24)と、を備え、
前記複数のゲート電極のうち、一部のゲート電極(17a)におけるゲート電圧の変化速度が残部のゲート電極(17b)におけるゲート電圧の変化速度より遅くされた半導体装置において、
前記エミッタ層は、前記一部のゲート電極が配置される前記ゲート絶縁膜にのみ接して形成されており、前記残部のゲート電極が配置される前記ゲート絶縁膜に接して形成されていないことを特徴とする半導体装置。 - 前記一部のゲート電極は、第1抵抗(R1)を介して所定電圧が印加され、前記残部のゲート電極は、前記第1抵抗より抵抗値の小さい第2抵抗(R2)を介して所定電圧が印加されることを特徴とする請求項1に記載の半導体装置。
- 前記ベース層を貫通して前記ドリフト層に達し、所定方向に延設された複数のトレンチ(15)を備え、
前記コレクタ層は前記ドリフト層の表層部側と反対側の裏面側に配置されており、
前記ゲート絶縁膜は前記トレンチの壁面にそれぞれ形成されることによって前記ベース層の表面に形成され、
前記エミッタ層は、前記一部のゲート電極が配置される前記トレンチの側面のみに接するように形成されており、前記残部のゲート電極が配置される前記トレンチの側面に接するように形成されていないことを特徴とする請求項1または2に記載の半導体装置。 - 前記複数のゲート電極は、前記所定方向と垂直方向において、前記一部のゲート電極と前記残部のゲート電極とが交互に配列されていることを特徴とする請求項3に記載の半導体装置。
- 前記コレクタ層に隣接する第2導電型のカソード層(25)を備えていることを特徴とする請求項1ないし4のいずれか1つに記載の半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012122822A JP6064371B2 (ja) | 2012-05-30 | 2012-05-30 | 半導体装置 |
PCT/JP2013/003357 WO2013179648A1 (ja) | 2012-05-30 | 2013-05-28 | 半導体装置 |
CN201380028289.1A CN104364907B (zh) | 2012-05-30 | 2013-05-28 | 半导体装置 |
US14/395,868 US9324848B2 (en) | 2012-05-30 | 2013-05-28 | Semiconductor device |
DE112013002767.4T DE112013002767T5 (de) | 2012-05-30 | 2013-05-28 | Halbleitervorrichtung |
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JP2012122822A JP6064371B2 (ja) | 2012-05-30 | 2012-05-30 | 半導体装置 |
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JP2013251296A true JP2013251296A (ja) | 2013-12-12 |
JP6064371B2 JP6064371B2 (ja) | 2017-01-25 |
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US (1) | US9324848B2 (ja) |
JP (1) | JP6064371B2 (ja) |
CN (1) | CN104364907B (ja) |
DE (1) | DE112013002767T5 (ja) |
WO (1) | WO2013179648A1 (ja) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10439054B2 (en) | 2017-06-29 | 2019-10-08 | Kabushiki Kaisha Toshiba | Insulated gate bipolar transistor |
US10468512B2 (en) | 2017-09-20 | 2019-11-05 | Kabushiki Kaisha Toshiba | Semiconductor device with insulated gate bipolar transistor (IGBT) having multiple resistors |
US10573732B2 (en) | 2018-03-23 | 2020-02-25 | Kabushiki Kaisha Toshiba | Semiconductor device |
JP2021002620A (ja) * | 2019-06-24 | 2021-01-07 | 富士電機株式会社 | 半導体装置 |
JP2021064673A (ja) * | 2019-10-11 | 2021-04-22 | 富士電機株式会社 | 半導体装置 |
JP2021150544A (ja) * | 2020-03-19 | 2021-09-27 | 株式会社東芝 | 半導体装置及び半導体回路 |
US11349018B2 (en) | 2019-03-20 | 2022-05-31 | Kabushiki Kaisha Toshiba | Semiconductor device and semiconductor circuit |
JP2023036996A (ja) * | 2017-01-17 | 2023-03-14 | 富士電機株式会社 | 半導体装置、半導体モジュールおよび半導体装置のターンオン方法 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105226090B (zh) * | 2015-11-10 | 2018-07-13 | 株洲中车时代电气股份有限公司 | 一种绝缘栅双极晶体管及其制作方法 |
JP6414090B2 (ja) | 2016-01-27 | 2018-10-31 | 株式会社デンソー | 半導体装置 |
JP6946219B2 (ja) * | 2018-03-23 | 2021-10-06 | 株式会社東芝 | 半導体装置 |
DE112019001558T5 (de) * | 2018-03-28 | 2020-12-17 | Mitsubishi Electric Corporation | Halbleitereinheit |
JP7091204B2 (ja) | 2018-09-19 | 2022-06-27 | 株式会社東芝 | 半導体装置 |
US11101375B2 (en) | 2019-03-19 | 2021-08-24 | Kabushiki Kaisha Toshiba | Semiconductor device and method of controlling same |
JP7547780B2 (ja) * | 2020-05-15 | 2024-09-10 | 富士電機株式会社 | 半導体装置 |
JP7330155B2 (ja) | 2020-09-16 | 2023-08-21 | 株式会社東芝 | 半導体装置及び半導体回路 |
JP7330154B2 (ja) | 2020-09-16 | 2023-08-21 | 株式会社東芝 | 半導体装置及び半導体回路 |
US11916137B2 (en) * | 2021-10-27 | 2024-02-27 | Sanken Electric Co., Ltd. | Semiconductor device |
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- 2012-05-30 JP JP2012122822A patent/JP6064371B2/ja active Active
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- 2013-05-28 DE DE112013002767.4T patent/DE112013002767T5/de not_active Withdrawn
- 2013-05-28 CN CN201380028289.1A patent/CN104364907B/zh active Active
- 2013-05-28 WO PCT/JP2013/003357 patent/WO2013179648A1/ja active Application Filing
- 2013-05-28 US US14/395,868 patent/US9324848B2/en active Active
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Also Published As
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DE112013002767T5 (de) | 2015-05-21 |
CN104364907B (zh) | 2017-11-07 |
US9324848B2 (en) | 2016-04-26 |
US20150129927A1 (en) | 2015-05-14 |
WO2013179648A1 (ja) | 2013-12-05 |
CN104364907A (zh) | 2015-02-18 |
JP6064371B2 (ja) | 2017-01-25 |
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