JP2013211033A - メモリ機器のための拡張利用範囲 - Google Patents
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F3/061—Improving I/O performance
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- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
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- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
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- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
【解決手段】メモリ機器の少なくとも一つの予測された使用に関連する一つ又は複数の命令を受信することであって、前記一つ又は複数の命令は前記メモリ機器に関連する一つ又は複数の既定のアクセスプロファイルをアクティブ化するためのものであり、前記既定のアクセスプロファイルは、前記メモリ機器に格納されており、前記少なくとも一つの予測された使用のために前記メモリ機器へのアクセスがどのように構成されるのかを決定することに影響を及ぼすものであり、前記一つ又は複数の命令を受信することによって、前記少なくとも一つの予測された使用のために前記メモリ機器が使用されうるように、前記アクセスプロファイルの少なくとも一つに従って前記メモリ機器へのアクセスを構成する。
【選択図】図3
Description
本発明の実施形態に従うメモリ機器は、現在アクティブなアクセスプロファイルを格納するための別のレジスタをさらに備えてもよい。対応する既定のプロファイルのうちのいずれかであり得るこのプロファイルは、メモリ機器への現在のアクセス動作を支配する。例えば、このようなレジスタは、ホストシステムの起動中および/またはメモリ機器の電源が入っている間にアクティブになるデフォルトプロファイルを備えてもよい。このアクティブプロファイルは、メモリ機器の電源を切るまで、または本発明の実施形態に従って、別のプロファイルに置換され得るまで有効であってもよい。本発明に従うメモリ機器の実行時構成の設定可能性は、現在アクティブなプロファイルレジスタのコンテンツを、第1の組のレジスタに格納される既定のプロファイルのうちの1つに置換することによってもたらされる。したがって、新しい種類のメモリアクセスの必要性が生じる場合、コマンドは、適切なプロファイルをアクティブにするように発行されてもよい。コマンドは、デフォルトプロファイルを含むがこれに限定されない既定のアクセスプロファイルのうちのいずれかをアクティブにしてもよい。
(1)メモリ機器へのアクセスを構成するための方法であって、
前記メモリ機器に関連する1つ以上のアクセスプロファイルをアクティブにするための1つ以上のコマンドを受信することと、
前記アクセスプロファイルのうちの少なくとも1つに従って前記メモリ機器へのアクセスを構成することと、
を含む、方法。
(2)前記1つ以上のアクセスプロファイルは、ランダムモードおよびシーケンシャルモードのアクセスのうちの少なくとも1つに対応する、(1)に記載の方法。
(3)前記アクセスプロファイルは、読み取り、書き込み、消去、および変更のうちの少なくとも1つの属性操作に対応する、(2)に記載の方法。
(4)前記1つ以上のアクセスプロファイルは、前記メモリ機器の同一アドレスへの繰り返しのアクセス要求に対応するように適合される、(1)に記載の方法。
(5)前記1つ以上のアクセスプロファイルは、前記メモリ機器に関連する最適化性能を生成するように適合される、(1)に記載の方法。
(6)前記性能は、前記メモリ機器に関連するデータスループット、寿命、および電力消費のうちの少なくとも1つに従って最適化される、(5)に記載の方法。
(7)前記1つ以上のコマンドは、前記コマンドに対応する好適なアクセスプロファイルを指定するためのメタデータ部分を備える、(1)に記載の方法。
(8)特定のメモリ位置は、前記アクセスプロファイルに従って利用される、(7)に記載の方法。
(9)前記特定のメモリ位置は、特別な特徴を含む前記メモリ機器の区分を備える、(8)に記載の方法。
(10)前記特定のメモリ位置は、別々の物理メモリチップを備える、(8)に記載の方法。
(11)前記1つ以上のアクセスプロファイルは、前記メモリ機器の1つ以上のパーティションに関連する、(1)に記載の方法。
(12)前記構成することは、2つ以上のアクセスプロファイルについて並行して適合される、(1)に記載の方法。
(13)前記構成することは、eMMCのJESD84規格に従って実行される、(12)に記載の方法。
(14)メモリリソースへの同時のアクセス衝突を解決するために、アクセス優先レベルを指定することをさらに含む、(12)に記載の方法。
(15)前記メモリ機器は、大容量メモリおよびシステムメモリの両方の実装をもたらすために使用される、(1)に記載の方法。
(16)電源を入れた後に前記メモリ機器を構成するように使用されるデフォルトアクセスプロファイルをさらに備える、(1)に記載の方法。
(17)メモリ機器であって、
前記メモリ機器に関連する1つ以上の既定のアクセスプロファイルを格納するための1つ以上のレジスタと、
前記メモリ機器に関連する1つ以上のアクセスプロファイルをアクティブにするための1つ以上のコマンドを受信するための受信手段と、
前記既定のアクセスプロファイルのうちの少なくとも1つに従って、前記メモリ機器へのアクセスを構成するための構成手段と、
を備える、メモリ機器。
(18)前記1つ以上のアクセスプロファイルは、ランダムおよびシーケンシャルモードのアクセスのうちの少なくとも1つに対応する、(17)に記載のメモリ機器。
(19)前記アクセスプロファイルは、読み取り、書き込み、消去、および変更のうちの少なくとも1つの属性操作に対応する、(18)に記載のメモリ機器。
(20)前記1つ以上のアクセスプロファイルは、前記メモリ機器の同一アドレスへの繰り返しのアクセス要求に対応するように適合される、(17)に記載のメモリ機器。
(21)前記1つ以上のアクセスプロファイルは、前記メモリ機器に関連する最適化性能を生成するように適合される、(17)に記載のメモリ機器。
(22)前記性能は、前記メモリ機器に関連するデータスループット、寿命、および電力消費のうちの少なくとも1つに従って最適化される、(21)に記載のメモリ機器。
(23)前記1つ以上のコマンドは、前記コマンドに対応する好適なアクセスプロファイルを指定するためのメタデータ部分を備える、(17)に記載のメモリ機器。
(24)特定のメモリ位置は、前記アクセスプロファイルに従って利用される、(23)に記載のメモリ機器。
(25)前記特定のメモリ位置は、特別な特徴を含む前記メモリ機器の区分を備える、(24)に記載のメモリ機器。
(26)前記特定のメモリ位置は、別々の物理メモリチップを備える、(24)に記載のメモリ機器。
(27)前記1つ以上のアクセスプロファイルは、前記メモリ機器の1つ以上のパーティションに関連する、(17)に記載のメモリ機器。
(28)前記構成することは、2つ以上のアクセスプロファイルについて並行して適合される、(17)に記載のメモリ機器。
(29)前記構成することは、eMMCのJESD84規格に従って実行される、(28)に記載のメモリ機器。
(30)メモリリソースへの同時のアクセス衝突を解決するために、アクセス優先レベルを指定するための手段をさらに備える、(28)に記載のメモリ機器。
(31)前記メモリ機器は、大容量メモリおよびシステムメモリの両方の実装をもたらすために使用される、(17)に記載のメモリ機器。
(32)電源を入れた後に前記メモリ機器を構成するように使用されるデフォルトアクセスプロファイルをさらに備える、(17)に記載のメモリ機器。
(33)前記既定のアクセスプロファイルのうちの1つ以上は、前記アクセスプロファイルの新しいバージョンで更新される、(17)に記載のメモリ機器。
(34)現在アクティブなアクセスプロファイルは、指定のメモリレジスタに存在する、(17)に記載のメモリ機器。
(35)コンピュータ可読媒体上に具現化されるコンピュータプログラム製品であって、
前記メモリ機器に関連する1つ以上のアクセスプロファイルをアクティブにするための1つ以上のコマンドを受信するためのコンピュータコードと、
前記アクセスプロファイルのうちの少なくとも1つに従って前記メモリ機器へのアクセスを構成するためのコンピュータコードと、
を備える、コンピュータプログラム製品。
(36)メモリ機器にアクセスするためのシステムであって、
前記メモリ機器に関連する1つ以上のアクセスプロファイルをアクティブにするための1つ以上のコマンドを受信するためのエンティティと、
前記アクセスプロファイルのうちの少なくとも1つに従って前記メモリ機器へのアクセスを構成するためのエンティティと、
を備える、システム。
(37)メモリ機器にアクセスするためのシステムであって、
前記メモリ機器のアクセスの必要性に従って、1つ以上のコマンドを発行するためのホストと、
前記コマンドを受信し、少なくとも1つ以上のアクセスプロファイルに従って、前記メモリ機器へのアクセスを構成するためのエンティティと、
を備える、システム。
Claims (1)
- メモリ機器であって:
前記メモリ機器に関連する一つ又は複数の既定のアクセスプロファイルであって、少なくとも一つの予測された使用のために前記メモリ機器へのアクセスがどのように構成されるのかを決定することに影響を及ぼすアクセスプロファイルを格納するための一つ又は複数のレジスタと;
前記メモリ機器の少なくとも一つの予測された使用に関連する一つ又は複数の命令であって、前記メモリ機器に関連する前記一つ又は複数の既定のアクセスプロファイルをアクティブ化するための命令を受信する手段と;
前記少なくとも一つの予測された使用のために前記メモリ機器が使用されうるように、前記既定のアクセスプロファイルの少なくとも一つに従って前記メモリ機器へのアクセスを構成する構成手段と;
を有する、メモリ機器。
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US12/039,672 US8307180B2 (en) | 2008-02-28 | 2008-02-28 | Extended utilization area for a memory device |
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