JP2007158150A - 配線基板の製造方法及び電子部品実装構造体の製造方法 - Google Patents
配線基板の製造方法及び電子部品実装構造体の製造方法 Download PDFInfo
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- Y10T29/49117—Conductor or circuit manufacturing
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- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
【解決手段】ガラス不織布に樹脂を含侵させた仮基板10の配線形成領域Aの外周部に金属箔12の周縁側を接着層14で選択的に接着することにより、仮基板10上に金属箔12を仮固定し、その後に、金属箔の上にビルドアップ配線層を形成し、その構造体の接着層14より内側部分を切断することにより、金属箔12を仮基板10から分離して、金属箔の上にビルドアップ配線層が形成された配線部材を得る。
【選択図】図4
Description
図1〜図4は本発明の第1実施形態の配線基板の製造方法を順に示す断面図である。
図6及び図7は本発明の第2実施形態の電子部品実装構造体の製造方法を示す断面図である。第2実施形態では、本発明の配線基板の製造方法の技術思想に基づいて、配線基板上に電子部品を実装する好適な方法について説明する。
Claims (10)
- ガラス不織布に樹脂を含侵させた仮基板を用意する工程と、
前記仮基板上の配線形成領域の外周部に金属箔の周縁側を接着層で選択的に接着することにより、前記仮基板の少なくとも片面に前記金属箔を仮固定する工程と、
前記金属箔の上にビルドアップ配線層を形成する工程と、
前記仮基板上に前記金属箔及びビルドアップ配線層が形成された構造体の前記接着層より内側部分を切断することにより、前記金属箔を前記仮基板から分離して、前記金属箔の上に前記ビルドアップ配線層が形成された配線部材を得る工程とを有することを特徴とする配線基板の製造方法。 - 前記配線部材を得る工程の後に、前記金属箔を除去する工程をさらに有することを特徴とする請求項1に記載の配線基板の製造方法。
- 前記仮基板の熱膨張係数は30乃至50ppm/℃であり、前記ビルドアップ配線層の熱膨張係数は20乃至50ppm/℃であることを特徴とする請求項1又は2に記載の配線基板の製造方法。
- 前記金属箔を除去する工程で露出する前記ビルドアップ配線層の最下の配線層が電子部品を実装するための内部接続パッドとなり、前記ビルドアップ配線層の最上の配線層が外部接続パッドとなることを特徴とする請求項2に記載の配線基板の製造方法。
- 前記金属箔を除去する工程で露出する前記ビルドアップ配線層の最下の配線層が外部接続パッドとなり、前記ビルドアップ配線層の最上の配線層が電子部品を実装するための内部接続パッドとなることを特徴とする請求項2に記載の配線基板の製造方法。
- 前記仮基板の両面側に、前記金属箔及び前記ビルドアップ配線層が形成され、前記仮基板の両面側から前記配線部材がそれぞれ得られることを特徴とする請求項1又は2に記載の配線基板の製造方法。
- 前記金属箔及び前記ビルドアップ配線層の配線層は銅からなり、前記ビルドアップ配線層の絶縁層は樹脂からなることを特徴とする請求項3に記載の配線基板の製造方法。
- ガラス不織布に樹脂を含侵させた仮基板を用意する工程と、
前記仮基板上の配線形成領域の外周部に金属箔の周縁側を接着層で選択的に接着することにより、前記仮基板の少なくとも片面に前記金属箔を仮固定する工程と、
前記金属箔の上にビルドアップ配線層を形成する工程と、
前記仮基板上に前記金属箔及びビルドアップ配線層が形成された構造体の前記接着層より内側部分を切断することにより、前記金属箔を前記仮基板から分離して、前記金属箔の上に前記ビルドアップ配線層が形成された配線部材を得る工程と、
前記配線部材の最上の前記配線層に電子部品を電気的に接続して実装する工程と、
前記配線部材から前記金属箔を除去する工程とを有することを特徴とする電子部品実装構造体の製造方法。 - ガラス不織布に樹脂を含侵させた仮基板を用意する工程と、
前記仮基板上の配線形成領域の外周部に金属箔の周縁側を接着層で選択的に接着することにより、前記仮基板の少なくとも片面に前記金属箔を仮固定する工程と、
前記金属箔の上にビルドアップ配線層を形成する工程と、
前記ビルドアップ配線層の最上の配線層に電気的に接続される電子部品を実装する工程と、
前記仮基板上に前記金属箔及びビルドアップ配線層が形成された構造体の前記接着層より内側部分を切断することにより、前記金属箔を前記仮基板から分離して、前記金属箔上に形成された前記ビルドアップ配線層に前記電子部品が実装された配線部材を得る工程と、
前記配線部材から前記金属箔を除去する工程とを有することを特徴とする電子部品実装構造体の製造方法。 - 前記仮基板の両面側に、前記金属箔及び前記ビルドアップ配線層が形成され、前記仮基板の両面側から前記配線部材がそれぞれ得られることを特徴とする請求項8又は9に記載の電子部品実装構造体の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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JP2005353142A JP4897281B2 (ja) | 2005-12-07 | 2005-12-07 | 配線基板の製造方法及び電子部品実装構造体の製造方法 |
KR1020060108201A KR20070059945A (ko) | 2005-12-07 | 2006-11-03 | 배선 기판의 제조 방법 및 전자 부품 실장 구조체의 제조방법 |
TW095141489A TWI399153B (zh) | 2005-12-07 | 2006-11-09 | 配線基板的製造方法及電子組件安裝結構的製造方法(一) |
US11/595,916 US7543374B2 (en) | 2005-12-07 | 2006-11-13 | Method of manufacturing wiring substrate |
CNA2006101467609A CN1980542A (zh) | 2005-12-07 | 2006-11-22 | 制造布线基板的方法和制造电子元件安装结构的方法 |
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JP2005353142A JP4897281B2 (ja) | 2005-12-07 | 2005-12-07 | 配線基板の製造方法及び電子部品実装構造体の製造方法 |
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JP2007158150A true JP2007158150A (ja) | 2007-06-21 |
JP4897281B2 JP4897281B2 (ja) | 2012-03-14 |
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CN (1) | CN1980542A (ja) |
TW (1) | TWI399153B (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011040702A (ja) * | 2009-08-18 | 2011-02-24 | Kinko Denshi Kofun Yugenkoshi | コアレスパッケージ基板及びその製造方法 |
JP2013535093A (ja) * | 2010-05-20 | 2013-09-09 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | チップスタックを製造するための方法及びその方法を実施するためのキャリア |
WO2014050662A1 (ja) * | 2012-09-28 | 2014-04-03 | 日東電工株式会社 | 半導体装置の製造方法、及び、接着シート |
JPWO2014119178A1 (ja) * | 2013-01-30 | 2017-01-26 | 京セラ株式会社 | 実装構造体の製造方法 |
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Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100969412B1 (ko) * | 2008-03-18 | 2010-07-14 | 삼성전기주식회사 | 다층 인쇄회로기판 및 그 제조방법 |
US8104171B2 (en) | 2008-08-27 | 2012-01-31 | Advanced Semiconductor Engineering, Inc. | Method of fabricating multi-layered substrate |
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US8067266B2 (en) * | 2009-12-23 | 2011-11-29 | Intel Corporation | Methods for the fabrication of microelectronic device substrates by attaching two cores together during fabrication |
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US9412624B1 (en) | 2014-06-26 | 2016-08-09 | STATS ChipPAC Pte. Ltd. | Integrated circuit packaging system with substrate and method of manufacture thereof |
TWI533771B (zh) * | 2014-07-17 | 2016-05-11 | 矽品精密工業股份有限公司 | 無核心層封裝基板及其製法 |
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US9899239B2 (en) * | 2015-11-06 | 2018-02-20 | Apple Inc. | Carrier ultra thin substrate |
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04131228A (ja) * | 1990-09-25 | 1992-05-01 | Shin Kobe Electric Mach Co Ltd | 複合積層板 |
JP2004128481A (ja) * | 2002-07-31 | 2004-04-22 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
JP2004186265A (ja) * | 2002-11-29 | 2004-07-02 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
JP2004235323A (ja) * | 2003-01-29 | 2004-08-19 | Fujitsu Ltd | 配線基板の製造方法 |
WO2004105454A1 (ja) * | 2003-05-23 | 2004-12-02 | Fujitsu Limited | 配線基板の製造方法 |
JP2005166902A (ja) * | 2003-12-02 | 2005-06-23 | Hitachi Chem Co Ltd | 半導体チップ搭載基板及び半導体パッケージ、並びにそれらの製造方法 |
JP2005236244A (ja) * | 2004-01-19 | 2005-09-02 | Shinko Electric Ind Co Ltd | 回路基板の製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6391220B1 (en) * | 1999-08-18 | 2002-05-21 | Fujitsu Limited, Inc. | Methods for fabricating flexible circuit structures |
KR100891269B1 (ko) * | 2001-01-31 | 2009-04-06 | 소니 가부시끼 가이샤 | 반도체 장치 및 그 제조 방법 |
JP2004087701A (ja) | 2002-08-26 | 2004-03-18 | Nec Toppan Circuit Solutions Toyama Inc | 多層配線構造の製造方法および半導体装置の搭載方法 |
JP2005063987A (ja) | 2003-08-08 | 2005-03-10 | Ngk Spark Plug Co Ltd | 配線基板の製造方法、及び配線基板 |
-
2005
- 2005-12-07 JP JP2005353142A patent/JP4897281B2/ja active Active
-
2006
- 2006-11-03 KR KR1020060108201A patent/KR20070059945A/ko not_active Application Discontinuation
- 2006-11-09 TW TW095141489A patent/TWI399153B/zh active
- 2006-11-13 US US11/595,916 patent/US7543374B2/en active Active
- 2006-11-22 CN CNA2006101467609A patent/CN1980542A/zh active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04131228A (ja) * | 1990-09-25 | 1992-05-01 | Shin Kobe Electric Mach Co Ltd | 複合積層板 |
JP2004128481A (ja) * | 2002-07-31 | 2004-04-22 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
JP2004186265A (ja) * | 2002-11-29 | 2004-07-02 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
JP2004235323A (ja) * | 2003-01-29 | 2004-08-19 | Fujitsu Ltd | 配線基板の製造方法 |
WO2004105454A1 (ja) * | 2003-05-23 | 2004-12-02 | Fujitsu Limited | 配線基板の製造方法 |
JP2005166902A (ja) * | 2003-12-02 | 2005-06-23 | Hitachi Chem Co Ltd | 半導体チップ搭載基板及び半導体パッケージ、並びにそれらの製造方法 |
JP2005236244A (ja) * | 2004-01-19 | 2005-09-02 | Shinko Electric Ind Co Ltd | 回路基板の製造方法 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011040702A (ja) * | 2009-08-18 | 2011-02-24 | Kinko Denshi Kofun Yugenkoshi | コアレスパッケージ基板及びその製造方法 |
JP2013535093A (ja) * | 2010-05-20 | 2013-09-09 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | チップスタックを製造するための方法及びその方法を実施するためのキャリア |
WO2014050662A1 (ja) * | 2012-09-28 | 2014-04-03 | 日東電工株式会社 | 半導体装置の製造方法、及び、接着シート |
JPWO2014119178A1 (ja) * | 2013-01-30 | 2017-01-26 | 京セラ株式会社 | 実装構造体の製造方法 |
JP7474608B2 (ja) | 2020-03-09 | 2024-04-25 | アオイ電子株式会社 | 半導体装置の製造方法、および半導体封止体 |
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US7543374B2 (en) | 2009-06-09 |
TW200730064A (en) | 2007-08-01 |
JP4897281B2 (ja) | 2012-03-14 |
US20070124925A1 (en) | 2007-06-07 |
TWI399153B (zh) | 2013-06-11 |
CN1980542A (zh) | 2007-06-13 |
KR20070059945A (ko) | 2007-06-12 |
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