WO2004105454A1 - 配線基板の製造方法 - Google Patents
配線基板の製造方法 Download PDFInfo
- Publication number
- WO2004105454A1 WO2004105454A1 PCT/JP2003/006492 JP0306492W WO2004105454A1 WO 2004105454 A1 WO2004105454 A1 WO 2004105454A1 JP 0306492 W JP0306492 W JP 0306492W WO 2004105454 A1 WO2004105454 A1 WO 2004105454A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- build
- metal layer
- core substrate
- wiring board
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0391—Using different types of conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10545—Related components mounted on both sides of the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/085—Using vacuum or low pressure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
Definitions
- FIG. 1A shows a characteristic manufacturing step in the method of the present invention, in which a first metal layer 41 and a second metal layer 42 are provided on both surfaces of a support 100 with an adhesive film 40 interposed therebetween. The process of laminating and covering is shown.
- 3A shows that, with respect to the bonded body of the laminated body 120 and the core substrate 22, the outer peripheral edge of the support body 100, which is the core part of the laminated body 120, is cut.
- 2 shows a state in which the buildup layer 60 and the buildup layer 60 are separated from the laminate 120.
- vacuum suction between the first metal layer 41 and the second metal layer 42 is reduced.
- the first metal layer 41 and the second metal layer 42 can be easily separated from the contact surface by being broken. Since the pill-up layer 60 is bonded to the core substrate 22 by the pre-predator 50, a substrate 130 in which the pill-up layer 60 is bonded to the core substrate 22 is obtained as shown in FIG. 3B.
- FIG. 8 to 10 show a method of manufacturing a wiring board in which a metal foil 80 having a low coefficient of thermal expansion is incorporated in an intermediate layer of the build-up layer 60.
- FIG. 8A shows a state in which the build-up layers 60 are formed on both surfaces of the core substrate 22 up to an intermediate layer.
- the metal foil with adhesive 84 provided with the metal foil 80 having a low coefficient of thermal expansion is positioned on both sides of the core substrate 22 on which the build-up layer 60 is formed (FIG. 8B). Adhere the metal foil with adhesive 84 on both sides (Fig. 8C).
- the metal foil 80 is adhered via the adhesive layer 82 by attaching the adhesive layer 82 toward the existing pill-up layer 60. .
- FIG. 9A shows a state in which a metal foil 80 on the outermost surface is etched into a predetermined pattern by a lithography method.
- 80a is a patterned metal foil.
- FIG. 9B shows a state in which the surface of the layer on which the metal foil 80a is formed is covered with an insulating resin to form an insulating layer 46.
- the surface of the metal foil 80a may be subjected to a roughening treatment.
- FIG. 9C shows a state in which the upper wiring pattern 44 is formed so as to be electrically connected to the lower wiring pattern 44 by the build-up method. In this step, the adhesive layer 82 and the insulating layer 46a become insulating layers provided between the wiring layers.
- the metal foil 80a is formed in a pattern that does not hinder the arrangement of the vias 48 that electrically connect the wiring patterns 44 between the layers.
- FIG. 10A shows a process in which a photosensitive solder resist 54 is coated on the surface of the build-up layer 60, and is exposed and developed to expose the land portion 56.
- FIG. 10B is a process in which the land portion 5 is exposed.
- Figure 10C is a process of printing solder on the land portion 56 and forming solder bumps 59 with one solder riff opening. Is shown.
- a metal foil 80a having a low heat J3 Pang-zhang coefficient is incorporated in an intermediate layer of the build-up layer 60.
- a metal foil 80a having a low heat J3 Pang-zhang coefficient is incorporated in an intermediate layer of the build-up layer 60.
- the metal foil 80 incorporated in the build-up layer 60 is not limited to one layer, but may be provided in a plurality of layers.
- a metal having a low thermal expansion coefficient is formed by a method similar to the pill-up method.
- the metal foil 80 can be embedded, and there is an advantage that a wiring board can be manufactured by incorporating a step of incorporating the metal foil 80 into a step of forming a wiring pattern by build-up.
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2008101782975A CN101409239B (zh) | 2003-05-23 | 2003-05-23 | 布线板制造方法 |
JP2004572126A JP4143609B2 (ja) | 2003-05-23 | 2003-05-23 | 配線基板の製造方法 |
PCT/JP2003/006492 WO2004105454A1 (ja) | 2003-05-23 | 2003-05-23 | 配線基板の製造方法 |
CNB03826515XA CN100475004C (zh) | 2003-05-23 | 2003-05-23 | 布线板制造方法 |
US11/266,480 US7377030B2 (en) | 2003-05-23 | 2005-11-04 | Wiring board manufacturing method |
US12/068,992 US7935891B2 (en) | 2003-05-23 | 2008-02-14 | Wiring board manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2003/006492 WO2004105454A1 (ja) | 2003-05-23 | 2003-05-23 | 配線基板の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/266,480 Continuation US7377030B2 (en) | 2003-05-23 | 2005-11-04 | Wiring board manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004105454A1 true WO2004105454A1 (ja) | 2004-12-02 |
Family
ID=33463165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/006492 WO2004105454A1 (ja) | 2003-05-23 | 2003-05-23 | 配線基板の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7377030B2 (ja) |
JP (1) | JP4143609B2 (ja) |
CN (2) | CN100475004C (ja) |
WO (1) | WO2004105454A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007027255A (ja) * | 2005-07-13 | 2007-02-01 | Fujitsu Ltd | 半導体実装基板及びその製造方法 |
JP2007158150A (ja) * | 2005-12-07 | 2007-06-21 | Shinko Electric Ind Co Ltd | 配線基板の製造方法及び電子部品実装構造体の製造方法 |
JP2007335698A (ja) * | 2006-06-16 | 2007-12-27 | Fujitsu Ltd | 配線基板の製造方法 |
JP2012099857A (ja) * | 2012-02-06 | 2012-05-24 | Hitachi Chem Co Ltd | 回路形成用支持基板、及び半導体素子搭載用パッケージ基板の製造方法 |
KR101319358B1 (ko) * | 2005-08-29 | 2013-10-16 | 신꼬오덴기 고교 가부시키가이샤 | 다층 배선 기판 및 그 제조 방법 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4844391B2 (ja) * | 2004-05-21 | 2011-12-28 | 日本電気株式会社 | 半導体装置並びに配線基板及びその製造方法 |
JP2007335700A (ja) * | 2006-06-16 | 2007-12-27 | Fujitsu Ltd | 配線基板の製造方法 |
KR100969412B1 (ko) * | 2008-03-18 | 2010-07-14 | 삼성전기주식회사 | 다층 인쇄회로기판 및 그 제조방법 |
JP5284155B2 (ja) * | 2008-03-24 | 2013-09-11 | 日本特殊陶業株式会社 | 部品内蔵配線基板 |
US9230899B2 (en) | 2011-09-30 | 2016-01-05 | Unimicron Technology Corporation | Packaging substrate having a holder, method of fabricating the packaging substrate, package structure having a holder, and method of fabricating the package structure |
CN103066048B (zh) * | 2011-10-21 | 2015-11-25 | 欣兴电子股份有限公司 | 具有支撑体的封装基板、封装结构及其制法 |
JP6054080B2 (ja) * | 2012-07-20 | 2016-12-27 | 新光電気工業株式会社 | 支持体及びその製造方法、配線基板の製造方法、電子部品装置の製造方法、配線構造体 |
JP2014086651A (ja) * | 2012-10-26 | 2014-05-12 | Ibiden Co Ltd | プリント配線板及びプリント配線板の製造方法 |
US20140376195A1 (en) * | 2013-06-25 | 2014-12-25 | Qinglei Zhang | Methods of forming dual sided coreless package structures with land side capacitor |
JP2015035496A (ja) * | 2013-08-09 | 2015-02-19 | イビデン株式会社 | 電子部品内蔵配線板の製造方法 |
US9558790B1 (en) | 2016-03-24 | 2017-01-31 | HGST Netherlands B.V. | Hermetic sealing with high-speed transmission for hard disk drive |
CN110088895B (zh) * | 2016-12-28 | 2023-05-23 | 拓自达电线株式会社 | 散热基材、散热电路结构体及其制造方法 |
US10626646B1 (en) | 2019-05-21 | 2020-04-21 | Ford Global Technologies, Llc | Self-contained door hinge release |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0265198A (ja) * | 1988-08-31 | 1990-03-05 | Mitsui Mining & Smelting Co Ltd | リジッドフレキシブルプリント配線板の製造方法 |
JPH0382193A (ja) * | 1989-08-25 | 1991-04-08 | Hitachi Chem Co Ltd | マルチワイヤー配線板の製造方法 |
JPH07106769A (ja) * | 1993-10-08 | 1995-04-21 | Ibiden Co Ltd | 電子部品搭載用多層基板の製造方法 |
JP2001267747A (ja) * | 2000-03-22 | 2001-09-28 | Nitto Denko Corp | 多層回路基板の製造方法 |
JP2002185139A (ja) * | 2000-12-15 | 2002-06-28 | Ibiden Co Ltd | プリント配線板及びその製造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6433945A (en) | 1987-07-29 | 1989-02-03 | Hitachi Chemical Co Ltd | Wiring board for mounting semiconductor element |
KR20000057687A (ko) * | 1996-12-19 | 2000-09-25 | 엔도 마사루 | 프린트 배선판 및 그 제조방법 |
US5798563A (en) * | 1997-01-28 | 1998-08-25 | International Business Machines Corporation | Polytetrafluoroethylene thin film chip carrier |
JP3724954B2 (ja) * | 1997-08-29 | 2005-12-07 | 株式会社東芝 | 電子装置および半導体パッケージ |
US7059049B2 (en) * | 1999-07-02 | 2006-06-13 | International Business Machines Corporation | Electronic package with optimized lamination process |
JP2001026747A (ja) | 1999-07-13 | 2001-01-30 | Kansai Paint Co Ltd | 有機溶剤系塗料組成物及びその塗膜を形成する方法 |
JP2001237512A (ja) * | 1999-12-14 | 2001-08-31 | Nitto Denko Corp | 両面回路基板およびこれを用いた多層配線基板ならびに両面回路基板の製造方法 |
US6497943B1 (en) * | 2000-02-14 | 2002-12-24 | International Business Machines Corporation | Surface metal balancing to reduce chip carrier flexing |
JP2002043500A (ja) | 2000-05-17 | 2002-02-08 | Ngk Spark Plug Co Ltd | 配線基板 |
JP4863557B2 (ja) | 2001-03-07 | 2012-01-25 | イビデン株式会社 | 多層プリント配線板の製造方法 |
TW564533B (en) * | 2002-10-08 | 2003-12-01 | Siliconware Precision Industries Co Ltd | Warpage-preventing substrate |
JP3811680B2 (ja) * | 2003-01-29 | 2006-08-23 | 富士通株式会社 | 配線基板の製造方法 |
-
2003
- 2003-05-23 JP JP2004572126A patent/JP4143609B2/ja not_active Expired - Fee Related
- 2003-05-23 CN CNB03826515XA patent/CN100475004C/zh not_active Expired - Fee Related
- 2003-05-23 WO PCT/JP2003/006492 patent/WO2004105454A1/ja active Application Filing
- 2003-05-23 CN CN2008101782975A patent/CN101409239B/zh not_active Expired - Fee Related
-
2005
- 2005-11-04 US US11/266,480 patent/US7377030B2/en not_active Expired - Fee Related
-
2008
- 2008-02-14 US US12/068,992 patent/US7935891B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0265198A (ja) * | 1988-08-31 | 1990-03-05 | Mitsui Mining & Smelting Co Ltd | リジッドフレキシブルプリント配線板の製造方法 |
JPH0382193A (ja) * | 1989-08-25 | 1991-04-08 | Hitachi Chem Co Ltd | マルチワイヤー配線板の製造方法 |
JPH07106769A (ja) * | 1993-10-08 | 1995-04-21 | Ibiden Co Ltd | 電子部品搭載用多層基板の製造方法 |
JP2001267747A (ja) * | 2000-03-22 | 2001-09-28 | Nitto Denko Corp | 多層回路基板の製造方法 |
JP2002185139A (ja) * | 2000-12-15 | 2002-06-28 | Ibiden Co Ltd | プリント配線板及びその製造方法 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007027255A (ja) * | 2005-07-13 | 2007-02-01 | Fujitsu Ltd | 半導体実装基板及びその製造方法 |
KR101319358B1 (ko) * | 2005-08-29 | 2013-10-16 | 신꼬오덴기 고교 가부시키가이샤 | 다층 배선 기판 및 그 제조 방법 |
US9040836B2 (en) | 2005-08-29 | 2015-05-26 | Shinko Electric Industries Co., Ltd. | Multilayered wiring board and method for fabricating the same |
JP2007158150A (ja) * | 2005-12-07 | 2007-06-21 | Shinko Electric Ind Co Ltd | 配線基板の製造方法及び電子部品実装構造体の製造方法 |
JP2007335698A (ja) * | 2006-06-16 | 2007-12-27 | Fujitsu Ltd | 配線基板の製造方法 |
JP2012099857A (ja) * | 2012-02-06 | 2012-05-24 | Hitachi Chem Co Ltd | 回路形成用支持基板、及び半導体素子搭載用パッケージ基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US7935891B2 (en) | 2011-05-03 |
CN101409239A (zh) | 2009-04-15 |
US7377030B2 (en) | 2008-05-27 |
JPWO2004105454A1 (ja) | 2006-07-20 |
CN100475004C (zh) | 2009-04-01 |
CN101409239B (zh) | 2011-10-05 |
CN1771770A (zh) | 2006-05-10 |
US20080142256A1 (en) | 2008-06-19 |
JP4143609B2 (ja) | 2008-09-03 |
US20060112544A1 (en) | 2006-06-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7935891B2 (en) | Wiring board manufacturing method | |
JP3811680B2 (ja) | 配線基板の製造方法 | |
JP3615727B2 (ja) | 半導体装置用パッケージ | |
JP5000809B2 (ja) | 多層印刷回路基板及びその製造方法並びに多層印刷回路基板を利用したbga半導体パッケージ | |
TWI475932B (zh) | 帶有補強材之配線基板 | |
JP4332162B2 (ja) | 配線基板の製造方法 | |
TWI413475B (zh) | 電氣結構製程及電氣結構 | |
JP2012191204A (ja) | プリント配線板の製造方法 | |
TW201349957A (zh) | 多層電路板及其製作方法 | |
JP2011199077A (ja) | 多層配線基板の製造方法 | |
JP5179856B2 (ja) | 配線基板内蔵用部品及びその製造方法、配線基板 | |
US8487192B2 (en) | Printed wiring board and method for manufacturing the same | |
JP4460341B2 (ja) | 配線基板およびその製造方法 | |
KR20070068268A (ko) | 배선 기판의 제조 방법 | |
KR101905879B1 (ko) | 인쇄회로기판 및 그의 제조 방법 | |
JP4597561B2 (ja) | 配線基板およびその製造方法 | |
JP2002151853A (ja) | 多層配線基板とその製造方法 | |
JP4610633B2 (ja) | 配線基板の製造方法 | |
KR100782956B1 (ko) | 배선 기판의 제조 방법 | |
KR100796981B1 (ko) | 인쇄회로기판 제조방법 | |
KR100801949B1 (ko) | 배선 기판의 제조 방법 | |
JP6387226B2 (ja) | 複合基板 | |
JP2004214273A (ja) | 片面積層配線基板の製造方法 | |
KR101044123B1 (ko) | 기판 제조용 캐리어 부재 및 이를 이용한 기판의 제조방법 | |
JP2005079108A (ja) | 配線基板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CN JP KR US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2004572126 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 11266480 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1020057021973 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2003826515X Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 1020057021973 Country of ref document: KR |
|
WWP | Wipo information: published in national office |
Ref document number: 11266480 Country of ref document: US |