CN101409239A - 布线板制造方法 - Google Patents

布线板制造方法 Download PDF

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Publication number
CN101409239A
CN101409239A CNA2008101782975A CN200810178297A CN101409239A CN 101409239 A CN101409239 A CN 101409239A CN A2008101782975 A CNA2008101782975 A CN A2008101782975A CN 200810178297 A CN200810178297 A CN 200810178297A CN 101409239 A CN101409239 A CN 101409239A
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China
Prior art keywords
core substrate
wiring
accumulation horizon
wiring plate
expansion
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CNA2008101782975A
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CN101409239B (zh
Inventor
首藤贵志
高野宪治
饭田宪司
阿部健一郎
新居启二
濑山清隆
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Fujitsu Ltd
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Fujitsu Ltd
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Abstract

本发明涉及制造布线板的方法，所述布线板包括：堆积层，所述堆积层内布线图案借由绝缘层堆叠；和核心基板，所述核心基板独立于堆积层而形成，所述方法包括以下步骤：在板状支撑上独立形成堆积层；将核心基板电连接到支撑上堆积层的布线图案上；和从堆积层上去除支撑从而形成布线板，所述布线板中堆积层被连接到核心基板上。通过独立形成堆积层和核心基板，有效地展示其特性的布线板可以被生产。

Description

布线板制造方法
本申请是富士通株式会社于2003年5月23日申请的、申请号为03826515X、发明名称为“布线板制造方法”的发明专利申请的分案申请。
技术领域
本发明涉及布线板制造方法，更准确地涉及制造具有高布线密度、低的热膨胀系数和高硬度的布线板的方法。
背景技术
图12和13中显示了传统的布线板制造方法，其中在核心基板的两个侧面通过堆积工艺形成布线图案。
图12中显示了核心基板22的制作过程，其中布线图案在所述核心基板的两个侧面上形成。图12A中显示了基板10，其中铜薄膜粘接在所述基板的两个侧面上。基板10通过粘接铜薄膜11到板部件10a的两个侧面上而形成，其中板部件10a由含有玻璃布的环氧树脂制成。在图12B中，通过钻孔机在基板10中钻通孔12。在图12C中，通孔的内表面被镀(铜)，从而布线图案被电连接，所述布线图案将形成于基板10的两个侧面上。铜层14被镀在通孔的内表面上。
在图12D中，通孔12被树脂填充物16填充。在图12E中，通过覆镀，基板10的两个侧面被覆盖上铜。采用这种结构，包括树脂填充物16端面在内的基板10的两个侧面全部被覆盖了铜层18。在图12F中，通过刻蚀铜层14和18以及基板10的铜薄膜11，形成布线图案20，从而能够制作核心基板22。
图13中显示了在核心基板22的两个侧面上叠层布线板图案的过程。在图13A中，采用堆积工艺在核心基板24的两个侧面上形成布线图案24。标号26代表绝缘层，符号28代表在不同层中电连接布线图案24的通道。在图13B中，光敏的焊料抗蚀剂30被应用到堆积层的表面上，且所述抗蚀剂30被曝光和显影。在图13C中，布线图案24的表面被非电镀地涂覆镍和金，布线图案24的曝光部分被镀层32保护。在图13D中，焊接突起34在布线图案24的电极上形成，而且在核心基板22的两个侧面都层叠布线图案24，从而可以制造布线板36。
由于核心基板36的基板10由硬的包含玻璃布的树脂制成，因此核心基板具有高的硬度。然而，在传统的布线板制造方法中，其中布线图案24是采用堆积工艺在核心基板22上层叠的，所述核心基板22起支撑的作用，核心基板22的通孔12之间的距离不能比规定的距离更短，因此布线密度不会高。
布线板的电特性可以通过减小其厚度而被提高，因此需要薄的布线板。然而，如果核心基板制作得薄，则需要特殊的输送机构，且布线板的硬度被降低，结果使得布线板将由于在形成绝缘层、布线图案等的步骤中产生的应力而起皱或起波纹，而且布线密度不会高。此外，如果核心基板制作得薄，布线板和半导体芯片之间的热膨胀系数之间的差异很大，因此它们之间的热应力必定很大。为了使布线板的热膨胀系数与半导体芯片的热膨胀系数接近，热膨胀系数低且近似等于半导体芯片的热膨胀系数的金属核心基板被应用，但核心基板和堆积层之间的热应力在堆积层中产生裂纹。
因此，本发明已发明来解决上述问题，本发明的目的是提供布线板制造方法，所述方法能够形成高密度的布线图案，从而与高度集成的半导体芯片相协调，抑制布线板的热膨胀，并增加布线板的硬度从而抑制和阻止布线板和半导体芯片之间的热应力。
发明内容
在本发明中，制造布线板的方法，所述布线板包括：堆积层，其中布线图案堆叠有绝缘层；和核心基板，所述核心基板是与堆积层独立形成的，所述方法包括以下步骤：在板状支撑上独立形成堆积层；将核心基板电连接到支撑上堆积层的布线图案上；和从堆积层上去除支撑从而形成布线板，其中堆积层被连接到核心基板。
由于堆积层和核心基板独立形成，因此堆积层不受到核心基板上所钻通孔的尺寸等的限制，从而布线图案可以以高密度形成。通过选择材料和生产工艺核心基板的硬度能够增加。通过有效地利用堆积层和核心基板的有利特性，具有高布线密度、低的热膨胀系数和高的硬度的布线板能够被生产。
在制造布线板的另一个方法中，其中在核心基板的两个侧面形成堆积层，热膨胀系数低于铜的金属薄膜包含在堆积层中并位于不与布线图案相互作用的位置。采用这种方法，具有低热膨胀系数的金属薄膜被包含在堆积层中，从而布线板的热膨胀系数能制得更低而且布线板与半导体芯片之间热应力能被抑制。
附图说明
图1A-D是在支撑的两个侧面上形成堆积层的步骤的说明视图；图2A和B是将由支撑和堆积层组成的叠层基体连接到核心基板的步骤的说明视图；图3A-D是将由核心基板和堆积层组成的连接基体与叠层基体分离的步骤的说明视图；图4A-C是形成由核心基板和堆积层组成的布线板的步骤的说明视图；图5是半导体器件的截面视图，其中半导体芯片被安放在布线板上；图6A-D是装配具有低的热膨胀系数的金属薄膜到堆积层中的步骤的说明视图；图7A-C是制作包含金属薄膜的布线板的步骤的说明视图；图8A-C是显示组装金属薄膜到堆积层中的另一个工艺的说明视图；图9A-C是形成包含金属薄膜的堆积层的步骤的说明视图；图10A-C是制作包含金属薄膜的布线板的步骤的说明视图；图11是半导体器件的截面视图，其中半导体芯片被安放在布线板上；图12A-F是制作传统核心基板的说明视图；图13A-D是制作传统布线板的说明视图，其中在核心基板的两个侧面上形成堆积层。
实施方式
(实施方式1)
图1-4显示本发明的布线板制造方法。图1A显示所述方法的特征步骤，其中第一金属层41和第二金属层42被粘合剂薄膜40分别粘接到支撑100的两个侧面上。
支撑100被用作基础，在所述支撑100上采用堆积工艺形成布线图案，且所述支撑100由具有足够硬度从而在形成堆积层时不变形的材料制成。在本实施方式中，支撑100的基础部件100a为环氧树脂板，所述板包含玻璃布且所述板厚度为0.3-0.4mm，支撑100的两个侧面上由铜薄膜11覆盖，所述铜薄膜11的厚度为9μm。支撑100是大的板，在支撑100内能够形成大量布线板。
粘合剂薄膜40之一将第一金属层41粘接和固定在支撑100上，另一个薄膜将第二金属层42的外部边缘部分粘接在支撑100上。因此，粘合剂薄膜40全部覆盖支撑100的两个侧面，而且第一金属层41和第二金属层42的尺寸被设计为使第一金属层41的外部边缘稍微位于第二金属层42的外部边缘之内。
在本实施方式中，第一金属层41是具有18μm厚度的铜薄膜；第二金属层42由具有18μm厚度的铜薄膜和中间阻挡层组成，所述阻挡层位于铜薄膜之间并由不被刻蚀铜的溶剂刻蚀的诸如Cr、Ti、Ni的金属制成。
在图1B中，第一金属层41和第二金属层42被分别用粘合剂薄膜40真空热压到支撑100的两个侧面上。在如图1A中所示的真空热压过程中，第一金属层41和第二金属层42被堆叠在粘合剂薄膜40上，并采用真空吸附整个工件进行加热和加压。通过执行真空热压，第一金属层41被粘合剂层40a粘接在铜薄膜11的表面上，第二金属层42的外部边缘部分被粘合剂层40a粘接在铜薄膜110上。此时，第一金属层41和第二金属层42被相互真空吸附。如果在第一金属层41和第二金属层42之间的真空状态被打破，第一金属层41和第二金属层42被相互分离。
在图1C中，采用刻蚀第二金属层42的外部铜薄膜形成布线图案43。由于第二金属层42具有由不被刻蚀铜的溶剂刻蚀的金属制成的中间阻挡层42a，因此采用简化的方法通过刻蚀铜薄膜能够容易地形成布线图案42。
在图1D中，采用堆积工艺在支撑100的两个侧面上布线图案44被进一步形成，在所示支撑100上布线图案43已被形成。标号46代表绝缘层；标号48代表通路。在本实施方式中，通路48是被填充的通路，而且柱状通路48被垂直连接。
图2显示分别将由图12中所示步骤形成的核心基板22连接到叠层基体120的两个表面上的步骤，在所述叠层基体中堆积层60被形成在支撑100的两个侧面上。如上所述，通过钻孔装置在核心基板22内钻通孔，通孔的内表面被涂镀，且在基板10的两个侧面内形成布线图案20。
预浸渍体50被用于将核心基板22连接到叠层基体120的两个侧面上。预浸渍体50具有用于容纳导电膏52的孔，所述导电膏52被用于将核心基板22电连接到堆积层60，导电膏52被填充在容纳孔中。注意，由热塑性树脂等制成的粘合剂薄膜可被用于替代预浸渍体50，而且其它导电材料，例如焊料，可被用于替代导电膏52。
预浸渍体50和核心基板22被恰当地放置在叠层基体120的两个侧面上(图2A)，核心基板22通过预浸渍体50被连接到叠层基体120上(图2B)。采用这种结构，叠层基体120的布线图案44和核心基板22的布线图案20可以通过导电膏52实现电连接。
图3显示从叠层基体120和核心基板22的连接基体上分离基板130的步骤，在所述基板130内堆积层60形成在核心基板22的两个侧面上。叠层基体120和核心基板22的连接基体被显示在图3A中，支撑100的外部边缘部分、切口、核心基板22和堆积层60被与叠层基体120分离，所述支撑100为叠层基体120的核心部分。通过沿位于第一金属层41的外部边缘的稍微靠里的线切割连接的基体，第一金属层41和第二金属层42之间的真空状态被打破，从而第一金属层41和第二金属层42能够被容易地分离。由于堆积层60通过预浸渍体50连接到核心基板22上，因此基板130可以如在图3B中所示一样制作，所述基板130内堆积层60与核心基板22整成在一起。
接下来，通过刻蚀将第二金属层42的铜薄膜42b去除(图3C)，所述铜薄膜42b暴露在基板130的表面上，而且通过去除铜薄膜42b，暴露的中间阻挡层42a也被去除(图3D)。由于中间阻挡层42a由在刻蚀铜的溶剂中不被刻蚀的金属制成，因此铜薄膜42b或者中间阻挡层42a可以通过刻蚀被选择性地去除。
图4显示完成布线板的步骤，在所述布线板中在与核心基板22集成的堆积层60的外部表面上形成电极。在图4A中，在堆积层60的外部表面上，光敏的焊接抗蚀剂54被应用、曝光并显影，从而形成焊接区56，在所述焊接区56上将形成电极，而且布线图案20被暴露，所述布线图案20形成于核心基板22的底面内。在图4B中，焊接区56和在核心基板22的底面内形成的布线图案20被保护层58保护，所述保护层58被使用镍和金非电镀涂镀；在图4C中，通过焊料印刷和焊料回流在焊接区56上形成焊接突起59，所述焊接突起59起电极的作用。
在图4C中显示的基板是大的板，因此通过切割大板能够获得大量的布线板。
在本实施方式中，堆积层60，所述堆积层60为布线板布线层，和核心基板22，所述基板为布线板的核心，被独立制备，而且在下面的步骤中堆积层60和核心基板22被集成，从而可以制作布线板。通过独立制备堆积层60和核心基板22，当堆积层60形成时，布线图案44可在不受到核心基板22的限制的情况下形成；通过堆积工艺布线图案44可以被形成具有高的布线密度。在需求的硬度的基础上，核心基板22的材料厚度可被选择。也就是，通过本实施方式的方法，用于安放半导体芯片的具有高布线密度、高的硬度的布线板可以被安全地制造。
注意，在本实施方式中，通孔和布线图案20形成于核心基板22内，但核心基板22可以没有通孔和没有布线图案。因此，电传导装置，例如，导电膏52，不需要在预浸渍体50中提供。
半导体器件，所述半导体器件中半导体芯片72被安放在通过本实施方式的方法生产的布线板70上，被显示在图5中。在所述半导体器件中，核心基板22具有元件孔10b，所述元件孔10b与半导体芯片72的安放位置相对应，电流元件74被提供在半导体芯片72的较低一侧。通过在核心基板22内形成元件孔10b，电流元件74，例如，电容器，可以仅通过堆积层60而被电连接到半导体芯片72上，从而包括元件孔10b的布线板的部分可以被充分地做薄，将电流元件74连接到半导体芯片72的线的长度可以更短，而且半导体器件的高频特性可以被提高。
(实施方式2)
在本实施方式中，通过在图12中所示的传统方法生产核心基板10，然后具有低热膨胀系数的金属薄膜被放入到堆积层内，从而布线板的热膨胀系数可以接近于半导体芯片的热膨胀系数。
在图6A中，在核心基板22的两个侧面上形成堆积层60。标号44代表布线图案；标号46代表绝缘层；标号48代表通路。
在图6B中，通过例如钻孔机、激光刻蚀的适当的方法形成粘合金属薄膜84、粘合层82和孔84a，所述薄膜84由例如金属合金42的金属薄膜80构成，所述金属合金42的热膨胀系数比铜的热膨胀系数低。通过形成孔84a，当粘合金属薄膜被粘接在堆积层60上时，粘合金属薄膜84不与堆积层60的布线图案44相互作用。
在图6C中，粘合金属薄膜84被恰当地相对于核心基板22定位；在图6D中，粘合金属薄膜84被热压在核心基板22上。
在图7A中，在堆积层60的外面，光敏焊接抗蚀剂54被应用、曝光并显影，从而焊接区56被暴露。金属薄膜80被焊接抗蚀剂54覆盖并被组合到堆积层60内。在图7B中，焊接区56和在核心基板22的底面内形成的布线图案44的被暴露部分由保护层58保护。在图7C中，通过焊料印刷和焊料回流在焊接区56上形成焊接突起59，所述焊接突起59起电极的作用。
在本实施方式中，金属薄膜80被放入到在核心基板22的两个侧面上形成的堆积层60内，所述金属薄膜80的热膨胀系数低，结果使得堆积层60的热膨胀系数能够做得更低，而且布线板得热膨胀系数可以与半导体芯片的热膨胀系数接近。在本实施方式中，具有低热膨胀系数的金属薄膜80被放入到最外面的堆积层60内。在金属薄膜80放入在堆积层60内的情况中，最好是放置在最外面的堆积层60内。
图8-10显示将具有低热膨胀系数的金属薄膜80组合到中间的堆积层60内的步骤。
在图8A中，在核心基板22的两个侧面上形成堆积层60，每层所述堆积层60都形成一半。包含金属薄膜80的粘合金属薄膜84被恰当的相对于在核心基板22的两个侧面上形成的堆积层60定位(图8B)，然后粘合金属薄膜84被粘接在核心基板22的两个侧面上(图8C)。当粘合金属薄膜84被粘接时，粘合层60与堆积层60相对，结果使得可以通过粘合层82使金属薄膜80被粘接。
在图9A中，通过照相平版印刷术，最外面的金属薄膜80被刻蚀以形成预定的图案。标号80a代表图案化的金属薄膜。在图9b中，包括金属薄膜80a的最外层被绝缘层46覆盖，所述绝缘层46由绝缘树脂制成。为了使绝缘层46与金属薄膜80a紧紧接触，可使金属薄膜80a的表面变粗糙。在图9C中，通过堆积工艺，在内部堆积层60上，分别形成并电连接外部堆积层60。在该步骤中，粘合层82和绝缘层46a起在布线层之间的绝缘层作用。金属层80a被形成为预定图案，从而不干扰通路48，所述通路48连接不同层中的布线图案44。
在图10A中，在堆积层60的外面，光敏焊接抗蚀剂54被应用、曝光并显影，从而暴露焊接区56；在图10B中，焊接区56和布线图案44的暴露部分被涂镀层58保护；在图10C中，通过焊料印刷和焊料回流在焊接区56上形成焊接突起59。
通过本实施方式的方法，布线板可以被生产，所述布线板的中间堆积层60包含具有低热膨胀系数的金属薄膜80a。通过将金属薄膜80a放入到中间的堆积层60内，布线板的热膨胀系数可以与半导体芯片的热膨胀系数接近。注意，金属薄膜80可以被放入到大量的堆积层60内。
在本实施方式中，当在核心基板22的两个侧面上形成堆积层时，通过类似于所述的堆积工艺的方法，具有低热膨胀系数的金属薄膜80可以被组合在堆积层60内，而且组合金属薄膜80的步骤可以在形成布线图案的同时通过堆积工艺进行。
图11显示半导体器件，在所述半导体器件中半导体芯片72被安放在包含具有低热膨胀系数的金属薄膜80的布线板上。在所述布线板内，金属薄膜80被放入到最外面的堆积层60内。通过放入具有低热膨胀系数的金属薄膜80，布线板的热膨胀系数可以与半导体芯片的热膨胀系数接近，半导体芯片和布线板之间的热应力可以被抑制，而且高可靠性的半导体器件可以被生产。

Claims (2)

1.一种制造布线板的方法，其中在核心基板的两侧上形成堆积层，其中在堆积层中不受布线图案影响的位置处包括热膨胀系数低于铜的热膨胀系数的多个金属膜。
2.根据权利要求1的方法，其中所述金属膜中的每一个具有在其上施加粘接剂的一个侧面，并且被层叠在所述堆积层上。
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