JP2003520450A - アルミニウム、銅、金及び銀の種層を設けるプロセス - Google Patents
アルミニウム、銅、金及び銀の種層を設けるプロセスInfo
- Publication number
- JP2003520450A JP2003520450A JP2001553582A JP2001553582A JP2003520450A JP 2003520450 A JP2003520450 A JP 2003520450A JP 2001553582 A JP2001553582 A JP 2001553582A JP 2001553582 A JP2001553582 A JP 2001553582A JP 2003520450 A JP2003520450 A JP 2003520450A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- depositing
- level
- barrier
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76859—After-treatment introducing at least one additional element into the layer by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
- H01L2221/1084—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L2221/1089—Stacks of seed layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/484,002 | 2000-01-18 | ||
US09/484,002 US6376370B1 (en) | 2000-01-18 | 2000-01-18 | Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy |
PCT/US2001/001634 WO2001054192A1 (en) | 2000-01-18 | 2001-01-18 | Process for providing seed layers for aluminium, copper, gold and silver metallurgy |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2003520450A true JP2003520450A (ja) | 2003-07-02 |
JP2003520450A5 JP2003520450A5 (ko) | 2007-12-06 |
Family
ID=23922330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001553582A Pending JP2003520450A (ja) | 2000-01-18 | 2001-01-18 | アルミニウム、銅、金及び銀の種層を設けるプロセス |
Country Status (6)
Country | Link |
---|---|
US (4) | US6376370B1 (ko) |
JP (1) | JP2003520450A (ko) |
KR (1) | KR100491068B1 (ko) |
AU (1) | AU2001229584A1 (ko) |
DE (1) | DE10194958B4 (ko) |
WO (1) | WO2001054192A1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012064953A (ja) * | 2003-03-20 | 2012-03-29 | Toshiba Mobile Display Co Ltd | 配線の形成方法及びその配線を有する表示装置の形成方法 |
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US6429120B1 (en) * | 2000-01-18 | 2002-08-06 | Micron Technology, Inc. | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals |
US6541858B1 (en) * | 1998-12-17 | 2003-04-01 | Micron Technology, Inc. | Interconnect alloys and methods and apparatus using same |
US20020127845A1 (en) * | 1999-03-01 | 2002-09-12 | Paul A. Farrar | Conductive structures in integrated circuits |
US6420262B1 (en) | 2000-01-18 | 2002-07-16 | Micron Technology, Inc. | Structures and methods to enhance copper metallization |
US7262130B1 (en) * | 2000-01-18 | 2007-08-28 | Micron Technology, Inc. | Methods for making integrated-circuit wiring from copper, silver, gold, and other metals |
US7211512B1 (en) * | 2000-01-18 | 2007-05-01 | Micron Technology, Inc. | Selective electroless-plated copper metallization |
US6376370B1 (en) * | 2000-01-18 | 2002-04-23 | Micron Technology, Inc. | Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy |
JP3548488B2 (ja) * | 2000-03-13 | 2004-07-28 | 沖電気工業株式会社 | 強誘電体を用いた半導体装置の製造方法 |
US6674167B1 (en) * | 2000-05-31 | 2004-01-06 | Micron Technology, Inc. | Multilevel copper interconnect with double passivation |
US6423629B1 (en) * | 2000-05-31 | 2002-07-23 | Kie Y. Ahn | Multilevel copper interconnects with low-k dielectrics and air gaps |
US6710452B1 (en) * | 2000-07-19 | 2004-03-23 | Advanced Micro Devices, Inc. | Coherent diffusion barriers for integrated circuit interconnects |
US7224063B2 (en) * | 2001-06-01 | 2007-05-29 | International Business Machines Corporation | Dual-damascene metallization interconnection |
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JP2003100757A (ja) * | 2001-09-27 | 2003-04-04 | Toshiba Corp | 半導体装置およびその製造方法 |
US6727177B1 (en) | 2001-10-18 | 2004-04-27 | Lsi Logic Corporation | Multi-step process for forming a barrier film for use in copper layer formation |
US7696092B2 (en) * | 2001-11-26 | 2010-04-13 | Globalfoundries Inc. | Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect |
US6703307B2 (en) | 2001-11-26 | 2004-03-09 | Advanced Micro Devices, Inc. | Method of implantation after copper seed deposition |
US6703308B1 (en) | 2001-11-26 | 2004-03-09 | Advanced Micro Devices, Inc. | Method of inserting alloy elements to reduce copper diffusion and bulk diffusion |
US6835655B1 (en) | 2001-11-26 | 2004-12-28 | Advanced Micro Devices, Inc. | Method of implanting copper barrier material to improve electrical performance |
US6861349B1 (en) * | 2002-05-15 | 2005-03-01 | Advanced Micro Devices, Inc. | Method of forming an adhesion layer with an element reactive with a barrier layer |
US6727175B2 (en) * | 2002-08-02 | 2004-04-27 | Micron Technology, Inc. | Method of controlling metal formation processes using ion implantation, and system for performing same |
US7494894B2 (en) * | 2002-08-29 | 2009-02-24 | Micron Technology, Inc. | Protection in integrated circuits |
US6770559B1 (en) * | 2002-10-29 | 2004-08-03 | Advanced Micro Devices, Inc. | Method of forming wiring by implantation of seed layer material |
US6852627B2 (en) * | 2003-03-05 | 2005-02-08 | Micron Technology, Inc. | Conductive through wafer vias |
US7022579B2 (en) * | 2003-03-14 | 2006-04-04 | Micron Technology, Inc. | Method for filling via with metal |
US6740392B1 (en) * | 2003-04-15 | 2004-05-25 | Micron Technology, Inc. | Surface barriers for copper and silver interconnects produced by a damascene process |
US20050006770A1 (en) * | 2003-07-08 | 2005-01-13 | Valeriy Sukharev | Copper-low-K dual damascene interconnect with improved reliability |
US7220665B2 (en) * | 2003-08-05 | 2007-05-22 | Micron Technology, Inc. | H2 plasma treatment |
JP3954998B2 (ja) * | 2003-08-11 | 2007-08-08 | ローム株式会社 | 半導体装置およびその製造方法 |
US7169706B2 (en) * | 2003-10-16 | 2007-01-30 | Advanced Micro Devices, Inc. | Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition |
US7989956B1 (en) * | 2004-09-03 | 2011-08-02 | Advanced Micro Devices, Inc. | Interconnects with improved electromigration reliability |
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CN106847736B (zh) | 2011-11-08 | 2020-08-11 | 因特瓦克公司 | 基板处理系统和方法 |
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US9269668B2 (en) * | 2014-07-17 | 2016-02-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect having air gaps and polymer wrapped conductive lines |
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US9704804B1 (en) | 2015-12-18 | 2017-07-11 | Texas Instruments Incorporated | Oxidation resistant barrier metal process for semiconductor devices |
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US10685869B2 (en) * | 2018-10-19 | 2020-06-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device and method of forming the same |
KR102202032B1 (ko) * | 2019-03-19 | 2021-01-13 | 하이엔드테크놀로지(주) | 반도체 소자의 제조 방법 |
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Also Published As
Publication number | Publication date |
---|---|
US6376370B1 (en) | 2002-04-23 |
KR100491068B1 (ko) | 2005-05-24 |
US20020109233A1 (en) | 2002-08-15 |
DE10194958B4 (de) | 2006-08-17 |
US7394157B2 (en) | 2008-07-01 |
AU2001229584A1 (en) | 2001-07-31 |
US7105914B2 (en) | 2006-09-12 |
WO2001054192A1 (en) | 2001-07-26 |
US20040169213A1 (en) | 2004-09-02 |
US7745934B2 (en) | 2010-06-29 |
US20090001586A1 (en) | 2009-01-01 |
KR20020074202A (ko) | 2002-09-28 |
DE10194958T1 (de) | 2002-12-05 |
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