JP2001338988A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JP2001338988A JP2001338988A JP2000159544A JP2000159544A JP2001338988A JP 2001338988 A JP2001338988 A JP 2001338988A JP 2000159544 A JP2000159544 A JP 2000159544A JP 2000159544 A JP2000159544 A JP 2000159544A JP 2001338988 A JP2001338988 A JP 2001338988A
- Authority
- JP
- Japan
- Prior art keywords
- crystal silicon
- germanium
- single crystal
- layer
- layer made
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
- H10D10/821—Vertical heterojunction BJTs
- H10D10/891—Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000159544A JP2001338988A (ja) | 2000-05-25 | 2000-05-25 | 半導体装置及びその製造方法 |
| TW090107891A TW502443B (en) | 2000-05-25 | 2001-04-02 | Semiconductor device and manufacturing method |
| US09/824,225 US6724019B2 (en) | 2000-05-25 | 2001-04-03 | Multi-layered, single crystal field effect transistor |
| KR1020010022292A KR100783980B1 (ko) | 2000-05-25 | 2001-04-25 | 반도체 장치 및 그 제조 방법 |
| US10/738,544 US6995054B2 (en) | 2000-05-25 | 2003-12-18 | Method of manufacturing a semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000159544A JP2001338988A (ja) | 2000-05-25 | 2000-05-25 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001338988A true JP2001338988A (ja) | 2001-12-07 |
| JP2001338988A5 JP2001338988A5 (enExample) | 2006-03-30 |
Family
ID=18663847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000159544A Pending JP2001338988A (ja) | 2000-05-25 | 2000-05-25 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6724019B2 (enExample) |
| JP (1) | JP2001338988A (enExample) |
| KR (1) | KR100783980B1 (enExample) |
| TW (1) | TW502443B (enExample) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005197405A (ja) * | 2004-01-06 | 2005-07-21 | Toshiba Corp | 半導体装置とその製造方法 |
| JP2005203798A (ja) * | 2004-01-17 | 2005-07-28 | Samsung Electronics Co Ltd | 少なくとも5面チャンネル型finfetトランジスタ及びその製造方法 |
| JP2006041516A (ja) * | 2004-07-23 | 2006-02-09 | Internatl Business Mach Corp <Ibm> | パターン形成した歪み半導体基板およびデバイス |
| JP2006513567A (ja) * | 2003-01-08 | 2006-04-20 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体構造体およびその製造方法(歪みシリコンを用いた高性能の埋め込みdram技術) |
| JP2006108468A (ja) * | 2004-10-07 | 2006-04-20 | Sony Corp | 半導体装置および半導体装置の製造方法 |
| KR100588779B1 (ko) * | 2003-12-30 | 2006-06-12 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그 제조방법 |
| JP2007509503A (ja) * | 2003-10-20 | 2007-04-12 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体構造および半導体構造を製造する方法 |
| JP2007515808A (ja) * | 2003-12-23 | 2007-06-14 | インテル・コーポレーション | Cmos用歪トランジスタの集積化 |
| CN100394614C (zh) * | 2003-12-01 | 2008-06-11 | 台湾积体电路制造股份有限公司 | 半导体装置及其形成方法 |
| US7691688B2 (en) | 2004-04-22 | 2010-04-06 | International Business Machines Corporation | Strained silicon CMOS on hybrid crystal orientations |
| WO2010134334A1 (ja) * | 2009-05-22 | 2010-11-25 | 住友化学株式会社 | 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法 |
| JP2013004968A (ja) * | 2011-06-17 | 2013-01-07 | Toshiba Corp | 半導体装置とその製造方法 |
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| US6703688B1 (en) | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6861326B2 (en) * | 2001-11-21 | 2005-03-01 | Micron Technology, Inc. | Methods of forming semiconductor circuitry |
| JP2003249451A (ja) * | 2002-02-22 | 2003-09-05 | Mitsubishi Electric Corp | エピタキシャル薄膜の形成方法 |
| DE10218381A1 (de) * | 2002-04-24 | 2004-02-26 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer oder mehrerer einkristalliner Schichten mit jeweils unterschiedlicher Gitterstruktur in einer Ebene einer Schichtenfolge |
| US7521733B2 (en) * | 2002-05-14 | 2009-04-21 | Infineon Technologies Ag | Method for manufacturing an integrated circuit and integrated circuit with a bipolar transistor and a hetero bipolar transistor |
| US7615829B2 (en) | 2002-06-07 | 2009-11-10 | Amberwave Systems Corporation | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors |
| US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| AU2003247513A1 (en) * | 2002-06-10 | 2003-12-22 | Amberwave Systems Corporation | Growing source and drain elements by selecive epitaxy |
| US6982474B2 (en) | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
| US6707106B1 (en) * | 2002-10-18 | 2004-03-16 | Advanced Micro Devices, Inc. | Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer |
| US6825506B2 (en) * | 2002-11-27 | 2004-11-30 | Intel Corporation | Field effect transistor and method of fabrication |
| JP2004245660A (ja) * | 2003-02-13 | 2004-09-02 | Seiko Instruments Inc | 小片試料の作製とその壁面の観察方法及びそのシステム |
| EP1602125B1 (en) * | 2003-03-07 | 2019-06-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Shallow trench isolation process |
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| US6882025B2 (en) * | 2003-04-25 | 2005-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained-channel transistor and methods of manufacture |
| US6867433B2 (en) | 2003-04-30 | 2005-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors |
| US7329923B2 (en) * | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
| JP2005011915A (ja) * | 2003-06-18 | 2005-01-13 | Hitachi Ltd | 半導体装置、半導体回路モジュールおよびその製造方法 |
| US20050012087A1 (en) * | 2003-07-15 | 2005-01-20 | Yi-Ming Sheu | Self-aligned MOSFET having an oxide region below the channel |
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| US20050035369A1 (en) * | 2003-08-15 | 2005-02-17 | Chun-Chieh Lin | Structure and method of forming integrated circuits utilizing strained channel transistors |
| US20050035410A1 (en) * | 2003-08-15 | 2005-02-17 | Yee-Chia Yeo | Semiconductor diode with reduced leakage |
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- 2001-04-03 US US09/824,225 patent/US6724019B2/en not_active Expired - Lifetime
- 2001-04-25 KR KR1020010022292A patent/KR100783980B1/ko not_active Expired - Fee Related
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| JP2007509503A (ja) * | 2003-10-20 | 2007-04-12 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体構造および半導体構造を製造する方法 |
| CN100394614C (zh) * | 2003-12-01 | 2008-06-11 | 台湾积体电路制造股份有限公司 | 半导体装置及其形成方法 |
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| JP2006041516A (ja) * | 2004-07-23 | 2006-02-09 | Internatl Business Mach Corp <Ibm> | パターン形成した歪み半導体基板およびデバイス |
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| JP2006108468A (ja) * | 2004-10-07 | 2006-04-20 | Sony Corp | 半導体装置および半導体装置の製造方法 |
| US7871878B2 (en) | 2004-10-07 | 2011-01-18 | Sony Corporation | Method of fabricating PMOS and NMOS transistor on the same substrate |
| US8890213B2 (en) | 2009-05-22 | 2014-11-18 | Sumitomo Chemical Company, Limited | Semiconductor wafer, electronic device, a method of producing semiconductor wafer, and method of producing electronic device |
| JP2011009718A (ja) * | 2009-05-22 | 2011-01-13 | Sumitomo Chemical Co Ltd | 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法 |
| WO2010134334A1 (ja) * | 2009-05-22 | 2010-11-25 | 住友化学株式会社 | 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法 |
| JP2013004968A (ja) * | 2011-06-17 | 2013-01-07 | Toshiba Corp | 半導体装置とその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010107550A (ko) | 2001-12-07 |
| TW502443B (en) | 2002-09-11 |
| US6724019B2 (en) | 2004-04-20 |
| US20040129982A1 (en) | 2004-07-08 |
| US20010045604A1 (en) | 2001-11-29 |
| KR100783980B1 (ko) | 2007-12-11 |
| US6995054B2 (en) | 2006-02-07 |
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