JP2001093288A - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置

Info

Publication number
JP2001093288A
JP2001093288A JP26608599A JP26608599A JP2001093288A JP 2001093288 A JP2001093288 A JP 2001093288A JP 26608599 A JP26608599 A JP 26608599A JP 26608599 A JP26608599 A JP 26608599A JP 2001093288 A JP2001093288 A JP 2001093288A
Authority
JP
Japan
Prior art keywords
data
state
logic level
storage circuit
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26608599A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001093288A5 (enExample
Inventor
Noboru Shibata
昇 柴田
Tomoharu Tanaka
智晴 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP26608599A priority Critical patent/JP2001093288A/ja
Priority to TW089117699A priority patent/TW512531B/zh
Priority to US09/664,546 priority patent/US6288935B1/en
Priority to KR10-2000-0054861A priority patent/KR100376234B1/ko
Publication of JP2001093288A publication Critical patent/JP2001093288A/ja
Priority to US09/898,032 priority patent/US6426892B2/en
Priority to US10/084,509 priority patent/US6496412B1/en
Priority to US10/658,850 priority patent/USRE40110E1/en
Publication of JP2001093288A5 publication Critical patent/JP2001093288A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5642—Multilevel memory with buffers, latches, registers at input or output

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP26608599A 1999-09-20 1999-09-20 不揮発性半導体記憶装置 Pending JP2001093288A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP26608599A JP2001093288A (ja) 1999-09-20 1999-09-20 不揮発性半導体記憶装置
TW089117699A TW512531B (en) 1999-09-20 2000-08-31 Nonvolatile semiconductor memory
US09/664,546 US6288935B1 (en) 1999-09-20 2000-09-18 Nonvolatile semiconductor memory device for storing multivalued data
KR10-2000-0054861A KR100376234B1 (ko) 1999-09-20 2000-09-19 불휘발성 반도체 기억 장치
US09/898,032 US6426892B2 (en) 1999-09-20 2001-07-05 Nonvolatile semiconductor memory device for storing multivalued data
US10/084,509 US6496412B1 (en) 1999-09-20 2002-02-28 Nonvolatile semiconductor memory device for storing multivalued data
US10/658,850 USRE40110E1 (en) 1999-09-20 2003-09-10 Nonvolatile semiconductor memory device for storing multivalued data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26608599A JP2001093288A (ja) 1999-09-20 1999-09-20 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2001093288A true JP2001093288A (ja) 2001-04-06
JP2001093288A5 JP2001093288A5 (enExample) 2004-07-29

Family

ID=17426140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26608599A Pending JP2001093288A (ja) 1999-09-20 1999-09-20 不揮発性半導体記憶装置

Country Status (4)

Country Link
US (3) US6288935B1 (enExample)
JP (1) JP2001093288A (enExample)
KR (1) KR100376234B1 (enExample)
TW (1) TW512531B (enExample)

Cited By (45)

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US6807096B2 (en) 2002-12-26 2004-10-19 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
JP2005032431A (ja) * 2003-07-11 2005-02-03 Samsung Electronics Co Ltd マルチレベルセルを有するフラッシュメモリ装置とその読み出し方法及びプログラム方法
JP2005503640A (ja) * 2001-09-17 2005-02-03 サンディスク　コーポレイション 二進モードでの多状態不揮発性メモリシステムの選択的動作
JP2006054036A (ja) * 2004-08-10 2006-02-23 Samsung Electronics Co Ltd 不揮発性メモリ装置及びその消去方法
JP2006147138A (ja) * 2004-11-19 2006-06-08 Samsung Electronics Co Ltd ページバッファおよびこれを含むマルチ−ビット不揮発性メモリ装置
JP2006277785A (ja) * 2005-03-28 2006-10-12 Toshiba Corp 不揮発性半導体記憶装置
JP2006294126A (ja) * 2005-04-11 2006-10-26 Toshiba Corp 半導体記憶装置
JP2006331614A (ja) * 2005-05-25 2006-12-07 Hynix Semiconductor Inc 面積が減少したページバッファ回路と、これを含むフラッシュメモリ装置およびそのプログラム動作方法
JP2007500411A (ja) * 2003-07-29 2007-01-11 サンディスク　コーポレイション オーバー・プログラミングされたメモリを検出する技術
JP2007012241A (ja) * 2005-06-29 2007-01-18 Hynix Semiconductor Inc フラッシュメモリ装置におけるプログラム動作の制御方法
JP2007026634A (ja) * 2005-07-12 2007-02-01 Samsung Electronics Co Ltd Ｎａｎｄフラッシュメモリ装置及びそのプログラム方法
JP2007087569A (ja) * 2005-09-23 2007-04-05 Samsung Electronics Co Ltd Ｎａｎｄフラッシュメモリ装置及びそのプログラム方法
US7212434B2 (en) 2004-04-28 2007-05-01 Kabushiki Kaisha Toshiba Semiconductor memory device with MOS transistors, each including a floating gate and a control gate, and a memory card including the same
JP2008016111A (ja) * 2006-07-05 2008-01-24 Toshiba Corp 半導体記憶装置
JP2008052899A (ja) * 2006-08-24 2008-03-06 Samsung Electronics Co Ltd マルチ−ビットフラッシュメモリー装置とそのプログラム方法
JP2008091011A (ja) * 2006-09-29 2008-04-17 Hynix Semiconductor Inc フラッシュメモリ素子とそのプログラム方法
US7362623B2 (en) 2005-03-28 2008-04-22 Kabushiki Kaisha Toshiba Semiconductor memory device
US7388780B2 (en) 2005-06-22 2008-06-17 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and control method for the semiconductor memory device
JP2008532199A (ja) * 2005-02-28 2008-08-14 マイクロン テクノロジー， インク． 不揮発性メモリデバイスにおけるマルチレベルプログラミング
US7447067B2 (en) 2005-07-29 2008-11-04 Samsung Electronics Co., Ltd. Method and apparatus for programming multi level cell flash memory device
CN101345086A (zh) * 2007-06-28 2009-01-14 三星电子株式会社 包括多电平单元的非易失性存储器设备和系统及方法
US7515466B2 (en) 2006-03-27 2009-04-07 Kabushiki Kaisha Toshiba Method for controlling semiconductor storage device comprising memory cells each configured to hold multi-bit data, and memory card provided with semiconductor storage device
JP2009104729A (ja) * 2007-10-24 2009-05-14 Toshiba Corp 不揮発性半導体記憶装置
US7539063B2 (en) 2006-09-15 2009-05-26 Samsung Electronics Co., Ltd. Flash memory devices and programming methods for the same
US7623372B2 (en) 2005-12-28 2009-11-24 Panasonic Corporation Nonvolatile semiconductor memory for storing multivalued data
US7643339B2 (en) 2006-05-18 2010-01-05 Samsung Electronics Co., Ltd. Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards
US7643340B2 (en) 2006-06-16 2010-01-05 Samsung Electronics Co., Ltd. Method and apparatus for programming multi level cell flash memory device
JP2010027163A (ja) * 2008-07-22 2010-02-04 Toshiba Corp 半導体メモリコントローラ、および半導体メモリシステム、および半導体メモリシステムの記録再生方法
JP2010520571A (ja) * 2007-03-07 2010-06-10 モサイド・テクノロジーズ・インコーポレーテッド フラッシュメモリ向け部分ブロック消去アーキテクチャ
JP2010140555A (ja) * 2008-12-11 2010-06-24 Samsung Electronics Co Ltd マルチレベルセルのデータ読出し方法
JP2010526393A (ja) * 2007-05-04 2010-07-29 モサイド・テクノロジーズ・インコーポレーテッド デュアル機能を有するマルチレベルセルアクセスバッファ
US7876613B2 (en) 2006-05-18 2011-01-25 Samsung Electronics Co., Ltd. Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards
JP2011060423A (ja) * 2010-12-24 2011-03-24 Toshiba Corp 半導体記憶装置
KR20110056408A (ko) * 2008-09-11 2011-05-27 샌디스크 코포레이션 데이터 저장 요건이 감소된 메모리를 위한 복수-패스 프로그래밍
US7962824B2 (en) 2005-05-16 2011-06-14 Panasonic Corporation Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method
JP2011526398A (ja) * 2008-07-02 2011-10-06 モサイド・テクノロジーズ・インコーポレーテッド 極性制御部を有するセル当たり複数ビット（ｍｂｃ）不揮発性メモリ装置およびメモリシステムとその書込み方法
JP2012018751A (ja) * 2010-07-09 2012-01-26 Hynix Semiconductor Inc 不揮発性メモリ素子およびそのプログラム方法
US8189398B2 (en) 2009-02-02 2012-05-29 Samsung Electronics Co., Ltd. Read operation method of memory device
CN102629491A (zh) * 2011-02-01 2012-08-08 株式会社东芝 非易失性半导体存储装置
JP2012203979A (ja) * 2011-03-23 2012-10-22 Seagate Technology Llc Ｍｌｃメモリセルのための方法および装置
JP2013012298A (ja) * 2005-07-04 2013-01-17 Samsung Electronics Co Ltd ページバッファとそれを含む不揮発性メモリ装置
US8446771B2 (en) 2010-03-15 2013-05-21 Kabushiki Kaisha Toshiba NAND nonvolatile semiconductor memory device and write method for NAND nonvolatile semiconductor memory device
US8644066B2 (en) 2008-11-18 2014-02-04 Samsung Electronics Co., Ltd. Multi-level non-volatile memory device, system and method with state-converted data
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JP2015195071A (ja) * 2014-03-18 2015-11-05 株式会社東芝 不揮発性メモリおよび書き込み方法

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