JP2000215693A5 - - Google Patents

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JP2000215693A5
JP2000215693A5 JP1999010507A JP1050799A JP2000215693A5 JP 2000215693 A5 JP2000215693 A5 JP 2000215693A5 JP 1999010507 A JP1999010507 A JP 1999010507A JP 1050799 A JP1050799 A JP 1050799A JP 2000215693 A5 JP2000215693 A5 JP 2000215693A5
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output
signal
circuit
receives
data
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JP1999010507A
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Japanese (ja)
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JP2000215693A (ja
JP4204685B2 (ja
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Priority to JP01050799A priority Critical patent/JP4204685B2/ja
Priority claimed from JP01050799A external-priority patent/JP4204685B2/ja
Priority to US09/333,649 priority patent/US6421789B1/en
Publication of JP2000215693A publication Critical patent/JP2000215693A/ja
Priority to US10/190,693 priority patent/US6546503B2/en
Publication of JP2000215693A5 publication Critical patent/JP2000215693A5/ja
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Publication of JP4204685B2 publication Critical patent/JP4204685B2/ja
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JP01050799A 1999-01-19 1999-01-19 同期型半導体記憶装置 Expired - Fee Related JP4204685B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP01050799A JP4204685B2 (ja) 1999-01-19 1999-01-19 同期型半導体記憶装置
US09/333,649 US6421789B1 (en) 1999-01-19 1999-06-16 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same
US10/190,693 US6546503B2 (en) 1999-01-19 2002-07-09 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01050799A JP4204685B2 (ja) 1999-01-19 1999-01-19 同期型半導体記憶装置

Related Child Applications (1)

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JP2008205696A Division JP2008293652A (ja) 2008-08-08 2008-08-08 同期型半導体記憶装置およびそのテスト方法

Publications (3)

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JP2000215693A JP2000215693A (ja) 2000-08-04
JP2000215693A5 true JP2000215693A5 (enExample) 2006-02-23
JP4204685B2 JP4204685B2 (ja) 2009-01-07

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JP01050799A Expired - Fee Related JP4204685B2 (ja) 1999-01-19 1999-01-19 同期型半導体記憶装置

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US (2) US6421789B1 (enExample)
JP (1) JP4204685B2 (enExample)

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KR100791348B1 (ko) * 2006-12-15 2008-01-03 삼성전자주식회사 반도체 메모리 장치 및 그 병렬 비트 테스트 방법
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