DE69426733D1 - Halbleiterspeichergerät mit Register zum Halten eines Prüfergebnissignals - Google Patents
Halbleiterspeichergerät mit Register zum Halten eines PrüfergebnissignalsInfo
- Publication number
- DE69426733D1 DE69426733D1 DE69426733T DE69426733T DE69426733D1 DE 69426733 D1 DE69426733 D1 DE 69426733D1 DE 69426733 T DE69426733 T DE 69426733T DE 69426733 T DE69426733 T DE 69426733T DE 69426733 D1 DE69426733 D1 DE 69426733D1
- Authority
- DE
- Germany
- Prior art keywords
- data
- memory cell
- cell array
- register
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/40—Response verification devices using compression techniques
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/46—Test trigger logic
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5083190A JPH06295599A (ja) | 1993-04-09 | 1993-04-09 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69426733D1 true DE69426733D1 (de) | 2001-04-05 |
DE69426733T2 DE69426733T2 (de) | 2001-08-02 |
Family
ID=13795410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69426733T Expired - Fee Related DE69426733T2 (de) | 1993-04-09 | 1994-04-07 | Halbleiterspeichergerät mit Register zum Halten eines Prüfergebnissignals |
Country Status (5)
Country | Link |
---|---|
US (1) | US5673270A (de) |
EP (1) | EP0620556B1 (de) |
JP (1) | JPH06295599A (de) |
KR (1) | KR0134751B1 (de) |
DE (1) | DE69426733T2 (de) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3547059B2 (ja) * | 1995-06-30 | 2004-07-28 | 株式会社アドバンテスト | 半導体メモリ試験方法およびこの方法を実施する装置 |
US5983375A (en) * | 1995-12-27 | 1999-11-09 | Samsung Electronics, Co., Ltd. | Multi-bit test circuit and method thereof |
KR100216993B1 (ko) * | 1997-07-11 | 1999-09-01 | 윤종용 | 병합 데이터 출력모드와 표준동작 모드로 동작하는 집적회로소자를 함께 검사할 수 있는 검사용 기판 |
US5996097A (en) * | 1997-04-28 | 1999-11-30 | International Business Machines Corporation | Testing logic associated with numerous memory cells in the word or bit dimension in parallel |
JP3235523B2 (ja) * | 1997-08-06 | 2001-12-04 | 日本電気株式会社 | 半導体集積回路 |
JP3237579B2 (ja) * | 1997-08-07 | 2001-12-10 | 日本電気株式会社 | メモリテスト回路 |
KR100281105B1 (ko) * | 1998-02-04 | 2001-02-01 | 김영환 | 디램의 데이타 출력 회로 |
US5936901A (en) * | 1998-03-19 | 1999-08-10 | Micron Technology, Inc. | Shared data lines for memory write and memory test operations |
US5982684A (en) * | 1998-05-28 | 1999-11-09 | Intel Corporation | Parallel access testing of a memory array |
US6324657B1 (en) * | 1998-06-11 | 2001-11-27 | Micron Technology, Inc. | On-clip testing circuit and method for improving testing of integrated circuits |
JP2000076899A (ja) * | 1998-08-26 | 2000-03-14 | Oki Micro Design:Kk | 半導体記憶装置 |
US6550023B1 (en) * | 1998-10-19 | 2003-04-15 | Hewlett Packard Development Company, L.P. | On-the-fly memory testing and automatic generation of bitmaps |
JP3945939B2 (ja) * | 1999-05-31 | 2007-07-18 | 富士通株式会社 | 圧縮テスト可能なメモリ回路 |
JP2001101895A (ja) | 1999-09-30 | 2001-04-13 | Mitsubishi Electric Corp | 半導体集積回路装置 |
JP2001202797A (ja) | 2000-01-20 | 2001-07-27 | Mitsubishi Electric Corp | 半導体記憶装置および半導体テスト方法 |
DE10124923B4 (de) * | 2001-05-21 | 2014-02-06 | Qimonda Ag | Testverfahren zum Testen eines Datenspeichers und Datenspeicher mit integrierter Testdatenkompressionsschaltung |
WO2003043022A2 (de) * | 2001-11-12 | 2003-05-22 | Siemens Aktiengesellschaft | Speichertest |
US20050149792A1 (en) * | 2002-12-20 | 2005-07-07 | Fujitsu Limited | Semiconductor device and method for testing the same |
JP2004198367A (ja) * | 2002-12-20 | 2004-07-15 | Fujitsu Ltd | 半導体装置及びその試験方法 |
JP4400081B2 (ja) * | 2003-04-08 | 2010-01-20 | エルピーダメモリ株式会社 | 半導体記憶装置 |
JP2006004475A (ja) * | 2004-06-15 | 2006-01-05 | Toshiba Corp | 半導体集積回路装置 |
JP2006048748A (ja) * | 2004-07-30 | 2006-02-16 | Renesas Technology Corp | 半導体記憶装置 |
JP4712365B2 (ja) * | 2004-08-13 | 2011-06-29 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置および半導体記憶装置 |
US20060041798A1 (en) * | 2004-08-23 | 2006-02-23 | On-Chip Technologies, Inc. | Design techniques to increase testing efficiency |
US7376872B1 (en) | 2004-11-01 | 2008-05-20 | Lattice Semiconductor Corporation | Testing embedded memory in integrated circuits such as programmable logic devices |
JP5137550B2 (ja) * | 2007-12-12 | 2013-02-06 | キヤノン株式会社 | 情報処理装置及びその制御方法 |
KR101477603B1 (ko) * | 2013-04-09 | 2014-12-30 | (주)피델릭스 | 입력 테스트 비트 수를 감소하는 반도체 메모리 장치 및 이에 대한 테스트 데이터 기입 방법 |
KR20160116913A (ko) * | 2015-03-31 | 2016-10-10 | 에스케이하이닉스 주식회사 | 상태 페일 신호를 출력하는 반도체 메모리 장치 및 그것의 동작 방법 |
KR102485210B1 (ko) * | 2016-08-18 | 2023-01-06 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4507761A (en) * | 1982-04-20 | 1985-03-26 | Mostek Corporation | Functional command for semiconductor memory |
US4503536A (en) * | 1982-09-13 | 1985-03-05 | General Dynamics | Digital circuit unit testing system utilizing signature analysis |
JPS59185097A (ja) * | 1983-04-04 | 1984-10-20 | Oki Electric Ind Co Ltd | 自己診断機能付メモリ装置 |
JPS6088370A (ja) * | 1983-10-20 | 1985-05-18 | Toshiba Corp | 論理回路 |
USRE34445E (en) * | 1985-01-18 | 1993-11-16 | University Of Michigan | Self-testing dynamic RAM |
US4757503A (en) * | 1985-01-18 | 1988-07-12 | The University Of Michigan | Self-testing dynamic ram |
JPS6238600A (ja) * | 1985-08-14 | 1987-02-19 | Fujitsu Ltd | 半導体記憶装置 |
JPS6325749A (ja) * | 1986-07-18 | 1988-02-03 | Nec Corp | 半導体記憶素子 |
JP2684365B2 (ja) * | 1987-04-24 | 1997-12-03 | 株式会社日立製作所 | 半導体記憶装置 |
JP2602225B2 (ja) * | 1987-04-24 | 1997-04-23 | 株式会社日立製作所 | ダイナミツクram |
US5034923A (en) * | 1987-09-10 | 1991-07-23 | Motorola, Inc. | Static RAM with soft defect detection |
JP2938470B2 (ja) * | 1989-06-01 | 1999-08-23 | 三菱電機株式会社 | 半導体記憶装置 |
JP2717712B2 (ja) * | 1989-08-18 | 1998-02-25 | 三菱電機株式会社 | 半導体記憶装置 |
JPH0752597B2 (ja) * | 1989-10-30 | 1995-06-05 | 三菱電機株式会社 | 半導体メモリ装置 |
KR930008417B1 (ko) * | 1990-06-18 | 1993-08-31 | 삼성전자 주식회사 | 반도체 메모리 장치의 다중 비트 병렬 테스트방법 |
KR920005798A (ko) * | 1990-04-18 | 1992-04-03 | 미타 가쓰시게 | 반도체 집적회로 |
JPH0428100A (ja) * | 1990-05-24 | 1992-01-30 | Nec Corp | Rom試験回路 |
US5265100A (en) * | 1990-07-13 | 1993-11-23 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory with improved test mode |
JP2568455B2 (ja) * | 1990-08-16 | 1997-01-08 | 三菱電機株式会社 | 半導体記憶装置 |
JPH0512900A (ja) * | 1991-06-28 | 1993-01-22 | Nec Corp | テスト機能を有する半導体記憶装置及びそのテスト方法 |
US5457696A (en) * | 1991-08-08 | 1995-10-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory having internal test circuit |
JP3049343B2 (ja) * | 1991-11-25 | 2000-06-05 | 安藤電気株式会社 | メモリ試験装置 |
JPH06203597A (ja) * | 1992-09-25 | 1994-07-22 | Nec Corp | ダイナミックram |
JP2768175B2 (ja) * | 1992-10-26 | 1998-06-25 | 日本電気株式会社 | 半導体メモリ |
-
1993
- 1993-04-09 JP JP5083190A patent/JPH06295599A/ja active Pending
-
1994
- 1994-04-07 DE DE69426733T patent/DE69426733T2/de not_active Expired - Fee Related
- 1994-04-07 EP EP94105415A patent/EP0620556B1/de not_active Expired - Lifetime
- 1994-04-08 KR KR1019940007327A patent/KR0134751B1/ko not_active IP Right Cessation
-
1995
- 1995-09-13 US US08/527,761 patent/US5673270A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR0134751B1 (ko) | 1998-04-30 |
US5673270A (en) | 1997-09-30 |
DE69426733T2 (de) | 2001-08-02 |
JPH06295599A (ja) | 1994-10-21 |
EP0620556A3 (de) | 1998-01-21 |
EP0620556B1 (de) | 2001-02-28 |
EP0620556A2 (de) | 1994-10-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |