DE60006892D1 - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
DE60006892D1
DE60006892D1 DE60006892T DE60006892T DE60006892D1 DE 60006892 D1 DE60006892 D1 DE 60006892D1 DE 60006892 T DE60006892 T DE 60006892T DE 60006892 T DE60006892 T DE 60006892T DE 60006892 D1 DE60006892 D1 DE 60006892D1
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60006892T
Other languages
English (en)
Other versions
DE60006892T2 (de
Inventor
Yasuhiko Honda
Hideo Kato
Hidetoshi Saito
Masao Kuriyama
Tokumasa Hara
Takafumi Ikeda
Tatsuya Hiramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE60006892D1 publication Critical patent/DE60006892D1/de
Application granted granted Critical
Publication of DE60006892T2 publication Critical patent/DE60006892T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE60006892T 1999-05-10 2000-05-08 Halbleiteranordnung Expired - Lifetime DE60006892T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP12932199 1999-05-10
JP12932199 1999-05-10
JP2000065397 2000-03-09
JP2000065397 2000-03-09

Publications (2)

Publication Number Publication Date
DE60006892D1 true DE60006892D1 (de) 2004-01-15
DE60006892T2 DE60006892T2 (de) 2004-10-28

Family

ID=26464750

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60006892T Expired - Lifetime DE60006892T2 (de) 1999-05-10 2000-05-08 Halbleiteranordnung

Country Status (5)

Country Link
US (6) US6377502B1 (de)
EP (1) EP1052647B1 (de)
JP (1) JP2010182395A (de)
KR (3) KR100590140B1 (de)
DE (1) DE60006892T2 (de)

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JP2002133885A (ja) 2000-10-30 2002-05-10 Toshiba Corp 不揮発性半導体記憶装置
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JP5845140B2 (ja) * 2011-06-29 2016-01-20 キヤノン株式会社 撮像素子及び撮像装置
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JP5888387B1 (ja) * 2014-10-22 2016-03-22 ミツミ電機株式会社 電池保護回路及び電池保護装置、並びに電池パック
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KR102365003B1 (ko) * 2016-07-25 2022-02-18 매그나칩 반도체 유한회사 Otp 메모리 장치
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JP7312141B2 (ja) 2020-05-25 2023-07-20 ルネサスエレクトロニクス株式会社 半導体装置
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Also Published As

Publication number Publication date
KR100636061B1 (ko) 2006-10-20
EP1052647A3 (de) 2000-12-13
EP1052647B1 (de) 2003-12-03
US6377502B1 (en) 2002-04-23
US20030086295A1 (en) 2003-05-08
US20050207247A1 (en) 2005-09-22
US7345919B2 (en) 2008-03-18
US7126855B2 (en) 2006-10-24
US6512693B2 (en) 2003-01-28
KR20050098798A (ko) 2005-10-12
JP2010182395A (ja) 2010-08-19
US20020031038A1 (en) 2002-03-14
KR20010082502A (ko) 2001-08-30
KR20050098797A (ko) 2005-10-12
KR100590140B1 (ko) 2006-06-15
DE60006892T2 (de) 2004-10-28
US20040218437A1 (en) 2004-11-04
US6920057B2 (en) 2005-07-19
EP1052647A2 (de) 2000-11-15
KR100561567B1 (ko) 2006-03-17
US20060256616A1 (en) 2006-11-16
US6829194B2 (en) 2004-12-07

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