DE60107174D1 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE60107174D1 DE60107174D1 DE60107174T DE60107174T DE60107174D1 DE 60107174 D1 DE60107174 D1 DE 60107174D1 DE 60107174 T DE60107174 T DE 60107174T DE 60107174 T DE60107174 T DE 60107174T DE 60107174 D1 DE60107174 D1 DE 60107174D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000269223 | 2000-09-05 | ||
JP2000269223A JP2002083493A (ja) | 2000-09-05 | 2000-09-05 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60107174D1 true DE60107174D1 (de) | 2004-12-23 |
DE60107174T2 DE60107174T2 (de) | 2005-11-10 |
Family
ID=18755870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60107174T Expired - Lifetime DE60107174T2 (de) | 2000-09-05 | 2001-09-05 | Halbleiterspeicheranordnung |
Country Status (6)
Country | Link |
---|---|
US (1) | US6574133B2 (de) |
EP (1) | EP1187141B1 (de) |
JP (1) | JP2002083493A (de) |
KR (1) | KR100504315B1 (de) |
DE (1) | DE60107174T2 (de) |
TW (1) | TW556216B (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002083493A (ja) * | 2000-09-05 | 2002-03-22 | Toshiba Corp | 半導体記憶装置 |
US6522569B2 (en) * | 2000-09-20 | 2003-02-18 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
US6587367B1 (en) * | 2002-03-19 | 2003-07-01 | Texas Instruments Incorporated | Dummy cell structure for 1T1C FeRAM cell array |
US6788602B2 (en) * | 2002-08-09 | 2004-09-07 | Macronix International Co., Ltd. | Memory device and operation thereof |
US6822891B1 (en) * | 2003-06-16 | 2004-11-23 | Kabushiki Kaisha Toshiba | Ferroelectric memory device |
US7269048B2 (en) * | 2003-09-22 | 2007-09-11 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
JP4074279B2 (ja) * | 2003-09-22 | 2008-04-09 | 株式会社東芝 | 半導体集積回路装置、デジタルカメラ、デジタルビデオカメラ、コンピュータシステム、携帯コンピュータシステム、論理可変lsi装置、icカード、ナビゲーションシステム、ロボット、画像表示装置、光ディスク記憶装置 |
KR100568861B1 (ko) * | 2003-12-15 | 2006-04-10 | 삼성전자주식회사 | 레퍼런스 전압 발생 회로를 갖는 강유전체 메모리 장치 |
KR100631923B1 (ko) * | 2004-10-12 | 2006-10-04 | 삼성전자주식회사 | 반도체 메모리에서의 레퍼런스전압 공급장치 및 그의구동방법 |
KR100562646B1 (ko) * | 2004-12-22 | 2006-03-20 | 주식회사 하이닉스반도체 | 저전압용 반도체 메모리 장치 |
JP2007058958A (ja) * | 2005-08-23 | 2007-03-08 | Toshiba Corp | 強誘電体半導体記憶装置 |
JP4840720B2 (ja) * | 2005-10-06 | 2011-12-21 | セイコーエプソン株式会社 | 半導体記憶装置および電子機器 |
JP2010160851A (ja) * | 2009-01-08 | 2010-07-22 | Toshiba Corp | 参照電圧発生回路および半導体記憶装置 |
JP5156069B2 (ja) * | 2010-09-17 | 2013-03-06 | 株式会社東芝 | 強誘電体メモリ |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06208790A (ja) * | 1993-01-12 | 1994-07-26 | Toshiba Corp | 半導体装置 |
JP3278981B2 (ja) * | 1993-06-23 | 2002-04-30 | 株式会社日立製作所 | 半導体メモリ |
EP0735540B1 (de) * | 1995-03-31 | 2002-06-19 | Infineon Technologies AG | Nieder-Leistungs-Leseverstärker des Typs Gain Speicherzelle |
US5917365A (en) * | 1996-04-19 | 1999-06-29 | Texas Instruments Incorporated | Optimizing the operating characteristics of a CMOS integrated circuit |
JP3766181B2 (ja) * | 1996-06-10 | 2006-04-12 | 株式会社東芝 | 半導体記憶装置とそれを搭載したシステム |
JP4083276B2 (ja) * | 1998-02-27 | 2008-04-30 | 富士通株式会社 | 半導体記憶装置及び記憶情報の読み出し書き込み方法 |
JP2000349251A (ja) * | 1999-06-09 | 2000-12-15 | Nissan Motor Co Ltd | 半導体装置 |
JP2002083493A (ja) * | 2000-09-05 | 2002-03-22 | Toshiba Corp | 半導体記憶装置 |
DE10053171C2 (de) * | 2000-10-26 | 2003-02-06 | Infineon Technologies Ag | Verfahren zum Herstellen einer ferroelektrischen oder paraelektrischen metalloxidhaltigen Schicht und eines Speicherbauelements daraus |
-
2000
- 2000-09-05 JP JP2000269223A patent/JP2002083493A/ja active Pending
-
2001
- 2001-08-31 TW TW090121589A patent/TW556216B/zh not_active IP Right Cessation
- 2001-09-04 KR KR10-2001-0054157A patent/KR100504315B1/ko not_active IP Right Cessation
- 2001-09-05 DE DE60107174T patent/DE60107174T2/de not_active Expired - Lifetime
- 2001-09-05 US US09/945,755 patent/US6574133B2/en not_active Expired - Lifetime
- 2001-09-05 EP EP01120724A patent/EP1187141B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
TW556216B (en) | 2003-10-01 |
US6574133B2 (en) | 2003-06-03 |
EP1187141B1 (de) | 2004-11-17 |
KR100504315B1 (ko) | 2005-07-28 |
EP1187141A3 (de) | 2003-01-08 |
DE60107174T2 (de) | 2005-11-10 |
US20020027797A1 (en) | 2002-03-07 |
EP1187141A2 (de) | 2002-03-13 |
JP2002083493A (ja) | 2002-03-22 |
KR20020019411A (ko) | 2002-03-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |