DE60016104D1 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung

Info

Publication number
DE60016104D1
DE60016104D1 DE60016104T DE60016104T DE60016104D1 DE 60016104 D1 DE60016104 D1 DE 60016104D1 DE 60016104 T DE60016104 T DE 60016104T DE 60016104 T DE60016104 T DE 60016104T DE 60016104 D1 DE60016104 D1 DE 60016104D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60016104T
Other languages
English (en)
Other versions
DE60016104T2 (de
Inventor
Shoichi Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE60016104D1 publication Critical patent/DE60016104D1/de
Application granted granted Critical
Publication of DE60016104T2 publication Critical patent/DE60016104T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
DE60016104T 1999-07-26 2000-03-28 Nichtflüchtige Halbleiterspeicheranordnung Expired - Lifetime DE60016104T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP21084399 1999-07-26
JP21084399A JP3755346B2 (ja) 1999-07-26 1999-07-26 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE60016104D1 true DE60016104D1 (de) 2004-12-30
DE60016104T2 DE60016104T2 (de) 2005-11-03

Family

ID=16596043

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60016104T Expired - Lifetime DE60016104T2 (de) 1999-07-26 2000-03-28 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (6)

Country Link
US (1) US6259630B1 (de)
EP (1) EP1073065B1 (de)
JP (1) JP3755346B2 (de)
KR (1) KR100592743B1 (de)
DE (1) DE60016104T2 (de)
TW (1) TW469433B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3851865B2 (ja) 2001-12-19 2006-11-29 株式会社東芝 半導体集積回路
US7299329B2 (en) 2004-01-29 2007-11-20 Micron Technology, Inc. Dual edge command in DRAM
DE102004063641B4 (de) * 2004-12-27 2011-12-08 Infineon Technologies Ag Nichtflüchtige Speichereinrichtung zum Speichern von Daten und Verfahren zum Löschen oder Programmieren derselben
JP4387968B2 (ja) * 2005-03-28 2009-12-24 富士通株式会社 障害検出装置および障害検出方法
JP4664804B2 (ja) * 2005-04-28 2011-04-06 株式会社東芝 不揮発性半導体記憶装置
US7391654B2 (en) * 2005-05-11 2008-06-24 Micron Technology, Inc. Memory block erasing in a flash memory device
JP4612500B2 (ja) * 2005-07-29 2011-01-12 シャープ株式会社 半導体記憶装置及び電子機器
KR100713983B1 (ko) * 2005-09-22 2007-05-04 주식회사 하이닉스반도체 플래시 메모리 장치의 페이지 버퍼 및 그것을 이용한프로그램 방법
JP2007188552A (ja) * 2006-01-11 2007-07-26 Sharp Corp 半導体記憶装置
JP2007249662A (ja) * 2006-03-16 2007-09-27 Toshiba Corp メモリカード及びメモリカードの制御方法
US7969782B2 (en) 2008-09-26 2011-06-28 Micron Technology, Inc. Determining memory page status
CN101685676B (zh) * 2008-09-26 2014-07-02 美光科技公司 确定存储器页状况
US8526238B2 (en) * 2010-10-01 2013-09-03 Micron Technology, Inc. Memory arrays and methods of operating memory
TWI476775B (zh) * 2012-07-27 2015-03-11 Eon Silicon Solution Inc Acquisition Method of Damaged Bit Line in Nonvolatile Memory Device
TWI755764B (zh) * 2020-06-22 2022-02-21 旺宏電子股份有限公司 記憶體裝置及其寫入方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4253059A (en) * 1979-05-14 1981-02-24 Fairchild Camera & Instrument Corp. EPROM Reliability test circuit
US4393475A (en) * 1981-01-27 1983-07-12 Texas Instruments Incorporated Non-volatile semiconductor memory and the testing method for the same
JPH0713879B2 (ja) * 1985-06-21 1995-02-15 三菱電機株式会社 半導体記憶装置
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
US4763305A (en) * 1985-11-27 1988-08-09 Motorola, Inc. Intelligent write in an EEPROM with data and erase check
JP2914171B2 (ja) * 1994-04-25 1999-06-28 松下電器産業株式会社 半導体メモリ装置およびその駆動方法
US5638326A (en) * 1996-04-05 1997-06-10 Advanced Micro Devices, Inc. Parallel page buffer verify or read of cells on a word line using a signal from a reference cell in a flash memory device
JPH09306197A (ja) * 1996-05-15 1997-11-28 Hitachi Electron Eng Co Ltd フラッシュメモリの消去不良セル検査方法
US5835414A (en) * 1996-06-14 1998-11-10 Macronix International Co., Ltd. Page mode program, program verify, read and erase verify for floating gate memory device with low current page buffer

Also Published As

Publication number Publication date
US6259630B1 (en) 2001-07-10
JP3755346B2 (ja) 2006-03-15
EP1073065A1 (de) 2001-01-31
KR20010014760A (ko) 2001-02-26
TW469433B (en) 2001-12-21
KR100592743B1 (ko) 2006-06-26
DE60016104T2 (de) 2005-11-03
EP1073065B1 (de) 2004-11-24
JP2001035172A (ja) 2001-02-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE