DE69835635D1 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung

Info

Publication number
DE69835635D1
DE69835635D1 DE69835635T DE69835635T DE69835635D1 DE 69835635 D1 DE69835635 D1 DE 69835635D1 DE 69835635 T DE69835635 T DE 69835635T DE 69835635 T DE69835635 T DE 69835635T DE 69835635 D1 DE69835635 D1 DE 69835635D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69835635T
Other languages
English (en)
Other versions
DE69835635T2 (de
Inventor
Toshiyuki Shigemura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE69835635D1 publication Critical patent/DE69835635D1/de
Publication of DE69835635T2 publication Critical patent/DE69835635T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE69835635T 1997-06-06 1998-04-15 Nichtflüchtige Halbleiterspeicheranordnung Expired - Lifetime DE69835635T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14971797 1997-06-06
JP14971797A JP3411186B2 (ja) 1997-06-06 1997-06-06 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69835635D1 true DE69835635D1 (de) 2006-10-05
DE69835635T2 DE69835635T2 (de) 2007-09-13

Family

ID=15481291

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69835635T Expired - Lifetime DE69835635T2 (de) 1997-06-06 1998-04-15 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5978273A (de)
EP (1) EP0883133B1 (de)
JP (1) JP3411186B2 (de)
KR (1) KR100279226B1 (de)
DE (1) DE69835635T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10326493A (ja) * 1997-05-23 1998-12-08 Ricoh Co Ltd 複合化フラッシュメモリ装置
US6824997B1 (en) 1998-09-18 2004-11-30 Binax, Inc. Process and materials for the rapid detection of streptococcus pneumoniae employing purified antigen-specific antibodies
US9134303B1 (en) 1998-08-25 2015-09-15 Alere Scarborough, Inc. ICT immunoassay for Legionella pneumophila serogroup 1 antigen employing affinity purified antibodies thereto
JP2000276890A (ja) * 1999-03-24 2000-10-06 Nec Corp 不揮発性半導体記憶装置
US6521958B1 (en) * 1999-08-26 2003-02-18 Micron Technology, Inc. MOSFET technology for programmable address decode and correction
JP4697993B2 (ja) * 1999-11-25 2011-06-08 スパンション エルエルシー 不揮発性半導体メモリ装置の制御方法
US6532514B1 (en) * 1999-12-22 2003-03-11 Texas Instruments Incorporated System and method for handling a power supply interruption in a non-volatile memory
KR100674454B1 (ko) * 2000-02-16 2007-01-29 후지쯔 가부시끼가이샤 비휘발성 메모리
JP2001250388A (ja) * 2000-03-06 2001-09-14 Fujitsu Ltd 消去動作情報を記憶する不揮発性メモリ
US6654847B1 (en) 2000-06-30 2003-11-25 Micron Technology, Inc. Top/bottom symmetrical protection scheme for flash
US6674667B2 (en) * 2001-02-13 2004-01-06 Micron Technology, Inc. Programmable fuse and antifuse and method therefor
JP3692313B2 (ja) * 2001-06-28 2005-09-07 松下電器産業株式会社 不揮発性メモリの制御方法
JP4111486B2 (ja) * 2002-01-31 2008-07-02 シャープ株式会社 半導体記憶装置および電子情報機器
US20030225962A1 (en) * 2002-05-31 2003-12-04 Hitachi, Ltd. Memory card and memory card system
CN100377120C (zh) * 2002-10-02 2008-03-26 松下电器产业株式会社 非易失性存储器装置的控制方法
US6948041B2 (en) * 2002-10-24 2005-09-20 Micron Technology, Inc. Permanent memory block protection in a flash memory device
US7403417B2 (en) * 2005-11-23 2008-07-22 Infineon Technologies Flash Gmbh & Co. Kg Non-volatile semiconductor memory device and method for operating a non-volatile memory device
US8949989B2 (en) * 2009-08-17 2015-02-03 Qualcomm Incorporated Auditing a device
US8544089B2 (en) * 2009-08-17 2013-09-24 Fatskunk, Inc. Auditing a device
JP5953803B2 (ja) 2012-02-21 2016-07-20 富士通セミコンダクター株式会社 アクティブ信号生成回路及び半導体記憶装置
KR102050729B1 (ko) 2013-02-12 2019-12-02 삼성전자 주식회사 메모리 시스템
US9465705B2 (en) * 2014-04-15 2016-10-11 Infineon Technologies Ag Processing a target memory
CN108830114B (zh) * 2018-05-23 2020-07-07 广东高云半导体科技股份有限公司 非易失性存储器的数据处理方法与装置、存储介质
US11327904B2 (en) 2020-03-11 2022-05-10 Denso International America, Inc. Systems and methods for securing protected items in memory

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744062A (en) * 1985-04-23 1988-05-10 Hitachi, Ltd. Semiconductor integrated circuit with nonvolatile memory
JPH05325577A (ja) * 1992-05-25 1993-12-10 Ricoh Co Ltd フラッシュメモリカードのメモリ消去方法
JP3328321B2 (ja) * 1992-06-22 2002-09-24 株式会社日立製作所 半導体記憶装置
US5369616A (en) * 1992-10-30 1994-11-29 Intel Corporation Method for assuring that an erase process for a memory array has been properly completed
JP2917722B2 (ja) * 1993-01-07 1999-07-12 日本電気株式会社 電気的書込消去可能な不揮発性半導体記憶装置
JP3212396B2 (ja) * 1993-01-14 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
US5592641A (en) * 1993-06-30 1997-01-07 Intel Corporation Method and device for selectively locking write access to blocks in a memory array using write protect inputs and block enabled status
US5513136A (en) * 1993-09-27 1996-04-30 Intel Corporation Nonvolatile memory with blocks and circuitry for selectively protecting the blocks for memory operations
JPH07111100A (ja) * 1993-10-08 1995-04-25 Nec Corp テスト回路
JPH07220487A (ja) * 1994-01-27 1995-08-18 Toshiba Corp 不揮発性メモリ回路
US5606532A (en) * 1995-03-17 1997-02-25 Atmel Corporation EEPROM array with flash-like core
JP2848300B2 (ja) * 1995-12-27 1999-01-20 日本電気株式会社 不揮発性半導体記憶装置
US5805501A (en) * 1996-05-22 1998-09-08 Macronix International Co., Ltd. Flash memory device with multiple checkpoint erase suspend logic
JP2977023B2 (ja) * 1996-09-30 1999-11-10 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法

Also Published As

Publication number Publication date
EP0883133B1 (de) 2006-08-23
EP0883133A3 (de) 2000-11-08
JPH10340591A (ja) 1998-12-22
KR19990006395A (ko) 1999-01-25
DE69835635T2 (de) 2007-09-13
KR100279226B1 (ko) 2001-01-15
JP3411186B2 (ja) 2003-05-26
EP0883133A2 (de) 1998-12-09
US5978273A (en) 1999-11-02

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