DE69909280D1 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE69909280D1
DE69909280D1 DE69909280T DE69909280T DE69909280D1 DE 69909280 D1 DE69909280 D1 DE 69909280D1 DE 69909280 T DE69909280 T DE 69909280T DE 69909280 T DE69909280 T DE 69909280T DE 69909280 D1 DE69909280 D1 DE 69909280D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69909280T
Other languages
English (en)
Other versions
DE69909280T2 (de
Inventor
Hironori Akamatsu
Toru Iwata
Makoto Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69909280D1 publication Critical patent/DE69909280D1/de
Publication of DE69909280T2 publication Critical patent/DE69909280T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/14Word line organisation; Word line lay-out
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4087Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE69909280T 1998-04-21 1999-04-20 Halbleiterspeicher Expired - Lifetime DE69909280T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP11044798 1998-04-21
JP11044798 1998-04-21
PCT/JP1999/002105 WO1999054881A1 (fr) 1998-04-21 1999-04-20 Dispositif de memorisation a semiconducteurs

Publications (2)

Publication Number Publication Date
DE69909280D1 true DE69909280D1 (de) 2003-08-07
DE69909280T2 DE69909280T2 (de) 2004-02-05

Family

ID=14535958

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69909280T Expired - Lifetime DE69909280T2 (de) 1998-04-21 1999-04-20 Halbleiterspeicher

Country Status (9)

Country Link
US (1) US6400637B1 (de)
EP (1) EP1074994B1 (de)
JP (1) JP3719934B2 (de)
KR (1) KR100529706B1 (de)
CN (1) CN1181493C (de)
AU (1) AU3344999A (de)
DE (1) DE69909280T2 (de)
TW (1) TW452798B (de)
WO (1) WO1999054881A1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4011248B2 (ja) * 1999-12-22 2007-11-21 沖電気工業株式会社 半導体記憶装置
JP2002008370A (ja) * 2000-06-21 2002-01-11 Mitsubishi Electric Corp 半導体記憶装置
TW530207B (en) * 2000-09-05 2003-05-01 Samsung Electronics Co Ltd Semiconductor memory device having altered clock frequency for address and/or command signals, and memory module and system having the same
DE10128254B4 (de) 2001-06-11 2016-09-01 Polaris Innovations Ltd. Integrierter Speicher mit einem Speicherzellenfeld mit mehreren Segmenten und Verfahren zu seinem Betrieb
KR100546342B1 (ko) * 2003-07-12 2006-01-26 삼성전자주식회사 반복적으로 배치되는 프리-디코딩된 신호선들의레이아웃을 개선시키는 로우 디코더 구조, 이를 구비한반도체 메모리 장치, 및 그 방법
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7289386B2 (en) * 2004-03-05 2007-10-30 Netlist, Inc. Memory module decoder
US7916574B1 (en) 2004-03-05 2011-03-29 Netlist, Inc. Circuit providing load isolation and memory domain translation for memory module
US7532537B2 (en) * 2004-03-05 2009-05-12 Netlist, Inc. Memory module with a circuit providing load isolation and memory domain translation
US20060277355A1 (en) * 2005-06-01 2006-12-07 Mark Ellsberry Capacity-expanding memory device
JP4769548B2 (ja) 2005-11-04 2011-09-07 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体記憶装置
JP5029205B2 (ja) * 2007-08-10 2012-09-19 富士通セミコンダクター株式会社 半導体メモリ、半導体メモリのテスト方法およびシステム
US8832518B2 (en) * 2008-02-21 2014-09-09 Ramot At Tel Aviv University Ltd. Method and device for multi phase error-correction
US8417870B2 (en) * 2009-07-16 2013-04-09 Netlist, Inc. System and method of increasing addressable memory space on a memory board
US8516185B2 (en) 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
JP2013196717A (ja) * 2012-03-16 2013-09-30 Toshiba Corp 半導体記憶装置およびその駆動方法
US8811110B2 (en) * 2012-06-28 2014-08-19 Intel Corporation Configuration for power reduction in DRAM
CN110428855B (zh) 2013-07-27 2023-09-22 奈特力斯股份有限公司 具有本地分别同步的内存模块

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03238694A (ja) 1990-02-15 1991-10-24 Matsushita Electric Ind Co Ltd 半導体メモリ
JPH06195964A (ja) 1992-10-01 1994-07-15 Nec Corp 半導体メモリ
JPH06195966A (ja) 1992-10-01 1994-07-15 Nec Corp 半導体メモリ
JPH087568A (ja) 1994-06-27 1996-01-12 Nec Corp ダイナミックram
GB9423038D0 (en) * 1994-11-15 1995-01-04 Sgs Thomson Microelectronics An integrated circuit memory device with voltage boost
JPH08227597A (ja) * 1995-02-21 1996-09-03 Mitsubishi Electric Corp 半導体記憶装置
JPH08335390A (ja) 1995-06-08 1996-12-17 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
JP3185610B2 (ja) 1995-06-13 2001-07-11 松下電器産業株式会社 半導体記憶装置
KR0170903B1 (ko) * 1995-12-08 1999-03-30 김주용 하위 워드 라인 구동 회로 및 이를 이용한 반도체 메모리 장치
KR100186300B1 (ko) * 1996-04-04 1999-04-15 문정환 계층적 워드라인 구조를 갖는 반도체 메모리 소자
KR100200724B1 (ko) * 1996-08-21 1999-06-15 윤종용 반도체 메모리장치의 서브 워드라인 드라이버
JPH1083672A (ja) 1996-09-10 1998-03-31 Hitachi Ltd 半導体集積回路装置
JP4059951B2 (ja) 1997-04-11 2008-03-12 株式会社ルネサステクノロジ 半導体記憶装置
US5870350A (en) 1997-05-21 1999-02-09 International Business Machines Corporation High performance, high bandwidth memory bus architecture utilizing SDRAMs
JP3908338B2 (ja) 1997-06-30 2007-04-25 富士通株式会社 半導体記憶装置
KR100280468B1 (ko) * 1998-04-16 2001-03-02 김영환 반도체 메모리장치의 워드라인 드라이버

Also Published As

Publication number Publication date
TW452798B (en) 2001-09-01
WO1999054881A1 (fr) 1999-10-28
KR20010042856A (ko) 2001-05-25
KR100529706B1 (ko) 2005-11-22
CN1297566A (zh) 2001-05-30
JP3719934B2 (ja) 2005-11-24
DE69909280T2 (de) 2004-02-05
EP1074994B1 (de) 2003-07-02
US6400637B1 (en) 2002-06-04
AU3344999A (en) 1999-11-08
CN1181493C (zh) 2004-12-22
EP1074994A1 (de) 2001-02-07
EP1074994A4 (de) 2001-11-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP