DE60129073D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE60129073D1
DE60129073D1 DE60129073T DE60129073T DE60129073D1 DE 60129073 D1 DE60129073 D1 DE 60129073D1 DE 60129073 T DE60129073 T DE 60129073T DE 60129073 T DE60129073 T DE 60129073T DE 60129073 D1 DE60129073 D1 DE 60129073D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60129073T
Other languages
English (en)
Other versions
DE60129073T2 (de
Inventor
Daisaburo Takashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE60129073D1 publication Critical patent/DE60129073D1/de
Publication of DE60129073T2 publication Critical patent/DE60129073T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE60129073T 2000-05-10 2001-05-08 Halbleiterspeicheranordnung Expired - Lifetime DE60129073T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000137098 2000-05-10
JP2000137098A JP2001319472A (ja) 2000-05-10 2000-05-10 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE60129073D1 true DE60129073D1 (de) 2007-08-09
DE60129073T2 DE60129073T2 (de) 2008-02-28

Family

ID=18644934

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60129073T Expired - Lifetime DE60129073T2 (de) 2000-05-10 2001-05-08 Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (2) US6487104B2 (de)
EP (1) EP1154436B1 (de)
JP (1) JP2001319472A (de)
KR (1) KR100419375B1 (de)
DE (1) DE60129073T2 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1187140A3 (de) * 2000-09-05 2002-09-11 Matsushita Electric Industrial Co., Ltd. Betriebsverfahren eines Halbleiterspeichers
US6844583B2 (en) * 2001-06-26 2005-01-18 Samsung Electronics Co., Ltd. Ferroelectric memory devices having expanded plate lines
JP2004047943A (ja) * 2002-03-20 2004-02-12 Fujitsu Ltd 半導体装置
US6972983B2 (en) * 2002-03-21 2005-12-06 Infineon Technologies Aktiengesellschaft Increasing the read signal in ferroelectric memories
US6809949B2 (en) * 2002-05-06 2004-10-26 Symetrix Corporation Ferroelectric memory
US6898104B2 (en) * 2002-11-12 2005-05-24 Kabushiki Kaisha Toshiba Semiconductor device having semiconductor memory with sense amplifier
JP3806084B2 (ja) 2002-12-25 2006-08-09 株式会社東芝 強誘電体メモリ及びそのデータ読み出し方法
JP4154392B2 (ja) * 2003-02-27 2008-09-24 富士通株式会社 半導体記憶装置及びデータ読み出し方法
WO2004077441A1 (ja) * 2003-02-27 2004-09-10 Fujitsu Limited 半導体記憶装置
US7082046B2 (en) 2003-02-27 2006-07-25 Fujitsu Limited Semiconductor memory device and method of reading data
JP2005025878A (ja) * 2003-07-03 2005-01-27 Toshiba Corp 半導体記憶装置およびその試験方法
JP2005085332A (ja) * 2003-09-05 2005-03-31 Seiko Epson Corp 強誘電体記憶装置、その駆動方法及び駆動回路
JP2005092915A (ja) * 2003-09-12 2005-04-07 Toshiba Corp 半導体集積回路装置およびその情報記憶方法
JP3940728B2 (ja) * 2004-04-09 2007-07-04 株式会社東芝 半導体記憶装置
US6970371B1 (en) * 2004-05-17 2005-11-29 Texas Instruments Incorporated Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages
JP4079910B2 (ja) 2004-05-28 2008-04-23 富士通株式会社 強誘電体メモリ
US7088605B2 (en) * 2004-07-02 2006-08-08 Macronix International Co., Ltd. FeRAM memory design using ROM array architecture
JP2006054017A (ja) * 2004-08-13 2006-02-23 Micron Technology Inc メモリディジット線のキャパシタ支持によるプレチャージ
JP4638193B2 (ja) * 2004-09-24 2011-02-23 パトレネラ キャピタル リミテッド， エルエルシー メモリ
US7795617B2 (en) * 2004-10-29 2010-09-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, IC card, IC tag, RFID, transponder, paper money, valuable securities, passport, electronic device, bag, and clothes
JP4295253B2 (ja) 2005-07-06 2009-07-15 富士通マイクロエレクトロニクス株式会社 強誘電体記憶装置
JP4186119B2 (ja) 2005-07-27 2008-11-26 セイコーエプソン株式会社 強誘電体メモリ装置
JP2007052821A (ja) * 2005-08-15 2007-03-01 Fujitsu Ltd 強誘電体メモリ
WO2007029320A1 (ja) * 2005-09-07 2007-03-15 Fujitsu Limited 強誘電体メモリ
JP2009043307A (ja) * 2007-08-06 2009-02-26 Toshiba Corp 半導体記憶装置
JP2010123218A (ja) 2008-11-21 2010-06-03 Toshiba Corp 半導体記憶装置
JP4908562B2 (ja) 2009-09-07 2012-04-04 株式会社東芝 強誘電体メモリ装置
US8848464B2 (en) * 2011-04-29 2014-09-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving semiconductor device
JP5929445B2 (ja) * 2012-04-11 2016-06-08 日本電気株式会社 不揮発記憶装置、電子回路装置、及び不揮発性記憶装置の製造方法
JP6219060B2 (ja) * 2013-04-12 2017-10-25 ラピスセミコンダクタ株式会社 不揮発性半導体記憶装置、及び不揮発性記憶装置データ読出し方法
US9171590B2 (en) * 2014-03-26 2015-10-27 National Tsing Hua University Sensing marging expanding scheme for memory
JP6394155B2 (ja) * 2014-07-31 2018-09-26 富士通セミコンダクター株式会社 半導体記憶装置
US9934837B2 (en) 2016-03-01 2018-04-03 Micron Technology, Inc. Ground reference scheme for a memory cell
US9697913B1 (en) 2016-06-10 2017-07-04 Micron Technology, Inc. Ferroelectric memory cell recovery
US10418084B2 (en) 2017-02-07 2019-09-17 Micron Technology, Inc. Pre-writing memory cells of an array
JP2018181398A (ja) * 2017-04-21 2018-11-15 富士通セミコンダクター株式会社 強誘電体メモリ及びその制御方法
US10403336B2 (en) 2017-12-28 2019-09-03 Micron Technology, Inc. Techniques for precharging a memory cell
US11127449B2 (en) 2018-04-25 2021-09-21 Micron Technology, Inc. Sensing a memory cell
US10607676B2 (en) * 2018-04-25 2020-03-31 Micron Technology, Inc. Sensing a memory cell
CN111833934B (zh) * 2020-07-30 2022-02-15 无锡拍字节科技有限公司 一种存算一体铁电存储器及其运行方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3179793B2 (ja) 1990-05-30 2001-06-25 三菱電機株式会社 半導体記憶装置およびその読出方法
JP2828530B2 (ja) 1991-10-22 1998-11-25 シャープ株式会社 不揮発性記憶装置
US5592410A (en) 1995-04-10 1997-01-07 Ramtron International Corporation Circuit and method for reducing a compensation of a ferroelectric capacitor by multiple pulsing of the plate line following a write operation
JPH0945089A (ja) * 1995-05-25 1997-02-14 Sony Corp 強誘電体記憶装置
JPH09139089A (ja) * 1995-11-13 1997-05-27 Sony Corp 強誘電体記憶装置
JP3766181B2 (ja) 1996-06-10 2006-04-12 株式会社東芝 半導体記憶装置とそれを搭載したシステム
JP3961651B2 (ja) 1997-12-16 2007-08-22 株式会社東芝 半導体記憶装置
KR100256226B1 (ko) * 1997-06-26 2000-05-15 김영환 레퍼런스 전압 발생 장치
JP3727157B2 (ja) * 1997-11-19 2005-12-14 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置及びその試験方法
JPH11238387A (ja) 1998-02-23 1999-08-31 Toshiba Corp 強誘電体メモリ
KR100268947B1 (ko) * 1998-04-03 2000-10-16 김영환 비휘발성 강유전체 메모리 및 그의 제어회로
US6031754A (en) 1998-11-02 2000-02-29 Celis Semiconductor Corporation Ferroelectric memory with increased switching voltage
JP2000187990A (ja) * 1998-12-24 2000-07-04 Nec Corp センスアンプ回路及びそれを用いた記憶装置並びにそれに用いる読出し方法
JP3604576B2 (ja) * 1999-02-19 2004-12-22 シャープ株式会社 強誘電体メモリ装置
JP2001076493A (ja) * 1999-09-03 2001-03-23 Nec Corp 強誘電体記憶装置
JP3829041B2 (ja) * 2000-03-08 2006-10-04 株式会社東芝 強誘電体メモリ

Also Published As

Publication number Publication date
DE60129073T2 (de) 2008-02-28
US20030026123A1 (en) 2003-02-06
US6657883B2 (en) 2003-12-02
EP1154436A3 (de) 2001-11-28
KR100419375B1 (ko) 2004-02-19
US6487104B2 (en) 2002-11-26
EP1154436A2 (de) 2001-11-14
JP2001319472A (ja) 2001-11-16
EP1154436B1 (de) 2007-06-27
US20010040814A1 (en) 2001-11-15
KR20010103680A (ko) 2001-11-23

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