DE60000280D1 - Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus - Google Patents

Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus

Info

Publication number
DE60000280D1
DE60000280D1 DE60000280T DE60000280T DE60000280D1 DE 60000280 D1 DE60000280 D1 DE 60000280D1 DE 60000280 T DE60000280 T DE 60000280T DE 60000280 T DE60000280 T DE 60000280T DE 60000280 D1 DE60000280 D1 DE 60000280D1
Authority
DE
Germany
Prior art keywords
memory device
power consumption
semiconductor memory
reduced power
hold mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60000280T
Other languages
English (en)
Other versions
DE60000280T2 (de
Inventor
Hideto Hidaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE60000280D1 publication Critical patent/DE60000280D1/de
Application granted granted Critical
Publication of DE60000280T2 publication Critical patent/DE60000280T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4061—Calibration or ate or cycle tuning

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
DE60000280T 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus Expired - Lifetime DE60000280T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11222605A JP2001052476A (ja) 1999-08-05 1999-08-05 半導体装置

Publications (2)

Publication Number Publication Date
DE60000280D1 true DE60000280D1 (de) 2002-08-29
DE60000280T2 DE60000280T2 (de) 2003-02-20

Family

ID=16785089

Family Applications (3)

Application Number Title Priority Date Filing Date
DE60005645T Expired - Lifetime DE60005645T2 (de) 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus
DE60000280T Expired - Lifetime DE60000280T2 (de) 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus
DE60003628T Expired - Lifetime DE60003628T2 (de) 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE60005645T Expired - Lifetime DE60005645T2 (de) 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE60003628T Expired - Lifetime DE60003628T2 (de) 1999-08-05 2000-04-20 Halbleiterspeicheranordnung mit verringertem Stromverbrauch bei Datenhaltemodus

Country Status (7)

Country Link
US (2) US6426908B1 (de)
EP (3) EP1152431B1 (de)
JP (1) JP2001052476A (de)
KR (1) KR100383503B1 (de)
CN (1) CN1303613C (de)
DE (3) DE60005645T2 (de)
TW (1) TW448623B (de)

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KR20010020894A (ko) 2001-03-15
DE60003628T2 (de) 2004-06-09
EP1130602A1 (de) 2001-09-05
EP1152431B1 (de) 2003-10-01
CN1303613C (zh) 2007-03-07
CN1283853A (zh) 2001-02-14
DE60005645T2 (de) 2004-08-05
EP1152431A3 (de) 2003-08-06
US6426908B1 (en) 2002-07-30
EP1074993A1 (de) 2001-02-07
DE60000280T2 (de) 2003-02-20
EP1130602B1 (de) 2003-07-02
US6487136B2 (en) 2002-11-26
TW448623B (en) 2001-08-01
JP2001052476A (ja) 2001-02-23
US20020105845A1 (en) 2002-08-08
KR100383503B1 (ko) 2003-05-12
DE60003628D1 (de) 2003-08-07
EP1152431A8 (de) 2002-01-30
EP1152431A1 (de) 2001-11-07
DE60005645D1 (de) 2003-11-06

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