CN1906026B - 半导体材料加工设备中的氧化钇涂覆的陶瓷部件及该部件的制造方法 - Google Patents

半导体材料加工设备中的氧化钇涂覆的陶瓷部件及该部件的制造方法 Download PDF

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CN1906026B
CN1906026B CN2004800407563A CN200480040756A CN1906026B CN 1906026 B CN1906026 B CN 1906026B CN 2004800407563 A CN2004800407563 A CN 2004800407563A CN 200480040756 A CN200480040756 A CN 200480040756A CN 1906026 B CN1906026 B CN 1906026B
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Abstract

半导体材料加工设备中的氧化钇涂覆的陶瓷部件，包括衬底和衬底上的至少一层含有氧化钇的涂层。这些部件这样制造，将第一含氧化钇的涂层施用在陶瓷衬底上，该衬底可以是陶瓷材料生坯。将涂覆的生坯烧结。对该第一含氧化钇的涂层进行处理，去除因烧结而产生的附着的氧化钇颗粒。在另一个实施方案中，可以在第一含氧化钇的涂层上热喷涂第二含氧化钇的涂层，以覆盖这些颗粒。

Description

半导体材料加工设备中的氧化钇涂覆的陶瓷部件及该部件的制造方法
发明背景
在半导体材料加工领域中，包括真空工艺腔的半导体材料加工设备用来进行例如衬底上各种材料的刻蚀和化学气相沉积(CVD)以及抗蚀剂剥离。这些工艺包括将工艺气体供入真空腔中，并对气体施加RF场以产生等离子体。由于在这些工艺腔中工艺气体和等离子体的腐蚀性以及希望使腔室中处理的衬底受到的颗粒和/或金属的污染最小化，希望这些设备中暴露在等离子体中的部件对这些气体和等离子体具有抗侵蚀性和抗腐蚀性。
发明简述
提供半导体加工设备中的氧化钇涂覆的陶瓷部件。氧化钇涂覆的陶瓷部件的一个优选实施方案包括由陶瓷材料生坯构成的衬底，以及在衬底至少一个表面上的热喷涂的含氧化钇涂层。
衬底可以包括各种陶瓷材料。在一个优选的实施方案中，衬底包括氧化铝。含氧化钇的涂层可以基本上由氧化钇构成，或者其可进一步包括一种或者多种另外的化合物。
这些部件可以是例如半导体材料加工设备中的介电窗，腔壁，腔衬里，衬底支架，挡板，气体分布板，等离子体限制环，喷嘴，紧固件，加热件，等离子体聚焦环，卡盘或者等离子体屏。
半导体材料加工设备中的氧化钇涂覆的陶瓷部件的另一个优选实施方案包括由陶瓷材料构成的衬底，在衬底上的热喷涂的第一含氧化钇的涂层，以及在第一含氧化钇的涂层和衬底之间的界面处的包括陶瓷材料和氧化钇的多相氧化物的结合层。该结合层通过将衬底和热喷涂后的第一涂层共烧结而制成。在另一个优选的实施方案中，可以对含氧化钇的涂层的暴露表面用等离子体调节处理进行处理以减少共烧结后在暴露表面上附着的氧化钇颗粒。而在另一个优选的实施方案中，可以在烧结的第一含氧化钇的涂层上提供热喷涂后的第二含氧化钇的涂层，来覆盖氧化钇颗粒。
在氧化钇涂覆的陶瓷部件的一个优选实施方案中，这第二含氧化钇的涂层可具有的表面粗糙度能有效提高淀积物在其表面上的粘附性。
制造半导体材料加工设备中的氧化钇涂覆的陶瓷部件的方法的一个优选实施方案包括，在衬底的至少一个表面上热喷涂含氧化钇的涂层，该衬底是陶瓷材料生坯。
制造半导体材料加工设备中的氧化钇涂覆的陶瓷部件的方法的另一个优选实施方案包括，将衬底和热喷涂后的含氧化钇的涂层共烧结，以在衬底和该含氧化钇的涂层之间的界面处形成包括陶瓷材料和氧化钇的多相氧化物的结合层。
制造半导体材料加工设备中的氧化钇涂覆的陶瓷部件的方法的另一个优选实施方案包括，在共烧结以后，在含氧化钇的涂层上热喷涂第二含氧化钇的涂层。
制造半导体材料加工设备中的氧化钇涂覆的陶瓷部件的方法的另一个优选实施方案包括，对含氧化钇的涂层的暴露表面用等离子体调节方法处理，以减少共烧结后在暴露表面上附着的氧化钇颗粒。
附图简述
图1显示了氧化钇涂覆的陶瓷部件的一个优选实施方案，该部件包括衬底和衬底上的含氧化钇的涂层。
图2显示了氧化钇涂覆的陶瓷部件的另一个优选实施方案，该部件包括衬底和衬底上的第一含氧化钇的涂层以及该第一含氧化钇的涂层上的第二层含氧化钇的涂层。
图3是多晶硅刻蚀设备中的气环装置的一个实施方案的横截面图。
图4显示了多晶硅刻蚀腔，其包括氧化钇涂覆的陶瓷部件的实施方案。
图5显示了一种高密度等离子体氧化物刻蚀腔，其包括氧化钇涂覆的陶瓷部件的实施方案。
发明详述
提供半导体材料加工设备的氧化钇涂覆的陶瓷部件。在处理衬底的过程中，陶瓷部件的含氧化钇的涂层对半导体材料加工设备的等离子体工艺腔中存在的腐蚀气体和等离子体所产生的物理和/或化学冲击具有抗磨损性。正如这里所用到的，“抗磨损”一词包括但不限于抵抗工艺气体，等离子体或者等离子体副产物产生的侵蚀，腐蚀和/或侵蚀-腐蚀。
氧化钇涂覆的陶瓷部件的优选实施方案包括至少一层含氧化钇的涂层，其形成部件的外表面，并可以抵抗半导体材料加工设备中的腐蚀气体和等离子体所产生的化学和/或物理冲击。这些设备可以用来在半导体衬底，例如半导体晶片，平板显示衬底以及其它类似制品的制造中进行刻蚀，淀积(例如CVD，PECVD及类似工艺)或者抗蚀剂剥离工艺。
氧化钇涂覆的陶瓷部件可以是在半导体材料加工设备中暴露在等离子体和/或腐蚀气体中的多种部件。示例性的部件包括但不限于，等离子体和/或真空腔室(例如等离子体刻蚀器)的部件，例如，介电窗，腔壁，腔衬里，衬底支架，挡板，气体分布板，气体分布环，卡盘机构(例如静电卡盘)，聚焦环，喷嘴，紧固件，加热件，等离子体屏以及其它类似部件。
如图1中所示，氧化钇涂覆的部件65的一个优选实施方案包括由陶瓷材料组成的衬底70，和在衬底的至少一个表面72上热喷涂的含氧化钇的涂层80。衬底70的陶瓷材料可以包括例如化学计量比的和非化学计量比的氧化铝(Al2O3)，石英，氧化锆，碳化硅(SiC)，氮化硅(Si3N4)，碳化硼(B4C)，氮化硼(BN)，氮化铝，或者它们的混和物。在一个优选实施方案中，陶瓷材料是氧化铝。
氧化钇涂覆的陶瓷部件65的衬底70可以这样制造，例如，制备陶瓷材料的浆料，例如通过压实技术，流延以及其它类似方法由该浆料制成具有所希望形状的生坯。在浆料中还可以含有粘结剂以及其它适用的添加剂。优选的将生致密体制成所希望部件的形状。在一个优选的实施方案中，含氧化钇的涂层80是热喷涂在生坯的一个或多个表面上的，也就是说，在热喷涂之前，没有对陶瓷材料进行部分或者完全烧结来部分或者完全提高机械强度。
另一个优选实施方案包括在向衬底的一个或者多个表面上热喷涂含氧化钇的涂层80之前，对衬底70进行部分烧结。例如，可以将衬底在大约800℃到大约1600℃的温度下部分烧结。烧结时间可以依据如下因素而变化，这些因素包括部件尺寸和形状，以及所希望由烧结得到的密度水平，例如完全密度的大约60％到大约80％。例如，烧结时间可以在1个小时到几天的范围，以在衬底上热喷涂含氧化钇的涂层之前在部件中得到部分的机械强度。例如，在Engineered MaterialsHandbook(ASM International，1991)第4卷，第3和第4部分，123-304页描述了可以用来成型和致密化衬底的示例性的陶瓷加工技术的细节，因此将其整体通过引用而引入。
优选的，通过向表面上只热喷涂氧化钇来制备在衬底70之上施用的含氧化钇的涂层80，以及下面要描述的施用在首先施用的含氧化钇的涂层80之上的一层或多层另外的含氧化钇的涂层。这些部件的含氧化钇的涂层还可以包括各种化合物，比如La，Ce，Pr，Nd，Pm，Sm，Eu，Gd，Tb，Dy，Ho，Er，Tm，Yb和Lu中的至少一种的氧化物，碳化物，氮化物，硼化物和/或碳氮化物的一种或多种。为了尽量使含有一个或多个氧化钇涂覆的陶瓷部件的等离子体加工设备中所处理的衬底受到的污染最小化，优选的，含氧化钇的涂层具有高纯度。例如，优选的，含氧化钇的涂层含有最小量的潜在的会污染衬底，例如半导体晶片的元素。这些元素包括过渡金属，碱金属以及其它类似元素。在优选实施方案中，含氧化钇的涂层可以足够纯，以避免晶片上的污染为1010个原子/平方厘米或者更高，优选的105个原子/平方厘米或者更高。优选的，含氧化钇的材料的纯度至少为大约99％，更优选的从大约99.95％到大约100％。
优选的，将衬底70和施用在衬底上的含氧化钇的涂层80在有效地在衬底70和含氧化钇的涂层80之间的界面上形成结合层74并将衬底完全烧结的条件下进行共烧结。结合层74提供了所施用的含氧化钇的涂层80和衬底70之间的增强的结合强度。优选的，共烧结在从大约800℃到大约1500℃的温度下进行，时间可以最多达到大约7天。共烧结可以在真空气氛下或者在惰性气体气氛下进行。在衬底70和含氧化钇的涂层80之间形成的结合层74的组成和结构由衬底的陶瓷材料决定。例如，在衬底是氧化铝的实施方案中，结合层中可以包括含有氧化钇和氧化铝的多相氧化物结构，比如3Y2O3-5Al2O3和/或Y2O3-Al2O3。在衬底是氧化锆的实施方案中，结合层可以包括例如Y2Zr2O7。
共烧结过程可以在含氧化钇的涂层80上形成一层基本上没有微开裂的表面光洁层(finish)，在等离子体加工中，由于等离子体加工设备中的部件所遭受到的热周期疲劳，微开裂会引起颗粒的产生。
而已经确定，施用在衬底70上的烧结后的含氧化钇的涂层80中会含有氧化钇颗粒，其附着在该涂层的暴露的外表面82上。在等离子体加工过程中，这些氧化钇颗粒潜在的会因暴露在等离子体中而脱落，结果，就会污染衬底。在一个优选的实施方案中，用等离子体调节方法对在共烧结部件的衬底70上形成的含氧化钇的涂层80的暴露表面82进行处理，以减少附着在暴露表面上的氧化钇颗粒。在共同未决的US专利申请No.09/607922中，描述了从暴露表面82上去除这种附着的氧化钇颗粒的合适的等离子体调节处理方法，这里将其整个通过引用而引入。等离子体调节处理可以这样进行，将部件65装配到半导体材料加工设备的等离子体工艺腔中，在用腔室中存在的部件65处理任何产品晶片之前，对其进行等离子体调节处理，以从暴露的含氧化钇的表面82上去除氧化钇颗粒。
图2中给出了氧化钇涂覆的陶瓷部件165的另一个优选的实施方案。在这个实施方案中，在衬底70上的含氧化钇的涂层80之上通过热喷涂至少一层另外的含氧化钇的涂层90来覆盖在氧化钇涂覆的衬底70的暴露表面82上的氧化钇颗粒。外部的含氧化钇的涂层90具有足够的厚度来盖住下面的含氧化钇的涂层80的暴露表面82上的氧化钇颗粒，这样，当部件165被装配在等离子体腔中时，氧化钇颗粒就不会暴露在等离子体中。
向衬底70上施用含氧化钇的涂层80，以及另外在上面的含氧化钇的涂层(例如涂层90)的优选热喷涂技术是等离子体喷涂。例如，在L.Pawlowski，The Science and Engineering of Thermal SprayCoatings(John Wiley & Sons，1996)中描述了等离子体喷涂技术，因此，将其整个通过引用而引入。
热喷涂的含氧化钇的涂层在喷涂之后的厚度从大约0.001英寸到大约1英寸，优选的从大约0.001英寸到大约0.5英寸，更优选的从大约0.001英寸到大约0.01英寸。可以对含氧化钇的涂层的厚度进行选择，以使其与所遇到的等离子体环境(例如刻蚀，淀积，或者抗蚀剂剥离)相容。
热喷涂的含氧化钇的涂层80可以直接形成在衬底70上，预先对衬底表面72可以进行粗化或者不进行粗化，且无需中间涂层来提高涂层的粘附性。在一个优选的实施方案中，含氧化钇的涂层80提供了与衬底70的合适的粘附性，而没有预先对衬底进行粗化和/或形成中间层，这样就避免了另外的工艺步骤。含氧化钇的涂层80与下面的衬底70之间具有高的结合强度。优选的，含氧化钇的涂层所具有的抗拉结合强度从大约200ksi到大约400ksi。
形成的热喷涂的含氧化钇的涂层可具有所希望的表面粗糙度特征，且可具有的表面粗糙度范围从光滑到粗糙。粗糙的含氧化钇的表面能够有效提高淀积物的粘附性，淀积物比如在等离子体刻蚀过程中，例如金属刻蚀过程中，因采用聚合物形成物质(例如碳氟化合物)而产生的聚合物淀积物。正如在共同未决的US专利申请No.09/749917中描述的那样，在刻蚀过程中这些聚合物淀积物会从腔室表面脱落下来并污染腔室中的衬底，这里通过引用引入该申请的全部。重复的等离子体工艺周期中产生的热循环会使这个问题恶化。
热喷涂的含氧化钇的涂层可以具有的算术平均表面粗糙度(Ra)的范围从大约5到大约500微英寸，优选的从大约120到大约250微英寸。在此优选范围内的表面粗糙度值可以提高在等离子体刻蚀工艺中，淀积在反应腔室内表面上的聚合物的粘附性，由此降低这些聚合物淀积物对处理的衬底所产生污染的发生。
含氧化钇的涂层可具有低的孔隙率，这可以使侵蚀性(aggressive)气氛与下面的衬底之间的接触最小化，由此还可以使随后的因这些侵蚀性气氛对衬底的腐蚀，侵蚀和/或腐蚀-侵蚀而产生的物理和/或化学冲击最小化。优选的，含氧化钇的涂层具有的孔隙率按体积比小于20％，更优选的按体积比小于大约5％。
另外，含氧化钇的涂层可具有足够的硬度以抵抗侵蚀。
含氧化钇的涂层具有的晶体结构优选的为大约10％到大约100％立方晶体结构，更优选的，从大约95％到大约100％立方晶体结构。
含氧化钇的涂层可提供所希望的抗磨损性能，以用在半导体加工设备中，像例如等离子体刻蚀腔，特别的，在等离子体反应腔中，含氧化钇的涂层提供的表面可以降低离子引起的侵蚀并降低相并的颗粒污染水平。含氧化钇的涂层还可保护下面的衬底免于等离子体的物理和化学冲击。
氧化钇涂覆的陶瓷部件可以用在各种等离子体气氛中以用于刻蚀，淀积，抗蚀剂剥离以及其它应用。典型的刻蚀化学品包括例如含氯的气体，包括但不限于，Cl2，HCl和BCl3；含溴的气体，包括但不限于，Br2和HBr；含氧的气体，包括但不限于，O2，H2O和SO2；含氟的气体，包括但不限于，CF4，CH2F2，NF3，CH3F，C2F6，CHF3和SF6；以及惰性气体或者其它气体，包括但不限于，He，Ar和N2。依赖于所希望的等离子体，这些和其它气体可以以任意合适的组合方式使用。各种工艺气体的合适流速可以基于下面的参数进行选择，这些参数包括但不限于，等离子体反应室的类型，电源配置，腔室压力，等离子体解离速率，刻蚀化学品，刻蚀的材料，以及采用工艺气体的刻蚀工艺的特定步骤。
在半导体等离子体刻蚀工艺中，氧化钇涂覆的陶瓷部件可以用在半导体加工设备的刻蚀腔中用来刻蚀含硅和含金属材料的。例如，在这些腔中可以刻蚀的含硅材料，含硅材料包括但不限于，单晶硅，多晶硅，非晶硅，氮化硅，氮氧化硅，硅化物，二氧化硅，低k材料和高k材料。含硅的材料可以是掺杂的或者未掺杂的和/或退火的或者未退火的。还可采用应变硅。
可以刻蚀的导电的或者半导性的含金属材料包括但不限于，铝，铝合金，铜，铜合金，钨，钨合金，钛，钛合金，钽，钽合金，铂，铂合金，钌，钌合金，铬，铬合金，铁，铁合金，镍，镍合金，钴，钴合金，钼，钼合金，钛，钨，铬，钴和/或钼的硅化物，铁电材料，比如硅化铂和氧化钌，以及GMR材料，比如氮化钽，硅化铬和NiFeCo合金。
例如，氧化钇涂覆的陶瓷部件可用作多晶硅高密度等离子体反应室中的反应室部件。这种类型的示例性反应器的例子是可以从California的Lam Research Corporation of Fremont得到的TCP9400TM等离子体刻蚀反应器。在这种反应器中，将工艺气体(例如Cl2，HBr，CF4，CH2F2，O2，N2，Ar，SF6和NF3)供入位于刻蚀腔底部的供气环中，然后通过气孔导入到反应腔中。图3是TCP 9400TM多晶硅刻蚀反应器中的气环的剖面图。如图3所示，气环40的主体包围在衬底支架44周围，气环40的底面含有一个环形导气槽60。气孔50延伸到导气槽60中。由从线圈通过介电屏蔽进入到腔室内部的感应耦合RF能产生高密度等离子体。
气环40一般由铝制成。气环的上表面直接暴露于等离子体中，这样就会受到侵蚀。为保护这些表面，气环可以是氧化钇涂覆的陶瓷部件，其含有暴露的含氧化钇的涂层42。这种多晶硅刻蚀反应器中的其它的在工艺过程中暴露在等离子体中的部件也可以是氧化钇涂覆的陶瓷部件。这些部件包括腔壁，腔衬里，卡盘设备以及介电窗。
另一个示例性的多晶硅刻蚀反应器是同样可以从California的Lam Research Corporation of Fremont得到的VersysTM多晶硅刻蚀器或2300TM刻蚀器。图4是2300TM多晶硅刻蚀反应器的横截面图，其包括衬底支架152，其静电卡盘154，该卡盘可以对固定在其上的衬底施加钳制力。在静电卡盘154周围在衬底支架152上按所示固定着等离子体聚焦环170。衬底支架152也能用来对衬底施加RF偏压。衬底能用传热气体进行背冷。在2300TM刻蚀器中，工艺气体(例如Cl2，HBr，CF4，CH2F2，O2，N2，Ar，SF6和NF3)通过与气体供应156相连的气体注入嘴168导入到腔室150中。气体注入嘴168一般用石英或者陶瓷材料比如氧化铝制成。正如所示，感应线圈158可以用适宜的RF源驱动来提供高密度等离子体。感应线圈158通过介电窗160将RF能量耦合到腔室150内部中。介电窗160一般由石英或者氧化铝制成。介电窗160按所示固定在环状元件162上，环状元件162将介电窗160从腔室150的顶部隔开并被称作“气体分布板”。腔衬里164包围着衬底支架152。腔室150还可以包括适宜的真空泵装置以使腔室内部维持在所希望的压力。
在图3所示的示例性实施方案中，特定的反应器部件比如环状元件162，介电窗160，衬底支架152，腔衬里164，气体注入嘴168，聚焦环170和/或静电卡盘154可以是氧化钇涂覆的部件并具有暴露的含氧化钇的涂层166。如图4中所示，腔室150的壁和在腔衬里164下面的衬底支架152也可以是氧化钇涂覆的陶瓷部件。这些部件的任何一个或者全部以及任何其它的暴露在等离子体中的部件可以是氧化钇涂覆的陶瓷部件。
这些反应器部件也能用在高密度氧化物刻蚀工艺中。一种示例性的氧化物刻蚀反应器是可以从California的Lam ResearchCorporation of Fremont得到的TCP 9100TM等离子体刻蚀反应器。在TCP 9100TM反应器中，气体分布板是一个直接位于TCPTM窗下面的圆形板，TCPTM窗也是位于反应器顶部的真空密封面，其位于被处理的衬底上部并与之平行的平面内。气体分布环从气源向气体分布板、窗的内表面和气体分布环限定的空间中供气，该窗位于向反应器中供应RF能量的平面螺旋线圈式天线下面。气体分布板中含有贯穿该板的孔。气体分布板材料是介电性的，能够将RF能量通过气体分布板耦合到反应器中。而且，希望气体分布板材料对在诸如氧或水-碳氟气等离子体环境中的化学溅射刻蚀具有高度的抵抗性，以避免破坏和由此引起的颗粒的产生。
图5所示的是这种类型的等离子体反应室。该反应室包含等离子体腔10，其包括衬底支架12，其具有静电卡盘34，该卡盘可以对衬底13施加钳制力以及对衬底施加RF偏置。衬底能够用传热气体进行背冷。聚焦环14将等离子体限定在衬底上面的区域里。在腔室中的高密度(例如1011-1012个离子/cm3)等离子体的能量源，比如用适宜的RF源驱动来提供高密度等离子体的天线18，置于等离子体腔室10的顶部。该腔室包括适宜的真空泵装置以使腔室内部维持在所希望的压力(例如在50mTorr以下，典型的在1-20mTorr)。
在天线18和等离子体工艺腔10的内部之间提供基本上平的介电窗20，该介电窗在工艺腔10的顶部形成真空壁。气体分布板22位于窗20的下方，并包括将工艺气体从气体供应23递送到腔室10中的开口。圆锥状或圆柱状的衬里30从气体分布板延伸并环绕在衬底支架12周围。可选的，天线18可以提供有通道24，传热流体通过入口和出口管道25，26在该通道中循环。
在操作中，将半导体衬底比如硅晶片放到衬底支架12上，并用静电卡盘34固定到位。将工艺气体供入真空工艺腔10中。通过向天线18上供应RF源，在衬底和窗20之间的空间中产生高密度等离子体。
在图5所示的设备中，各种反应器部件比如气体分布板22，腔衬里30，静电卡盘34和聚焦环14可以是氧化钇涂覆的陶瓷部件，其含有暴露的含氧化钇的涂层32。
上述高密度多晶硅和介电刻蚀腔仅仅是引入了氧化钇涂覆的陶瓷部件的等离子体刻蚀反应室的例子。这种部件可以用在任何刻蚀反应器(例如金属刻蚀反应器)中，或者其中存在等离子体侵蚀问题的其它类型的半导体加工设备中。
其它的氧化钇涂覆的部件可以是腔壁，衬底支架，紧固件以及其它类似部件，这些部件一般暴露在等离子体中。其它的部件可以不直接暴露在等离子体中，但暴露在腐蚀性气体，比如从处理的晶片中释放出的气体或者其它类似气体中。在处理半导体衬底中使用的其它设备也可以是氧化钇涂覆的陶瓷部件。这些设备可包括传送机构，气体供应系统，衬里，升降机构，加载锁，室门机构，机械臂，紧固件及其它类似的设备。
尽管参照具体实施方案对本发明进行了详细描述，对本领域技术人员来讲，明显的可以对其进行各种更改和修正，并可采用各种等同物，而不脱离所附权利要求的范围。

Claims (24)

1.半导体材料加工设备中的氧化钇涂覆的陶瓷部件，包括：
包含陶瓷材料的衬底；
在衬底的至少一个表面上热喷涂的第一含氧化钇涂层；以及
在衬底和第一含氧化钇的涂层之间的界面处的包含多相氧化物的结合层，该多相氧化物包括该陶瓷材料和氧化钇，该结合层通过衬底和热喷涂后的第一含氧化钇的涂层之间的共烧结形成；
其中(i)第一含氧化钇的涂层包括经过等离子体调节处理的暴露表面，以减少共烧结后附着在暴露表面的氧化钇颗粒，或者(ii)该部件进一步包括在烧结的第一含氧化钇的涂层上热喷涂的第二含氧化钇涂层，该第二含氧化钇的涂层覆盖附着在暴露表面上的氧化钇颗粒。
2.权利要求1中的部件，其中
当(i)时，第一含氧化钇的涂层的孔隙率低于约20％，晶体结构为大约95％到大约100％的立方晶体结构，结合强度为大约200ksi到大约400ksi；
当(ii)时，第一和第二含氧化钇的涂层的孔隙率低于大约20％，晶体结构为大约95％到大约100％的立方晶体结构，结合强度为大约200ksi到大约400ksi。
3.权利要求1中的部件，其中该部件选自介电窗、腔壁、腔衬里、衬底支架、档板、气体分布板、等离子体限制环、喷嘴、紧固件、加热件、等离子体聚焦环、卡盘和等离子体屏。 
4.权利要求1中的部件，其中该衬底包含选自氧化铝、石英、氧化锆、碳化硅、氮化硅、碳化硼、氮化硼、氮化铝和它们的混和物的陶瓷材料。
5.权利要求1中的部件，其中该部件中包括第二含氧化钇的涂层，并且第一和第二含氧化钇的涂层包含选自La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb和Lu中的至少一种元素的氧化物、碳化物、氮化物、硼化物和/或碳氮化物。
6.权利要求1中的部件，其中该部件中包括第二含氧化钇的涂层，并且第一和第二含氧化钇的涂层位于衬底的整个外表面上。
7.权利要求1中的部件，其中该部件中包括第二含氧化钇的涂层，并且第一和第二含氧化钇的涂层基本上由氧化钇构成。
8.权利要求1中的部件，其中该部件中包括第二含氧化钇的涂层，该涂层包含具有的粗糙度能有效提高淀积在暴露表面上的聚合物淀积物的粘附性的暴露表面。
9.权利要求1中的部件，其中：
衬底基本上由氧化铝构成；
第一涂层基本上由氧化钇构成；
结合层包含钇铝石榴石；并且
该部件中包括第二基本上由氧化钇构成的含氧化钇的涂层。
10.权利要求1中的部件，其中该半导体材料加工设备包括等离子体刻蚀器。 
11.包含至少一个依据权利要求1中的部件的半导体材料加工设备。
12.在半导体材料加工设备中加工半导体材料的方法，包括在含有至少一个依据权利要求1中的部件的半导体材料加工设备的等离子体腔中用等离子体加工半导体材料。
13.依据权利要求12中的方法，其中该加工包括在等离子体腔中等离子体刻蚀多晶硅半导体材料。
14.制造半导体材料加工设备中的氧化钇涂覆的陶瓷部件的方法，包括在衬底的至少一个表面上热喷涂第一含氧化钇的涂层，该衬底包含陶瓷材料生坯；将衬底和热喷涂后的第一含氧化钇的涂层共烧结，以便在衬底和第一含氧化钇的涂层之间的界面处形成包含多相氧化物的结合层，该多相氧化物包括该陶瓷材料和氧化钇；并在第一含氧化钇的涂层上热喷涂第二含氧化钇的涂层。
15.权利要求14中的方法，进一步包括，在共烧结后，用等离子体调节处理对第一含氧化钇的涂层的暴露表面进行处理，以便减少在共烧结后附着在暴露表面上的氧化钇颗粒。
16.权利要求14中的方法，其中的陶瓷材料是氧化铝，第一和第二含氧化钇的涂层基本上由氧化钇构成。
17.权利要求14中的方法，其中在大约800℃到大约1600℃的温度下对衬底和第一含氧化钇的涂层进行共烧结，持续最长大约7天的时间。
18.权利要求14中的方法，其中该部件选自介电窗、腔壁、腔衬里、衬底支架、挡板、气体分布板、等离子体限制环、喷嘴、紧固件、加热件、等离子体聚焦环、卡盘和等离子体屏。 
19.权利要求14中的方法，其中该衬底包含选自氧化铝、石英、氧化锆、碳化硅、氮化硅、碳化硼、氮化硼、氮化铝和它们的混和物的陶瓷材料。
20.权利要求14中的方法，其中第一和第二含氧化钇的涂层中包含选自La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Br、Tm、Yb和Lu中的至少一种元素的氧化物、碳化物、氮化物、硼化物和/或碳氮化物。
21.权利要求14中的方法，其中在衬底的整个外表面上热喷涂第一和第二含氧化钇的涂层。
22.权利要求14中的方法，其中第二含氧化钇的涂层上包括具有的粗糙度能有效提高淀积在暴露表面上的聚合物颗粒形式的等离子体刻蚀副产物的粘附性的暴露表面。
23.权利要求14中的方法，其中该半导体材料加工设备包括等离子体刻蚀器。
24.制造半导体材料工艺腔中的氧化钇涂覆的陶瓷部件的方法，包括：
将含有陶瓷材料的衬底进行部分烧结；
在衬底的至少一个表面上热喷涂第一含氧化钇的涂层；
将衬底和热喷涂后的第一含氧化钇的涂层共烧结，以便在衬底和第一含氧化钇的涂层之间的界面处形成包括该陶瓷材料和氧化钇的多相氧化物的结合层；并
(i)用等离子体调节处理处理第一含氧化钇的涂层的暴露表面，以便减少共烧结后附着在暴露表面上的氧化钇颗粒，或者(ii)在烧结后的第一含氧化钇的涂层上面热喷涂第二含氧化钇的涂层，以便覆盖共烧结后附着在暴露表面上的氧化钇颗粒。 
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