TWI381415B - 半導體材料處理裝置之氧化釔鍍膜陶瓷元件以及製造該等元件之方法 - Google Patents

半導體材料處理裝置之氧化釔鍍膜陶瓷元件以及製造該等元件之方法 Download PDF

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TWI381415B
TWI381415B TW093139417A TW93139417A TWI381415B TW I381415 B TWI381415 B TW I381415B TW 093139417 A TW093139417 A TW 093139417A TW 93139417 A TW93139417 A TW 93139417A TW I381415 B TWI381415 B TW I381415B
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containing coating
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Description

半導體材料處理裝置之氧化釔鍍膜陶瓷元件以及製造該等元件之方法
本發明係關於半導體材料處理裝置之氧化釔鍍膜陶瓷元件以及製造該等元件之方法。
在半導體材料處理領域中，使用包含真空處理腔室之半導體材料處理裝置以用於(例如)蝕刻及基板上各種材料之化學氣相沉積(CVD)且防止脫膜。該等處理包含向真空腔室提供處理氣體及向處理氣體施加RF場以產生電漿。由於在此等處理腔室內之處理氣體及電漿之腐蝕特性，且由於需要使腔室中被處理基板之微粒及/或金屬污染物最小化，需要此等裝置之曝露於電漿之元件具有抵抗此等氣體及電漿侵蝕及腐蝕的能力。
本發明提供一種半導體處理裝置之氧化釔鍍膜陶瓷元件。氧化釔鍍膜陶瓷元件之較佳實施例包括一包含陶瓷材料生坯之基板；及在基板之至少一表面上之經熱噴塗之含氧化釔鍍膜。
該基板可包括各種陶瓷材料。在一較佳實施例中，該基板包括氧化鋁。該含氧化釔鍍膜大體上可由釔組成，或其可進一步包括一或多種其它化合物。
該元件可為如半導體材料處理裝置之介電質窗、腔室壁、腔室襯墊、基板支撐、擋板、氣體分佈板、電漿密封環、噴嘴、扣件、發熱零件(element)、電漿聚焦環、夾盤 或電漿螢幕。
半導體材料處理裝置之氧化釔鍍膜陶瓷元件之另一較佳實施例包括一含有陶瓷材料之基板；一位於基板上之經熱噴塗之第一含氧化釔鍍膜；及一位於基板與第一含氧化釔鍍膜之間的介面之包括陶瓷材料及氧化釔之多相氧化物的結合層。藉由共同燒結該基板及該經類似熱噴塗之第一鍍膜來形成結合層。在另一較佳實施例中，可藉由電漿調節處理來處理含氧化釔鍍膜之曝露表面以減少共同燒結之後附著至曝露表面之氧化釔微粒。在又一較佳實施例中，在經燒結之第一含氧化釔鍍膜上可提供經類似熱噴塗之第二含氧化釔鍍膜以覆蓋氧化釔微粒。
在氧化釔鍍膜陶瓷元件之較佳實施例中，第二含氧化釔鍍膜可具有一有效增強沉積物與表面之黏著力的表面粗糙度。
一製造一半導體材料處理裝置之氧化釔鍍膜陶瓷元件之方法的較佳實施例包括在基板之至少一表面上熱噴塗一含氧化釔鍍膜，該基板為陶瓷材料之生坯。
製造一半導體材料處理裝置之氧化釔鍍膜陶瓷元件之方法的另一較佳實施例包括共同燒結基板及經類似熱噴塗之含氧化釔鍍膜，以形成一位於基板與含氧化釔鍍膜之間的介面之結合層，該結合層包括陶瓷材料及氧化釔之多相氧化物。
製造一半導體材料處理裝置之氧化釔鍍膜陶瓷元件之方法的另一較佳實施例包括在共同燒結之後在含氧化釔鍍膜 上熱噴塗第二含氧化釔鍍膜。
製造一半導體材料處理裝置之氧化釔鍍膜陶瓷元件之方法的另一較佳實施例包括藉由電漿調節處理來處理含氧化釔鍍膜之曝露表面，以減少共同燒結之後附著至該曝露表面的氧化釔微粒。
本發明提供半導體材料處理裝置之氧化釔(yttria)鍍膜陶瓷元件。在處理基板之過程中，陶瓷元件之含氧化釔鍍膜有防止由半導體材料處理裝置之電漿處理腔室中之腐蝕性氣體及電漿所引起的物理及/或化學侵蝕之抗磨損作用。如本文所使用，術語"抗磨損"包含(但不限於)抵抗由處理氣體、電漿或電漿副產物引起的侵蝕、腐蝕及/或腐蝕-侵蝕。
氧化釔鍍膜陶瓷元件之較佳實施例包括形成該等元件之外部表面的至少一含氧化釔鍍膜且該鍍膜抵抗用於處理半導體材料之裝置中由腐蝕性氣體及電漿引起的化學及/或物理侵蝕。此等裝置可用於蝕刻、沉積(例如，CVD、PECVD及其類似)或半導體基板(例如，半導體晶圓、平板顯示器基板，及其類似物)製造中所使用之抗蝕劑剝離處理。
氧化釔鍍膜陶瓷元件可為在半導體材料處理裝置中曝露於電漿及/或腐蝕性氣體之各種元件。此等例示性元件可包含(但不限於)電漿及/或真空腔室(例如，電漿蝕刻器)之部分，諸如介電質窗、腔室壁、腔室襯墊、基板支撐、擋板、氣體分佈板、氣體分佈環、夾盤機構(例如，靜電夾盤)、聚焦環、噴嘴、扣件、加熱零件、電漿螢幕，及其類似物。
如圖1所示，氧化釔鍍膜元件65之一較佳實施例包含一包括陶瓷材料之基板70，及該基板之至少表面72上之經熱噴塗之含氧化釔鍍膜80。該基板70之陶瓷材料可包含如化學計量及非化學計量氧化鋁(Al2 O3 )、石英、氧化鋯、碳化矽(SiC)、氮化矽(Si3 N4 )、碳化硼(B4 C)、氮化硼(BN)、氮化鋁或其混合物。在一較佳實施例中，該陶瓷材料為氧化鋁。
舉例而言，可藉由製備陶瓷材料之漿料，並以該漿料形成所要形狀之生坯(藉由諸如壓製技術、粉漿澆鑄及其類似方法)，來製造氧化釔鍍膜陶瓷元件65之基板70。漿料中亦可包含黏合劑及其它合適之添加劑。宜以所要元件之形狀，形成未加工壓坯。在一較佳實施例中，在生坯之一或多個表面上熱噴塗含氧化釔鍍膜80，意即並未部分地或全部地燒結陶瓷材料，以於熱噴塗之前，改良部分或全部機械強度。
另一較佳實施例包括於基板之一或多個表面上熱噴塗含氧化釔鍍膜80之前，部分地燒結基板70。舉例而言，可在約800℃至1600℃之溫度下部分地燒結該基板。燒結時間可視以下因素而變化，該等因素包含元件大小及形狀，及欲藉由燒結達成之密度水平，如全密度之約60%至約80%。舉例而言，燒結時間可在約1小時至若干天之範圍內，以於基板上熱噴塗含氧化釔鍍膜之前，達成元件中之部分機械強度。舉例來說，Engineered Materials Handbook®，第4卷，第3及第4部分，第123-304頁(ASM International,1991)描述可用以形成該基板，並使其緻密之例示性陶瓷處理技術之 詳細資料，其全文以引用的方式併入本文中。
最好藉由僅將氧化釔熱噴塗至表面來形成塗覆於基板70上之含氧化釔鍍膜80，及如下所述之可塗覆於第一塗覆之含氧化釔鍍膜80之上之一或多個額外的含氧化釔鍍膜。元件之含氧化釔鍍膜亦可包含各種化合物，諸如一或多種至少含La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb及Lu其中之一的氧化物、碳化物、氮化物、硼化物及/或碳氮化物。為了嘗試使包含一或多個氧化釔鍍膜陶瓷元件之電漿處理裝置中，所處理之基板的污染最小化，該含氧化釔鍍膜宜具有高純度。舉例而言，含氧化釔鍍膜宜含有最小量可能污染基板(諸如半導體晶圓)之元素。此等元素包含過渡金屬、鹼金屬及其類似物。在較佳實施例中，可充分地提純含氧化釔鍍膜，以避免1010 原子/cm2 或更高之晶圓上污染，而其中以避免105 原子/cm2 或更高之晶圓上污染較佳。含氧化釔材料以具有至少約99%之純度較佳，而以約99.95%至約100%之純度更佳。
在於基板70與含氧化釔鍍膜80之間的介面有效產生一結合層74且完全燒結該基板之條件下較佳共同燒結基板70及塗覆於基板上之含氧化釔鍍膜80。該結合層74提供經塗覆之含氧化釔鍍膜80與基板70的經增強之黏接強度。較佳於約800℃至約1500℃之溫度下經高達約7天之時間進行共同燒結。可在真空氣氛或惰性氣體氣氛下進行共同燒結。在基板70與含氧化釔鍍膜80之間所形成之結合層74之組合物及結構視基板之陶瓷材料而定。舉例而言，在基板為氧化 鋁之實施例中，結合層可包含多相氧化物結構，其包含諸如3Y2 O3 -5Al2 O3 及/或Y2 O3 -Al2 O3 之氧化釔及氧化鋁。舉例而言，在基板為氧化鋯之實施例中，結合層可包含Y2 Zr2 O7 。
共同燒結處理可在含氧化釔鍍膜80上產生大體上不存在微小裂痕之表面光潔度，在電漿處理期間，在電漿處理裝置中由於元件之熱循環疲乏，該等微小裂痕可導致微粒產生。
然而，已經判定塗覆於基板70上之經類似燒結之含氧化釔鍍膜80可包含附著至此鍍膜之曝露外部表面82之氧化釔微粒。在電漿處理期間，該等氧化釔微粒可藉由曝露於電漿而潛在地移除，且因此會污染基板。在一較佳實施例中，藉由電漿調節處理來處理在經共同燒結元件之基板70上形成的含氧化釔鍍膜80之曝露表面82，以減少附著至曝露表面的附著之氧化釔微粒。用於自曝露表面82移除此等附著之氧化釔微粒的合適電漿調節處理描述於同在申請中之美國專利申請案第09/607,922號中，其全文以引用的方式併入本文中。可藉由在半導體材料處理裝置之電漿處理腔室中安裝元件65來執行電漿調節，且電漿調節該元件以在用存在於腔室中之元件65處理任何生產晶圓之前自曝露之含氧化釔表面移除氧化釔微粒。
圖2展示氧化釔鍍膜陶瓷元件165之另一較佳實施例。在此實施例中，藉由在基板70之含氧化釔鍍膜80上熱噴塗至少一額外含氧化釔鍍膜90來覆蓋在氧化釔鍍膜基板70之曝露表面82上的氧化釔微粒。該外部含氧化釔鍍膜90具有足夠厚度以覆蓋下方含氧化釔鍍膜80之曝露表面82上的氧化 釔微粒，使得當元件165安裝於電漿腔室中時氧化釔微粒不會曝露於電漿。
電漿噴塗係用於塗覆基板70上之含氧化釔鍍膜80以及額外上覆之含氧化釔鍍膜(例如，鍍膜90)的較佳熱噴塗技術。電漿噴塗技術描述於如L.Pawlowski,The Science and Engineering of Thermal Spray Coatings(John Wiley & Sons,1996)，其全文以引用的方式併入本文中。
經熱噴塗之含氧化釔鍍膜可具有自約0.001英吋至約1英吋、較佳自約0.001英吋至約0.5英吋且更佳自約0.001英吋至約0.01英吋之類似噴塗厚度。可選擇該含氧化釔鍍膜之厚度以與待遇到之電漿環境(例如，蝕刻、沉積或抗蝕劑剝離)相容。
在不論是否事先使基板表面72粗糙化且沒有中間鍍膜之情況下，經熱噴塗之含氧化釔鍍膜80可直接形成於基板70上以促進鍍膜之黏著力。在一較佳實施例中，在未事先使基板粗糙化及/或形成中間層之情況下，該含氧化釔鍍膜80提供了至基板70之合適黏著，因此避免了額外的處理步驟。該含氧化釔鍍膜80具有與下方基板70之高度結合力。較佳地，該含氧化釔鍍膜具有自約200 ksi至約400 ksi之抗拉結合力。
可形成具有所要表面粗糙度特徵之經熱噴塗之含氧化釔鍍膜，且該鍍膜可具有在自光滑至粗糙之範圍中的表面粗糙度。粗糙的含氧化釔表面可有效改良沉積物之黏著力，該等沉積物諸如在電漿蝕刻處理過程(例如，金屬蝕刻處理) 中由使用聚合物形成種類(例如，碳氟化合物)所引起之聚合物沉積物。如同在申請中之美國專利申請案第09/749,917號中所描述的，此等聚合物沉積物在蝕刻處理期間可自腔室表面脫落並污染腔室中之基板，該案之全文以引用的方式併入本文中。在重複電漿處理循環期間發生的熱循環可加重此問題。
經熱噴塗之含氧化釔鍍膜可具有自約5至約500微英吋且較佳自約120至約250微英吋之範圍的算術平均表面粗糙度(Ra)值。在此較佳範圍內之表面粗度值可增強在電漿蝕刻過程期間沉積於反應腔室之內表面上之聚合物的黏著力，藉此減少由聚合物沉積物所導致的處理基板之污染的發生。
該含氧化釔鍍膜可具有較低孔隙率水平，其可使侵蝕性空氣與下方基板之接觸最小化，且因此亦使由此等侵蝕性空氣引起之隨後的基板之腐蝕、侵蝕及/或腐蝕-侵蝕之物理及/或化學侵蝕最小化。較佳地，含氧化釔鍍膜具有按體積計小於20%，更佳為按體積計小於約5%之孔隙率。
此外，該含氧化釔鍍膜可具有足夠之硬度以抵抗侵蝕。
該含氧化釔鍍膜具有晶體結構，該結構較佳自約10%至約100%立方(cubic)且更佳自約95%至約100%立方。
該含氧化釔鍍膜可提供用於諸如電漿蝕刻腔室之半導體處理裝置的所要之抗磨特性。詳言之，該含氧化釔鍍膜提供可減少離子引入侵蝕及電漿反應室腔室內微粒污染之相關水平的表面。該含氧化釔鍍膜亦可保護下方基板抵抗電漿引起之物理侵蝕及化學侵蝕。
可於蝕刻、沉積、抗蝕劑剝離及其它應用之各種電漿氣氛下，使用該等氧化釔鍍膜陶瓷元件。典型蝕刻化學試劑可包含(例如)：含氯氣體，其包含(但不限於)Cl2 、HCl及BCl3 ；含溴氣體，其包含(但不限於)Br2 及HBr；含氧氣體，其包含(但不限於)O2 、H2 O及SO2 ；含氟氣體，包含(但不限於)CF4 、CH2 F2 、NF3 、CH3 F、C2 F6 、CHF3 及SF6 ；及惰性氣體與其它氣體，其包含(但不限於)He、Ar及N2 。依據所要之電漿，可以任何合適之組合來使用該等及其它氣體。可基於諸多因素選擇各種處理氣體之合適流速，該等因素包含(但不限於)電漿反應器之類型、功率設定、腔室壓力電漿分解速率、蝕刻化學試劑、經蝕刻之材料，及其中使用處理氣體之蝕刻過程的特定步驟。
該氧化釔鍍膜陶瓷元件可用於半導體電漿蝕刻過程，蝕刻含矽及含金屬材料之半導體處理設備之蝕刻腔室中。舉例而言，可在此等蝕刻腔室中蝕刻之含矽材料包含(但不限於)單晶矽、多晶矽、非晶矽、氮化矽、氮氧化矽、矽化物、二氧化矽、低k材料及高k材料。含矽材料可為經摻雜或未經摻雜的，及/或經退火或未經退火的。
可被蝕刻之導電或半導電含金屬材料包含(但不限於)鋁、鋁合金、銅、銅合金、鎢、鎢合金、鈦、鈦合金、鉭、鉭合金、鉑、鉑合金、釕、釕合金、鉻、鉻合金、鐵、鐵合金、鎳、鎳合金、鈷、鈷合金、鉬、鉬合金、鈦、鎢、鉻、鈷及/或鉬之矽化物，諸如矽化鉑及氧化釕之鐵電材料，及諸如氮化鉭、矽化鉻及NiFeCo合金之GMR材料。
舉例而言，可將氧化釔鍍膜陶瓷元件用作多晶矽高密度電漿反應器中之反應器元件。此類型之例示性反應器為California之Lam Research Corporation of Fremont所生產之TCP 9400TM 電漿蝕刻反應器。在此反應器中，將處理氣體(例如，Cl2 、HBr、CF4 、CH2 F2 、O2 、N2 、Ar、SF6 及NF3 )供予位於蝕刻腔室底部之氣環，且接著經由進氣孔流入反應器腔室中。圖3展示了TCP 9400TM 多晶矽蝕刻反應器之氣環的截面圖。如圖3所展示，氣環40之主體環繞基板支撐44。氣環40之底部表面含有一環狀氣體導向溝槽60。氣孔50延伸進入氣體導向溝槽60。經由介電質屏蔽，使來自線圈之RF能量電感耦合至腔室內部，產生高密度電漿。
氣環40通常包含鋁。該氣環之上表面直接曝露於電漿，且因此受到侵蝕。為了保護該等表面，氣環可為包含曝露含氧化釔鍍膜42之氧化釔鍍膜陶瓷元件。在處理期間曝露於電漿之此等多晶矽蝕刻反應器之其它元件亦可為氧化釔鍍膜陶瓷元件。該等元件包含腔室壁、腔室襯墊、夾盤器件及介電質窗。
多晶矽反應器之另一實施例為Versys多晶矽蝕刻器或2300蝕刻器，其亦為California之Lam Research Corporation of Fremont所生產。圖4展示了2300多晶矽蝕刻反應器之截面圖，該2300多晶矽蝕刻反應器含有一具有一靜電夾盤154之基板支撐152，當該夾盤安裝於基板上時其對基板提供一夾持力。電漿聚焦環170展示為環繞靜電夾盤154而安裝於基板支撐152上。基板支撐152亦可用於施加 RF偏壓至基板。可使用傳熱氣體來背部冷卻該基板。在2300蝕刻器中，經由連接至氣體供給156之氣體噴射器168來將處理氣體(例如，Cl2 、HBr、CF4 、CH2 F2 、O2 、N2 、Ar、SF6 及NF3 )引入腔室150內。氣體噴射器168通常由石英或諸如氧化鋁之陶瓷材料製成。如圖所示，可藉由合適RF源向電感線圈158提供動力以供應高密度電漿。該電感線圈158經由介電質窗160將RF能量耦合至腔室150內部。該介電質窗160通常由石英或氧化鋁製成。如圖示介電質窗160安裝於環形構件162上，該構件使介電質窗160與腔室150頂端間隔開且其被稱為氣體分佈板。腔室襯墊164環繞基板支撐152。腔室150亦可包含用於使腔室內部維持在所要壓力之合適真空抽汲裝置。
在如圖3所示之例示性實施例中，諸如環形構件162、介電質窗160、基板支撐152、腔室襯墊164、氣體噴射器168、聚焦環170及/或靜電夾盤154之某些反應器元件可為氧化釔鍍膜陶瓷元件且具有曝露之含氧化釔鍍膜166。如圖4所示，腔室150及腔室襯墊164下方之基板支撐152之壁亦可為氧化釔鍍膜陶瓷元件。該等元件之任何一個或全部以及任何其它曝露於電漿之元件均可為氧化釔鍍膜陶瓷元件。
反應器元件亦可用於高密度氧化物蝕刻處理。一例示性氧化物蝕刻反應器為California之Lam Research Corporation of Fremont生產之TCp 9100TM 電漿蝕刻反應器。在TCP 9100TM 反應器中，氣體分佈板係一直接位於TCPTM 窗下方之圓形板，其亦係位於一正在處理之基板上方且與該基板平 行之平面的在反應器頂端之真空密封表面。氣體分佈環自氣體源將氣體饋送至由氣體分佈板、位於向反應器內供給RF能量之平面螺旋線圈形式之天線下方的窗之內表面，及氣體分佈環所界定的空間。氣體分佈板含有延伸穿過該板之孔。氣體分佈板材料為介電質以使此RF功率能夠經由氣體分佈板而耦合進入反應器。此外，需要使氣體分佈板之材料具有在諸如氧氣或氫化碳氟化合物氣體電漿之環境中高度抵抗化學濺鍍蝕刻的能力，以避免損毀及與其相關之微粒產生。
圖5說明此類型之電漿反應器。該反應器包括一電漿腔室10，該電漿腔室10包含一具有靜電夾盤34之基板固持器12，該夾盤向基板13提供夾持力且向基板提供RF偏壓。可使用傳熱氣體來背部冷卻該基板。聚焦環14將電漿限制於基板上方之區域。在電漿腔室10之頂端安置諸如天線18之用於在腔室中維持高密度(例如，1011 -1012 離子/cm3 )電漿之能量源，其由合適RF源提供動力以供應高密度電漿。該腔室包含用於使腔室內部維持在所要壓力(例如，50 mTorr以下，通常為1-20 mTorr)之合適真空抽汲裝置。
在天線18與電漿處理腔室10之內部之間提供一大體上平坦的介電質窗20，且在處理腔室10之頂端形成真空壁。氣體分佈板22位於窗20下方且包含用於自氣體供應23輸送處理氣體至腔室10之開口。圓錐或圓柱襯墊30自氣體分佈板延伸且環繞基板固持器12。天線18可視情況具有一通道24，傳熱流體通過此通道經由入口及出口管道25、26循環。
在運作中，諸如矽晶圓之半導體基板位於基板固持器12上，且藉由靜電夾盤34保持在適當位置。向真空處理腔室10供應處理氣體且藉由向天線18供應RF功率在基板與窗20之間的空間中產生高密度電漿。
在圖5中所示之裝置中，諸如氣體分佈板22、腔室襯墊30、靜電夾盤34及聚焦環14之各種反應器元件可為具有曝露之含氧化釔鍍膜32之氧化釔鍍膜陶瓷元件。
上文所描述之高密度多晶矽及介電質蝕刻腔室僅為可併入氧化釔鍍膜陶瓷元件之例示性電漿蝕刻反應器。該等元件可用於任何蝕刻反應器(例如，金屬蝕刻反應器)或存在電漿侵蝕問題的其它類型之半導體處理設備。
其它氧化釔鍍膜陶瓷元件可為腔室壁、基板固持器、扣件及其類似物，該等元件通常曝露於電漿。其它元件可能未直接曝露於電漿中，但是曝露於諸如自經處理之晶圓發射出之氣體或其類似物的腐蝕性氣體中。用於半導體基板之處理之其它設備亦可為氧化釔鍍膜陶瓷元件。此設備可包含傳送機構、氣體供應系統、襯墊、起模機構、真空隔絕室(load locks)、門機構、自動手臂、扣件及其類似物。
儘管已經根據本發明之特定實施例詳細描述了本發明，但是熟習此項技術者將易瞭解可在不偏離所附加之申請專利範圍之範疇下做出各種改變及修改且可採用等價物。
10‧‧‧電漿處理腔室
12‧‧‧基板固持器
13‧‧‧基板
14‧‧‧聚焦環
18‧‧‧天線
20‧‧‧介電質窗
22‧‧‧氣體分佈板
23‧‧‧氣體供應
24‧‧‧通道
25‧‧‧入口管道
26‧‧‧出口管道
30‧‧‧襯墊
32‧‧‧含氧化釔鍍膜
34‧‧‧夾盤
40‧‧‧氣環
42‧‧‧含氧化釔鍍膜
44‧‧‧基板支撐
50‧‧‧氣孔
60‧‧‧氣體導向溝槽
65‧‧‧氧化釔鍍膜元件
70‧‧‧基板
72‧‧‧基板表面
74‧‧‧結合層
80‧‧‧含氧化釔鍍膜
82‧‧‧鍍膜外表面
90‧‧‧額外含氧化釔鍍膜
150‧‧‧腔室
152‧‧‧基板支撐
154‧‧‧靜電夾盤
156‧‧‧氣體供給
158‧‧‧電感線圈
160‧‧‧介電質窗
162‧‧‧環形構件
164‧‧‧腔室襯墊
165‧‧‧元件
166‧‧‧含氧化釔鍍膜
168‧‧‧氣體噴塗器
170‧‧‧聚焦環
圖1展示包含基板及基板上之含氧化釔鍍膜的氧化釔鍍膜陶瓷元件之較佳實施例。
圖2展示包含基板、基板上之第一含氧化釔鍍膜及第一含氧化釔鍍膜上之第二含氧化釔鍍膜的氧化釔鍍膜陶瓷元件之另一較佳實施例。
圖3係用於多晶矽蝕刻裝置之氣環裝置之實施例的截面圖。
圖4展示含有氧化釔鍍膜陶瓷元件之元件實施例之多晶矽蝕刻腔室。
圖5展示含有氧化釔鍍膜陶瓷元件之實施例之高電漿密度氧化蝕刻腔室。
65‧‧‧氧化釔鍍膜元件
70‧‧‧基板
72‧‧‧基板表面
74‧‧‧結合層
80‧‧‧含氧化釔鍍膜
82‧‧‧外部表面

Claims (29)

  1. 一種半導體材料處理裝置之氧化釔鍍膜陶瓷元件，包括：一包括陶瓷材料之生坯之基板；及一在該基板之至少一表面上之之含氧化釔鍍膜，其中該含氧化釔鍍膜具有一從約200ksi至約400ksi之結合力強度。
  2. 如請求項1之元件，其中該元件係選自由下列各物組成之群：一介電質窗、腔室壁、腔室襯墊、基板支撐、擋板、氣體分佈板、電漿密封環、噴嘴、扣件、加熱零件、電漿聚焦環、夾盤及一電漿螢幕，而且/或該半導體材料處理裝置包括一電漿蝕刻器。
  3. 如請求項1之元件，其中該陶瓷材料係選自由下列各物組成之群：氧化鋁、石英、氧化鋯、碳化矽、氮化矽、碳化硼、氮化硼、氮化鋁及其混合物。
  4. 如請求項1之元件，其中該含氧化釔鍍膜基本上由氧化釔組成，且/或該半導體材料處理裝置包括一電漿蝕刻器。
  5. 如請求項1之元件，其中該含氧化釔鍍膜包括選自下列各元素組成之群中之至少一元素之一氧化物、碳化物、氮化物、硼化物及/或碳氮化物：La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb及Lu。
  6. 如請求項1之元件，其中該含氧化釔鍍膜塗覆於該基板之整個外部表面。
  7. 一種半導體材料處理裝置之氧化釔鍍膜陶瓷元件，包括：一包括陶瓷材料之基板； 一在該基板之至少一表面上之經熱噴塗之第一含氧化釔鍍膜；及一在該基板與該第一含氧化釔鍍膜之間之一介面處的結合層，其包括一包含該陶瓷材料及氧化釔之多相氧化物，已藉由共同燒結該基板及該經類似熱噴塗之第一含氧化釔鍍膜，形成該結合層；其中(i)該第一含氧化釔鍍膜包含一已藉由電漿調節處理之曝露表面，以減少該共同燒結之後，附著至該曝露表面之氧化釔微粒，或(ii)該元件在該經燒結之第一含氧化釔鍍膜上，進一步包括一經類似熱噴塗之第二含氧化釔鍍膜，且其覆蓋附著至該曝露表面之該等氧化釔微粒，且其中當在情況(i)時，該第一含氧化釔鍍膜具有一小於約20%之孔隙率、一自約95%至約100%立方之晶體結構，及一自約200 ksi至約400 ksi之結合力；及當在情況(ii)時，該第一含氧化釔鍍膜及該第二含氧化釔鍍膜具有一小於約20%之孔隙率、一自約95%至約100%立方之晶體結構，及一自約200 ksi至約400 ksi之結合力。
  8. 如請求項7之元件，其中該元件係選自由下列各物組成之群：一介電質窗、腔室壁、腔室襯墊、基板支撐、擋板、氣體分佈板、電漿密封環、噴嘴、扣件、加熱零件、電漿聚焦環、夾盤及一電漿螢幕，而且/或該半導體材料處理裝置包括一電漿蝕刻器。
  9. 如請求項7之元件，其中該基板包括一選自由下列各物組成之群的陶瓷材料：氧化鋁、石英、氧化鋯、碳化矽、 氮化矽、碳化硼、氮化硼、氮化鋁或其混合物。
  10. 如請求項7之元件，其中該元件包含該第二含氧化釔鍍膜，且該第一含氧化釔鍍膜及該第二含氧化釔鍍膜包括選自下列各元素組成之群中之至少一元素之一氧化物、碳化物、氮化物、硼化物及/或碳氮化物：La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb及Lu。
  11. 如請求項7之元件，其中該元件包含該第二含氧化釔鍍膜，且該第一含氧化釔鍍膜及該第二含氧化釔鍍膜係安置於該基板之整個外表面上。
  12. 如請求項7之元件，其中該元件包含該第二含氧化釔鍍膜，且該第一含氧化釔鍍膜及該第二含氧化釔鍍膜基本上由氧化釔組成。
  13. 如請求項7之元件，其中該元件包含該第二含氧化釔鍍膜，該第二含氧化釔鍍膜包含一具有粗糙度之曝露表面，其有效增強沉積於該曝露表面之聚合物微粒之黏著力。
  14. 如請求項7之元件，其中：該基板基本上由氧化鋁組成；該第一鍍膜基本上由氧化釔組成；該結合層包括釔鋁石榴石；及該元件包含基本上由氧化釔組成之該第二含氧化釔鍍膜。
  15. 一種半導體材料處理裝置，包括至少一如請求項7之元 件。
  16. 一種在一半導體材料處理裝置中處理一半導體材料之方法，包括在一含有至少一如請求項7之元件的半導體材料處理裝置之一電漿腔室中，使用一電漿來處理一半導體材料。
  17. 如請求項16之方法，其中該處理包括在該電漿腔室內，電漿蝕刻一多晶矽半導體材料。
  18. 一種製造如請求項1之該氧化釔鍍膜陶瓷元件之方法，包括：在該基板之至少一表面上熱噴塗該含氧化釔鍍膜作為一第一經類似熱噴塗之含氧化釔鍍膜；以及共同燒結該基板及該經類似熱噴塗之第一鍍膜。
  19. 如請求項18之方法，進中共同燒結該基板及該經類似熱噴塗之第一含氧化釔鍍膜，在該基板與該第一含氧化釔鍍膜之間之一介面處形成一結合層，該結合層包括一包含該陶瓷材料及氧化釔之多相氧化物。
  20. 如請求項19之方法，進一步包括在該共同燒結之後，於該第一含氧化釔鍍膜上熱噴塗一第二含氧化釔鍍膜。
  21. 如請求項19之方法，進一步包括在該共同燒結之後，藉由一電漿調節處理來處理該第一含氧化釔鍍膜之一曝露表面，以減少在該共同燒結之後，附著至該曝露表面之氧化釔微粒。
  22. 如請求項20之方法，其中該陶瓷材料為氧化鋁，且該第一含氧化釔鍍膜及該第二含氧化釔鍍膜基本上由氧化釔 組成。
  23. 如請求項19之方法，其中將該基板及該第一含氧化釔鍍膜在約800℃至1600℃之溫度下，共同燒結約達7天之時間。
  24. 如請求項18之方法，其中該元件係選自由下列各物組成之群：一介電質窗、腔室壁、腔室襯墊、基板支撐、擋板、氣體分佈板、電漿密封環、噴嘴、扣件、加熱零件、電漿聚焦環、夾盤及一電漿螢幕，而且/或該半導體材料處理裝置包括一電漿蝕刻器。
  25. 如請求項18之方法，其中該基板包括一選自由下列各物組成之群的陶瓷材料：氧化鋁、石英、氧化鋯、碳化矽、氮化矽、碳化硼、氮化硼、氮化鋁或其混合物。
  26. 如請求項20之方法，其中該第一含氧化釔鍍膜及該第二含氧化釔鍍膜包括選自下列各元素組成之群中之至少一元素之一氧化物、碳化物、氮化物、硼化物及/或碳氮化物：La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb及Lu。
  27. 如請求項20之方法，其中將該第一含氧化釔鍍膜及該第二含氧化釔鍍膜熱噴塗於該基板之整個外部表面。
  28. 如請求項20之方法，其中該第二含氧化釔鍍膜包含一具有一粗糙度之曝露表面，其有效增強以聚合物微粒之形式沉積於該曝露表面之電漿蝕刻副產物之黏著力。
  29. 一種製造如請求項7之該氧化釔鍍膜陶瓷元件之方法，包括： 部分燒結該包括陶瓷材料之基板；在該基板之至少一表面上熱噴塗該第一含氧化釔鍍膜；共同燒結該基板及該經類似熱噴塗之第一含氧化釔鍍膜，以在該基板與該第一含氧化釔鍍膜之間之該介面處，形成該包括該陶瓷材料及氧化釔之多相氧化物的結合層；及(i)在該共同燒結之後，藉由一電漿調節處理來處理該第一含氧化釔鍍膜之曝露表面，以減少附著至該曝露表面之氧化釔微粒，或(ii)在該共同燒結之後，於該經燒結之第一含氧化釔鍍膜上，熱噴塗該第二含氧化釔鍍膜，以覆蓋附著至該曝露表面之該等氧化釔微粒。
TW093139417A 2003-12-18 2004-12-17 半導體材料處理裝置之氧化釔鍍膜陶瓷元件以及製造該等元件之方法 TWI381415B (zh)

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CN1906026A (zh) 2007-01-31
KR20060132649A (ko) 2006-12-21
US8293335B2 (en) 2012-10-23
KR101177333B1 (ko) 2012-08-30
WO2005062758A3 (en) 2006-01-12
TW200531136A (en) 2005-09-16
WO2005062758A2 (en) 2005-07-14
US20050136188A1 (en) 2005-06-23
US20070166477A1 (en) 2007-07-19
JP2007516921A (ja) 2007-06-28
CN1906026B (zh) 2011-08-03

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