CN1604324A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

Info

Publication number
CN1604324A
CN1604324A CNA2004100120014A CN200410012001A CN1604324A CN 1604324 A CN1604324 A CN 1604324A CN A2004100120014 A CNA2004100120014 A CN A2004100120014A CN 200410012001 A CN200410012001 A CN 200410012001A CN 1604324 A CN1604324 A CN 1604324A
Authority
CN
China
Prior art keywords
resin
resin sheet
semiconductor device
die pad
framework
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004100120014A
Other languages
English (en)
Other versions
CN100446246C (zh
Inventor
林建一
川藤寿
竹下龙征
船越信仁
尾崎弘幸
多田和弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN1604324A publication Critical patent/CN1604324A/zh
Application granted granted Critical
Publication of CN100446246C publication Critical patent/CN100446246C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

提供一种散热特性优良、绝缘性高,并且可小型化的用于电力的半导体器件。芯片被树脂模塑的半导体器件包括:具有表面和背面且包含管芯垫的框架;装载于所述管芯垫的所述表面上的功率芯片;具有相对的第一面和第二面的绝缘性树脂片,配置成使所述管芯垫的所述背面与该绝缘性树脂片的第一面接触;以及在所述树脂片的所述第一面上设置成密封所述功率芯片的模塑树脂,其特征在于,所述树脂片的导热率比所述模塑树脂的导热率大。

Description

半导体器件及其制造方法
技术领域
本发明涉及半导体器件,特别涉及包含功率芯片的电力用半导体器件。
背景技术
在现有的电力用半导体器件中,功率芯片和IC芯片被分别管芯键合(die-bonded)在框架上,而且,这些芯片通过树脂来密封。功率芯片因散热量大,例如在半导体器件的背面安装冷却扇,提高散热效率。装载功率芯片的框架被树脂覆盖,与安装于背面的冷却扇绝缘(例如,专利文献1)。
此外,为了提高半导体器件的散热性,还提出在半导体器件的背面上安装由氧化铝等构成的薄板绝缘体的半导体器件(例如,专利文献2)。
[专利文献1]特开2000-138343号公报
[专利文献2]特开2001-156253号公报
但是,在前者的半导体器件中,为了提高散热特性,需要使覆盖装载了功率芯片的框架的树脂,具体地说,装载了功率芯片的框架的背面和半导体器件背面之间的树脂薄,但如果这部分的树脂薄,则相反有绝缘特性下降的问题。
另一方面,在后者的半导体器件中,由于绝缘体和树脂的热膨胀系数大不相同,所以有因功率芯片的发热而使绝缘体从树脂上剥离的问题。此外,由于在绝缘体和树脂之间可形成界面,为了确保这样的界面中的表面绝缘,必须确保表面绝缘距离,还存在半导体器件大型化的问题。
发明内容
因此,本发明的目的在于提供散热特性优良、绝缘性高、并且可小型化的半导体器件。
本发明提供一种树脂模塑有芯片的半导体器件,包括:具有表面和背面且包含管芯垫的框架;装载于所述管芯垫的所述表面上的功率芯片;具有相对的第一面和第二面的绝缘性树脂片,配置成使所述管芯垫的所述背面与该绝缘性树脂片的第一面接触;以及在所述树脂片的所述第一面上设置成密封所述功率芯片的模塑树脂,其特征在于,所述树脂片的导热率比所述模塑树脂的导热率大。
此外,本发明提供一种树脂模塑了芯片的半导体器件的制造方法,包括:准备具有表面和背面且带有管芯垫的框架的框架准备工序;准备具有第一面和第二面的绝缘性树脂片的工序;在所述管芯垫的所述表面上装载功率芯片的工序;在所述树脂片的所述第一面上配置所述框架,以使所述管芯垫的所述背面接触所述树脂片的所述第一面的工序;以及在所述树脂片的所述第一面上填充密封树脂,以埋入所述功率芯片的树脂模塑工序,其特征在于,在所述树脂片中使用导热率比所述密封树脂大的树脂。
在本发明的半导体器件中,通过使用树脂片,散热特性优良,并且可提高绝缘性。而且,还可进行半导体器件的小型化。
附图说明
图1是本发明实施方式1的半导体器件的立体图。
图2是本发明实施方式1的半导体器件的背面图。
图3是本发明实施方式1的半导体器件的剖面图。
图4是表示本发明实施方式的半导体器件的一部分内部的立体图。
图5是本发明实施方式1的半导体器件的制造工序的剖面图。
图6是本发明实施方式1的半导体器件的制造工序的剖面图。
图7是树脂片的放大剖面图。
图8是本发明实施方式2的半导体器件的剖面图。
图9是本发明实施方式3的半导体器件的背面图。
图10是本发明实施方式3的半导体器件的剖面图。
具体实施方式
实施方式1
图1是整体用100表示的本实施方式的半导体器件的立体图。而图2是图1的半导体器件100的背面图,图3是图1的半导体器件100的I-I方向上观察的剖面图。而且,图4是图1的半导体器件100的一部分内部的立体图。
如图1所示,半导体器件100构成树脂模塑型封装结构,包含在两侧设置有多个金属制的框架1的模塑树脂2。模塑树脂2最好由环氧树脂构成。
如图2所示,在模塑树脂2的背面上,例如设置在背面安装有由铜构成的金属箔4的绝缘性树脂片3。树脂片3最好由包含填料的环氧树脂构成。填料最好由从SiO2、Al2O3、AlN、Si3N4、及BN中选择的一种或多种材料构成。树脂片3的导热率比模塑树脂2的导热率大。
如图3所示,半导体器件100包含多个框架1。如图4更详细地所示,在一个框架1中,装载逻辑芯片这样的IC芯片7。而另一框架1包含管芯垫部1a和台阶部1b,在管芯垫部1a上,装载IGBT5a和续流二极管5b这样的功率芯片5。功率芯片5、IC芯片7、及框架1之间,例如用金或铝构成的键合线6、8来连接,通过IC芯片7控制功率芯片5的动作。
一般地,将功率芯片5和IC芯片7使用焊料或银膏固定在框架1上。而在功率芯片5的连接上,使用铝键合线8,在IC芯片7的连接上,使用直径比其小的金键合线6。
再有,功率芯片5和IC芯片7也可以根据半导体器件100的功能而设置多个。
如上述那样,模塑树脂2包含安装了金属箔4的绝缘性树脂片3,从模塑树脂2的背面露出金属箔4。这样的金属箔4保护树脂片3免受损伤,所以树脂片3可维持良好的绝缘性。作为这样的损伤,例如是将半导体器件100螺纹固定在外部散热片(未图示)上时,在半导体器件100和外部散热片之间啮入异物下进行螺纹固定时产生的损伤。再有,在不易产生损伤时,也可以采用不设置金属箔4的结构。这种情况下,从模塑树脂2的背面露出树脂片3。
在树脂片3上装载框架1,以直接接触管芯垫部1a的背面。树脂片3的面积比管芯垫部1a的面积大。而且,功率芯片5、IC芯片7等被模塑树脂2密封。
在树脂片3和模塑树脂2接触的区域中,形成混合了双方的树脂的混合层9。这样,经由混合层9来连接树脂片3和模塑树脂2,所以与没有混合层9的情况相比,树脂片3和模塑树脂2之间的导热性高,使散热性提高。后面论述有关混合层9的形成方法。
树脂片3的导热率比模塑树脂2的导热率大,特别是最好大于等于两倍。由此,可以获得散热特性优良的半导体器件100。
下面,参照图5、图6,说明半导体器件100的制造方法。这样的制造方法包含以下的工序1~8。再有,图5、图6是在与图1的I-I相同的方向上观察的剖面图。
工序1:如图5(a)所示,例如准备铜构成的框架1。接着,在一个框架1上用焊料或银膏等来固定IC芯片7,在另一框架1的管芯垫部1a上用焊料或银膏来固定功率芯片6。
工序2:如图5(b)所示,使用铝键合线6,将功率芯片5彼此之间、功率芯片5和框架1之间、框架1彼此之间进行连接(铝键合工序)。再有,就键合线6来说,也可以使用以铝为主要成分的合金或其他金属。
工序3:如图5(c)所示,使用金键合线,连接IC芯片7和框架1(金键合工序)。再有,就键合线7而言,也可以使用以金为主要成分的合金或其他金属。
工序4:如图5(d)所示,准备树脂密封用金属模20。树脂密封用金属模20可分为上部金属模21和下部金属模22。接着,准备在背面安装了金属箔4的绝缘性树脂片3,并配置在树脂密封用金属模20的内部规定位置。这种情况下,以金属箔4的背面可接触下部金属模22的内部底面来配置树脂片3。这里,就树脂片3来说,使用半固化状态的树脂。树脂片3例如由环氧树脂构成,如上述那样,最好包含填料。
再有,半固化状态的树脂指常温下为固体,而在高温下一旦熔融后进行完全固化的未完全固化状态的热固化树脂。
工序5:如图6(e)所示,将安装了功率芯片5等的框架1配置在树脂密封用金属模20中的规定位置。这种情况下,配置框架1,以使框架1的管芯垫部的背面接触树脂片3的上表面。
工序6:如图6(f)所示,在下部金属模22上安装并固定上部金属模21。接着,通过转移模塑成形法,例如将环氧树脂构成的密封树脂12填充在树脂密封用金属模20内。在图6(f)中,从左方进行填充。
在这样的工序中,设置于树脂密封用金属模20内的半固化状态的树脂片3首先从高温的树脂密封用金属模20中接受热,并临时熔融。进而,熔融的树脂片3和管芯垫1a通过加压状态下注入的密封树脂12被加压、粘合。
工序7:如图6(g)所示,将密封树脂2、树脂片3加热固化。在这样的工序中,树脂片3和密封树脂12在同时熔融的状态下接触,所以进行混合,在该接触部分形成混合层9。
工序4~7为所谓的转移模塑工序。在这样的工序中,树脂片3在熔融时被加压,而树脂密封用金属模20内整体被密封树脂12加压,所以树脂片3的厚度大体不变化。另一方面,树脂密封用金属模20内的各部不一定通过密封树脂12被同时填充,在各部中直至压力均等所需的时刻上,产生略微的时间偏差。因此,作为树脂片3的特性,期望熔融时的流动性小。
工序8:在从树脂密封用金属模20取出后,进行用于使模塑树脂完全固化的后固化、连杆(tie bar)等框架多余部分的切断等。而且,通过进行框架(外部端子)1的成形,完成图1所示的半导体器件100。
再有,树脂片3以环氧树脂为主要成分,从主要提高导热性来看,如上所述,最好是填充SiO2等绝缘性填料。这些填料具有减小树脂片3的线膨胀系数的效果,所以管芯垫1a和金属箔4的热膨胀系数之差变小。因此,不易产生温度变化造成的剥离,在可靠性上优良。
此外,密封树脂12也与树脂片3同样,如果形成以环氧树脂作为主要成分的材料,则可以稳定形成混合层9。这样的情况下,没有密封树脂12和树脂片3的明显界面,不需要考虑其间的表面绝缘,其结果,可进行半导体器件的小型化。
而且,在树脂片3中,通过使填料的形状为鳞片状,与形成粒状的情况相比,可以稳定地确保绝缘性,如后述那样,从实验可知,
在这样的实验中,使用填充了鳞片状填料的树脂片和填充了同量的粒状填料的树脂片,来制作半导体器件100,并进行绝缘试验。绝缘试验的结果示于表1。
(表1)
鳞片状  r/N=0/10
粒  状  r/N=3/10
这里,r为不合格的样本的数量,N表示试验中投入的样本的数量。
而且,在鳞片状填料中,与粒状填料相比,由于填料的比表面积大,所以与片树脂的接触面积也大,可以减小熔融时的流动性。
此外,关于填料的尺寸,也可以将大尺寸的(最大直径大的)填料和小尺寸的(最大直径小的)填料混合使用。图7是包含两种尺寸的填料的树脂片3的剖面的放大图。树脂片3为在环氧树脂等树脂层33中包含了大尺寸的填料31和小尺寸的填料32的结构。
如图7所示,在大尺寸的填料31间的间隙中,可以填充小尺寸的填料32,所以进一步提高树脂片3的导热性。
如以上那样,在本实施方式的半导体器件100中,使用可以预先规定绝缘层厚度的绝缘性树脂片3。因此,通过调整树脂片3的膜厚,可以进行兼顾绝缘特性和散热特性的控制。
此外,由于只在必要的区域中设置树脂片3,所以可削减无用的成本。
而且,在半导体器件100中,在树脂片3和模塑树脂2的界面上形成混合层9,所以不需要考虑表面绝缘,其结果,可使半导体器件小型化。
再有,在本实施方式1中,用键合线来连接IC芯片7等,但例如也可以使用金属薄板等其他构件。而且,IC芯片7和功率芯片5之间的连接示出了经由临时中继框架来连接的例子,但直接连接也可以。
实施方式2
图8是整体用200表示的本实施方式的半导体器件的剖面图。图8是在与图1的I-I相同的方向观察的剖面图。图8中,与图1~图3相同的标号表示相同或相当的部位。
在本实施方式2的半导体器件200中,安装了金属箔4的树脂片3有覆盖模塑树脂2的整个背面的大小。其他结构与上述半导体器件100相同。
在半导体器件200中,在提高了散热特性的同时,在制造工序中不需要树脂片3的配置定位。即,由于树脂片3与树脂密封用金属模20的内部底面的尺寸相等,所以不需要正确地控制配置位置。由此,制造工序被简化。
实施方式3
图9是整体用300表示的本实施方式的半导体器件的剖面图。而图10是在IIIV-IIIV方向上观察图9的剖面图。图9、图10中,与图1~图3相同的标号表示相同或相当的部位。
半导体器件300沿树脂片3的周围有多个凹部40。此外,有用于安装冷却扇(未图示)的螺纹孔35。
在上述工序4(图5(d))中,为了在树脂片3上容易进行定位,在树脂密封用金属模20的内部底面上,为了设置多个突起部(未图示)而形成这样的凹部40。在树脂密封用金属模20的内部底面上,沿树脂片3的配置区来设置突起部。
这样,通过在树脂密封用金属模20的内部底面上设置突起部,使树脂片3的定位容易,可简化制造工序。
再有,在图9、图10中,将凹部40的形状形成为大致圆柱形状,但只要是具有这种功能的形状,即使其他的形状也可以。此外,只要具有这样的功能,凹部40的数目多少都可以。
而且,凹部40的深度最好是比金属箔4的厚度薄。这是因为即使凹部40错误重叠在金属箔4上,其前端也不到达树脂片3,树脂片3不受到损伤。

Claims (15)

1.一种树脂模塑有芯片的半导体器件,包括:
具有表面和背面且包含管芯垫的框架;
装载于所述管芯垫的所述表面上的功率芯片;
具有相对的第一面和第二面的绝缘性树脂片,配置成使所述管芯垫的所述背面与该绝缘性树脂片的第一面接触;以及
在所述树脂片的所述第一面上设置成密封所述功率芯片的模塑树脂,
其特征在于,所述树脂片的导热率比所述模塑树脂的导热率大。
2.如权利要求1所述的半导体器件,其特征在于,所述树脂片和所述模塑树脂都由环氧树脂构成。
3.如权利要求1所述的半导体器件,其特征在于,在所述树脂片和所述模塑树脂之间具有混合了构成它们的树脂的混合层。
4.如权利要求1所述的半导体器件,其特征在于,所述树脂片的面积比配置于其上的所述管芯垫的面积大。
5.如权利要求1所述的半导体器件,其特征在于,所述树脂片和所述管芯垫直接接触。
6.如权利要求1所述的半导体器件,其特征在于,所述框架包括所述管芯垫、与所述管芯垫大致平行设置的引线部、以及以台阶方式连接所述管芯垫和所述引线部的台阶部。
7.如权利要求1所述的半导体器件,其特征在于,所述树脂片的导热率大于等于所述模塑树脂的导热率的两倍。
8.如权利要求1所述的半导体器件,其特征在于,所述树脂片由包含从SiO2、Al2O3、AlN、Si3N4、及BN组成的组中选择的至少一种填料的树脂构成。
9.如权利要求8所述的半导体器件,其特征在于,所述填料有鳞片状的形状。
10.如权利要求9所述的半导体器件,其特征在于,所述填料由最大粒径不同的两种或两种以上的填料构成。
11.如权利要求1所述的半导体器件,其特征在于,在所述树脂片的所述第二面上设置有金属箔。
12.一种树脂模塑了芯片的半导体器件的制造方法,包括:
准备具有表面和背面且带有管芯垫的框架的框架准备工序;
准备具有第一面和第二面的绝缘性树脂片的工序;
在所述管芯垫的所述表面上装载功率芯片的工序;
在所述树脂片的所述第一面上配置所述框架,以使所述管芯垫的所述背面接触所述树脂片的所述第一面的工序;以及
在所述树脂片的所述第一面上填充密封树脂,以埋入所述功率芯片的树脂模塑工序,
其特征在于,在所述树脂片中使用导热率比所述密封树脂大的树脂。
13.如权利要求12所述的制造方法,其特征在于,还包括:
准备树脂密封用金属模的工序;以及
在所述树脂密封用金属模内装载所述树脂片,以使所述树脂片的第二面接触所述树脂密封用金属模的内部底面的工序,
所述树脂模塑工序包括:
在所述树脂密封用金属模内填充所述密封树脂并使其固化的工序;以及
从所述树脂密封用金属模中取出用所述密封树脂模塑了所述功率芯片的半导体器件的工序。
14.如权利要求12所述的制造方法,其特征在于,还包括在框架准备工序之前,用金属箔覆盖所述树脂片的所述第二面的工序。
15.如权利要求13所述的制造方法,其特征在于,所述树脂密封用金属模的所述内部底面具有沿所述树脂片的配置位置设置的多个突起部。
CNB2004100120014A 2003-09-30 2004-09-27 半导体器件及其制造方法 Expired - Lifetime CN100446246C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003339730A JP2005109100A (ja) 2003-09-30 2003-09-30 半導体装置およびその製造方法
JP339730/2003 2003-09-30

Publications (2)

Publication Number Publication Date
CN1604324A true CN1604324A (zh) 2005-04-06
CN100446246C CN100446246C (zh) 2008-12-24

Family

ID=34373366

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100120014A Expired - Lifetime CN100446246C (zh) 2003-09-30 2004-09-27 半导体器件及其制造方法

Country Status (4)

Country Link
US (1) US7671453B2 (zh)
JP (1) JP2005109100A (zh)
KR (3) KR20050031877A (zh)
CN (1) CN100446246C (zh)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101414586B (zh) * 2007-10-15 2013-09-18 电力集成公司 功率半导体器件的封装件和封装方法
CN103748673A (zh) * 2011-10-28 2014-04-23 积水化学工业株式会社 叠层体及功率半导体模块用部件的制造方法
CN103794572A (zh) * 2012-10-31 2014-05-14 株式会社电装 模塑封装及其制造方法
CN104183558A (zh) * 2013-05-21 2014-12-03 英飞凌科技股份有限公司 混合半导体封装
CN104681546A (zh) * 2013-12-02 2015-06-03 三菱电机株式会社 功率模块及其制造方法
CN106887391A (zh) * 2017-04-12 2017-06-23 上海长园维安微电子有限公司 适用于功率mos的新型塑封结构
CN107093591A (zh) * 2016-02-17 2017-08-25 株式会社有泽制作所 散热板

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3854957B2 (ja) * 2003-10-20 2006-12-06 三菱電機株式会社 半導体装置の製造方法および半導体装置
JP4645832B2 (ja) * 2005-08-02 2011-03-09 セイコーエプソン株式会社 半導体装置及びその製造方法
JP4650630B2 (ja) * 2005-10-07 2011-03-16 Jsr株式会社 スペーサー用感放射線性樹脂組成物、スペーサー、およびその形成方法
JP4422094B2 (ja) 2005-12-12 2010-02-24 三菱電機株式会社 半導体装置
JP2007165426A (ja) * 2005-12-12 2007-06-28 Mitsubishi Electric Corp 半導体装置
JP4973033B2 (ja) * 2006-07-03 2012-07-11 三菱電機株式会社 パワーモジュールの製造方法
JP4904104B2 (ja) * 2006-07-19 2012-03-28 三菱電機株式会社 半導体装置
JP4737138B2 (ja) * 2007-05-14 2011-07-27 三菱電機株式会社 半導体装置及びその製造方法
WO2009041300A1 (ja) * 2007-09-26 2009-04-02 Mitsubishi Electric Corporation 熱伝導性シート及びパワーモジュール
JP5163055B2 (ja) * 2007-10-30 2013-03-13 三菱電機株式会社 電力半導体モジュール
JP2009170476A (ja) * 2008-01-11 2009-07-30 Panasonic Corp 半導体装置および半導体装置の製造方法
DE102008009510B3 (de) * 2008-02-15 2009-07-16 Danfoss Silicon Power Gmbh Verfahren zum Niedertemperatur-Drucksintern
DE102008029829B4 (de) 2008-06-25 2012-10-11 Danfoss Silicon Power Gmbh Vertikal nach oben kontaktierender Halbleiter und Verfahren zu dessen Herstellung
US8664038B2 (en) * 2008-12-04 2014-03-04 Stats Chippac Ltd. Integrated circuit packaging system with stacked paddle and method of manufacture thereof
US8018051B2 (en) * 2009-02-02 2011-09-13 Maxim Integrated Products, Inc. Thermally enhanced semiconductor package
JP4947135B2 (ja) * 2009-12-04 2012-06-06 株式会社デンソー 半導体パッケージおよびその製造方法
JP5563918B2 (ja) 2010-07-22 2014-07-30 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置の製造方法
JP5607447B2 (ja) * 2010-07-22 2014-10-15 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置
JP5563917B2 (ja) * 2010-07-22 2014-07-30 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置及びその製造方法
JP5598189B2 (ja) * 2010-09-08 2014-10-01 株式会社デンソー 半導体装置の製造方法
CN102986025B (zh) * 2011-04-05 2015-04-22 松下电器产业株式会社 密封型半导体装置的制造方法
JP5660990B2 (ja) * 2011-07-29 2015-01-28 三菱電機株式会社 半導体装置
CN102757712B (zh) * 2012-08-09 2014-05-28 天津经纬电材股份有限公司 高导热绝缘漆的制备方法
JP5983249B2 (ja) * 2012-09-28 2016-08-31 サンケン電気株式会社 半導体モジュールの製造方法
JP2014107519A (ja) * 2012-11-30 2014-06-09 Mitsubishi Electric Corp 半導体装置およびその製造方法
US9397018B2 (en) 2013-01-16 2016-07-19 Infineon Technologies Ag Chip arrangement, a method for manufacturing a chip arrangement, integrated circuits and a method for manufacturing an integrated circuit
US9230889B2 (en) 2013-01-16 2016-01-05 Infineon Technologies Ag Chip arrangement with low temperature co-fired ceramic and a method for forming a chip arrangement with low temperature co-fired ceramic
JP2015023211A (ja) 2013-07-22 2015-02-02 ローム株式会社 パワーモジュールおよびその製造方法
JP6301602B2 (ja) 2013-07-22 2018-03-28 ローム株式会社 パワーモジュールおよびその製造方法
JP2015076442A (ja) 2013-10-07 2015-04-20 ローム株式会社 パワーモジュールおよびその製造方法
DE102013223430A1 (de) * 2013-11-18 2015-05-21 BSH Hausgeräte GmbH Vorrichtung mit einem Leistungselektronikmodul zum Versorgen eines elektrischen Verbrauchers eines Haushaltsgeräts mit elektrischer Versorgungsspannung, Haushaltsgerät und Verfahren zum Herstellen einer derartigen Vorrichtung
DE112014006660B4 (de) * 2014-05-12 2019-10-31 Mitsubishi Electric Corporation Leistungshalbleiteranordnung und Verfahren zum Herstellen derselben
JP6338937B2 (ja) 2014-06-13 2018-06-06 ローム株式会社 パワーモジュールおよびその製造方法
JP2016012709A (ja) * 2014-06-30 2016-01-21 サンケン電気株式会社 半導体装置
JP6092833B2 (ja) * 2014-10-30 2017-03-08 三菱電機株式会社 半導体装置
US10217690B2 (en) * 2015-11-30 2019-02-26 Kabushiki Kaisha Toshiba Semiconductor module that have multiple paths for heat dissipation
DE112016005528T5 (de) * 2015-12-04 2018-08-30 Rohm Co., Ltd. Leistungsmodulvorrichtung, Kühlstruktur und elektrisches Fahrzeug oder elektrisches Hybridfahrzeug
CN108604578B (zh) * 2016-02-09 2021-07-16 三菱电机株式会社 电力用半导体装置及其制造方法
JP6749262B2 (ja) * 2016-02-17 2020-09-02 株式会社有沢製作所 放熱板
CN108701661A (zh) 2016-03-07 2018-10-23 三菱电机株式会社 半导体装置及半导体装置的制造方法
JP6099784B2 (ja) * 2016-03-11 2017-03-22 三菱電機株式会社 電力半導体装置
JP2019012767A (ja) 2017-06-30 2019-01-24 ルネサスエレクトロニクス株式会社 半導体モジュールの製造方法および半導体モジュール
CN109637983B (zh) 2017-10-06 2021-10-08 财团法人工业技术研究院 芯片封装

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521492A (ja) 1991-07-10 1993-01-29 Mitsubishi Kasei Corp 電気・電子部品の樹脂封止成形方法及びそれに用いる金型
JPH0766361A (ja) * 1993-08-30 1995-03-10 Hitachi Cable Ltd 電源装置
JPH08298299A (ja) * 1995-04-27 1996-11-12 Hitachi Ltd 半導体装置
JPH10125826A (ja) 1996-10-24 1998-05-15 Hitachi Ltd 半導体装置及びその製法
JPH11243166A (ja) 1998-02-24 1999-09-07 Fuji Electric Co Ltd 樹脂封止型半導体装置
JP4073559B2 (ja) 1998-10-30 2008-04-09 三菱電機株式会社 半導体装置
JP3581268B2 (ja) * 1999-03-05 2004-10-27 株式会社東芝 ヒートシンク付半導体装置およびその製造方法
JP3558548B2 (ja) 1999-04-02 2004-08-25 電気化学工業株式会社 樹脂成形体とその製造方法、及びそれを用いた電子部品の放熱部材
KR100342589B1 (ko) 1999-10-01 2002-07-04 김덕중 반도체 전력 모듈 및 그 제조 방법
JP4286465B2 (ja) * 2001-02-09 2009-07-01 三菱電機株式会社 半導体装置とその製造方法
US7061080B2 (en) * 2001-06-11 2006-06-13 Fairchild Korea Semiconductor Ltd. Power module package having improved heat dissipating capability
JP3784684B2 (ja) * 2001-10-04 2006-06-14 三菱電機株式会社 樹脂パッケージ型半導体装置の製造方法
JP3846699B2 (ja) 2001-10-10 2006-11-15 富士電機ホールディングス株式会社 半導体パワーモジュールおよびその製造方法
US6791839B2 (en) * 2002-06-25 2004-09-14 Dow Corning Corporation Thermal interface materials and methods for their preparation and use
JP3740116B2 (ja) * 2002-11-11 2006-02-01 三菱電機株式会社 モールド樹脂封止型パワー半導体装置及びその製造方法
US6919504B2 (en) * 2002-12-19 2005-07-19 3M Innovative Properties Company Flexible heat sink
US6908170B2 (en) * 2003-06-23 2005-06-21 Fuji Xerox Co., Ltd. Devices for dissipating heat in a fluid ejector head and methods for making such devices

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101414586B (zh) * 2007-10-15 2013-09-18 电力集成公司 功率半导体器件的封装件和封装方法
CN103748673A (zh) * 2011-10-28 2014-04-23 积水化学工业株式会社 叠层体及功率半导体模块用部件的制造方法
CN103748673B (zh) * 2011-10-28 2016-12-14 积水化学工业株式会社 叠层体及功率半导体模块用部件的制造方法
CN103794572A (zh) * 2012-10-31 2014-05-14 株式会社电装 模塑封装及其制造方法
CN104183558A (zh) * 2013-05-21 2014-12-03 英飞凌科技股份有限公司 混合半导体封装
CN104183558B (zh) * 2013-05-21 2017-11-24 英飞凌科技股份有限公司 混合半导体封装
CN104681546A (zh) * 2013-12-02 2015-06-03 三菱电机株式会社 功率模块及其制造方法
CN107093591A (zh) * 2016-02-17 2017-08-25 株式会社有泽制作所 散热板
CN107093591B (zh) * 2016-02-17 2022-07-29 株式会社有泽制作所 散热板
CN106887391A (zh) * 2017-04-12 2017-06-23 上海长园维安微电子有限公司 适用于功率mos的新型塑封结构

Also Published As

Publication number Publication date
KR20060104964A (ko) 2006-10-09
US7671453B2 (en) 2010-03-02
KR20070104497A (ko) 2007-10-26
CN100446246C (zh) 2008-12-24
KR20050031877A (ko) 2005-04-06
US20050067719A1 (en) 2005-03-31
KR100806479B1 (ko) 2008-02-21
JP2005109100A (ja) 2005-04-21

Similar Documents

Publication Publication Date Title
CN1604324A (zh) 半导体器件及其制造方法
CN100336190C (zh) 半导体装置的制造方法及半导体装置
CN1226785C (zh) 半导体功率器件
US6844622B2 (en) Semiconductor package with heat sink
CN1292475C (zh) 半导体封装及其制造方法
CN104145331B (zh) 半导体装置和其制造方法
US7151311B2 (en) Mold resin-sealed power semiconductor device having insulating resin layer fixed on bottom surface of heat sink and metal layer on the resin layer
CN1168140C (zh) 半导体封装件及其制造方法
CN1512580A (zh) 半导体装置及其制造方法
US8624408B2 (en) Circuit device and method of manufacturing the same
CN1516252A (zh) 制造半导体集成电路器件的方法
CN1747158A (zh) 半导体器件
CN1816904A (zh) 在倒装多矩阵阵列封装中的模制化合物盖及其制作工艺
CN1612331A (zh) 具有金属板和半导体芯片的半导体器件
CN1652314A (zh) 引线框架、半导体芯片封装、及该封装的制造方法
CN1832154A (zh) 散热器及使用该散热器的封装体
CN1755918A (zh) 半导体器件
CN100352041C (zh) 为减少晶粒的剪应力而控制晶粒固定用嵌角的方法与装置
CN1299341C (zh) 树脂密封半导体器件、树脂密封的方法和成型模具
CN1728411A (zh) 高散热效率的大功率半导体发光二极管封装基座及生产工艺
CN210148600U (zh) 改善智能功率半导体模块产品翘曲用模具
CN1172369C (zh) 具散热片的半导体封装件
CN1257540C (zh) 一种半导体芯片封装方法及其封装结构
CN1531092A (zh) 树脂密封型半导体装置及其制造方法
CN1819129A (zh) 堆栈芯片的半导体封装件及其制法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20081224