CN1172369C - 具散热片的半导体封装件 - Google Patents
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Abstract
一种具散热片的半导体封装件,包括一芯片承载件,芯片通过其第一表面与芯片承载件黏接,而第二表面通过热导性粘合剂与散热片黏接;散热片顶面及与顶面周边接连的侧面外露出封装胶体,散热片顶面上预形成有界面层,界面层与封装树脂的黏结性小于散热片与封装树脂的黏结性,以可便利地将封装树脂去除,且在去除过程中不致造成散热片与芯片及封装胶体间的脱层,并可确保该芯片在模压过程中不会受散热片压迫而产生破裂的问题。
Description
技术领域
本发明涉及一种半导体封装件,尤指一种具有散热片以提高散热效率的半导体封装件。
背景技术
如何有效地逸散使用中的半导体芯片所产生的热量,以确保包覆有半导体芯片的半导体封装件的使用寿命及品质,一直为半导体封装业界的一大课题。
由于用以包覆半导体芯片的封装胶体均是导热性差如环氧树脂的封装树脂(Molding Compound)所形成,使芯片所产生的热量往往无法通过封装树脂有效逸散,故在半导体封装件中加入一散热片(Heat Sink orHeat Block),以通过散热性佳的金属材料制成的散热片提高散热效率,乃成一可行方式。但若散热片为封装胶体所完全包覆,使芯片产生的热量的散热途径仍须通过封装胶体时,散热效果的提高依然有限,甚至仍无法符合散热的需求。因而,使散热片的表面能外露出封装胶体,以让芯片产生的热量可由散热片外露在大气中的表面而直接逸散乃成为较理想的结构;但若芯片未直接黏接至散热片而在芯片与散热片之间仍充填有封装树脂,则芯片产生的热量无法直接传递至散热片而仍需通过芯片与散热片间的封装树脂,依然会限制散热效率的提高。
所以,在第5,726,079号及第5,471,366号的美国专利中分别提出如图8所示的半导体封装件。这种现有的半导体封装件1是在芯片10上直接黏设有一散热片11,使该散热片11的顶面110外露出用以包覆该芯片10的封装胶体12。由于芯片10直接与散热片11黏接且散热片11的顶面110外露出封装胶体12而直接与大气接触,故芯片10产生的热量可直接传递至散热片11以逸散至大气中,其散热途径毋须通经封装胶体12,使这种半导体封装件1的散热效率较前述者为佳。
然而,这种半导体封装件1在制造上存在有若干的缺点。首先,该散热片11与芯片10黏接后,置入封装模具的模穴中以进行形成该封装胶体12的模压作业(Molding)时,该散热片11的顶面110应能顶抵至模穴的顶壁,以避免该散热片11的顶面110上形成有溢胶(Flash);因而,若该散热片11的顶面110未能有效地顶抵至模穴的顶壁,而在两者间形成有间隙时,用以形成该封装胶体12的封装树脂即会溢胶在散热片11的顶面110上,一旦在散热片11的顶面110上形成有溢胶,除会影响该散热片11的散热效率外,并会造成制成品的外观上的不良,故往往须进行去除胶边(Deflash)的后处理;然而,这种去除胶边处理不只耗时,增加封装成本,且还会导致制成品受损。然而,若散热片11顶抵住模穴的顶壁的力量过大,则往往会使质脆的芯片10因过度的压力而破裂。
同时,用以黏接芯片10与散热片11的粘合剂(Adhesive)或胶黏贴片(Laminating Tape),多由热固性(Thermosetting)的材料制成,在未加热予以固化(Curing)前,该粘合剂或胶黏贴片均成质软状态,使芯片10与散热片11黏结后所形成的结构的高度不易控制,而导致前述因散热片11的顶面110无法适当地顶抵至模穴的顶壁所产生的问题无从避免,故使封装完成的制成品的合格率无法有效提高,也使其封装成本无法降低。
再者,由于散热片11与芯片10黏结后的高度须进行精确控制以避免前述问题的发生,这种半导体封装件1的封装即无法以分批次(Batch-type)方式黏结晶片10与散热片11;即,散热片11须与对应的芯片10逐一黏接,而增加整体封装工艺的复杂性与所需的时间,故不利封装成本的降低与封装效率的提高。
此外,这种半导体封装件1的散热效率与其使用的散热片11外露的顶面110的面积成正比,即,在半导体封装件1大小不变的情况下,散热片11与封装件的面积相同时可具有最大的外露面积,使散热片11能提供最大的散热效率。然而,将散热片的面积扩大至与封装件相等时,表示散热片的大小也须与封装模具的模穴的边壁切齐或嵌接,而若散热片制作精度不足,在散热片过大时,将使散热片无法顺利置入模穴中,然在散热片过小时,其顶面及侧面即易形成溢胶。所以,这种结构会有合格率上的顾虑而使实施上具有相当的难度。
发明内容
本发明的目的在于提供一种具散热片的半导体封装件,使其散热片具有最大的外露面积且无溢胶产生,而可提高散热效率。
本发明的另一目的在于提供一种具散热片的半导体封装件,使其散热片与芯片直接黏接以提高散热效率,且不致在模压过程中造成芯片的破裂,使制成品的合格率得到提高。
本发明的另一目的在于提供一种具散热片的半导体封装件,使其散热片与芯片的黏接以分批次方式进行,而可简化制造过程,减少封装的耗时,以及降低成本。
本发明的另一目的在于提供一种具散热片的半导体封装件,使其散热片与芯片黏接的作业无高度控制的顾虑,而可降低封装成本及提高合格率。
本发明的另一目的在于提供一种具散热片半导体封装件,其所使用的封装模具可应用于具不同尺寸的产品,而毋须随产品尺寸的改变而更换封装模具,故可降低封装成本及机具的管理成本。
为了达到上述目的,本发明的具散热片的半导体封装件包括:一芯片承载件;至少一芯片,其接置在该芯片承载件上并与之电性连接;一散热片,其具有一第一表面,一对应的第二表面,以及多个连接在于第一表面与第二表面间的侧表面,该第一表面用以与该芯片黏接而使该散热片黏接至该芯片上,且使该芯片夹置在该芯片承载件及散热片间,而该第二表面上则敷设有一界面层;以及一封装胶体,其是以形成封装化合物,以包覆该芯片并形成在该散热片的第一表面与芯片承载件之间,而使该散热片的第二表面上的界面层及侧表面均外露出该封装胶体,且使该散热片的侧表面与该封装胶体的侧边共平面,同时,使该界面层与该封装化合物间的黏结性小于该散热片的第一表面与该封装化合物间的黏结性。
该散热片与接置在芯片承载件上的芯片黏接后的结构体的高度低于用以形成该封装胶体的封装模具的模穴高度,即,在模压作业(Molding)时,形成该封装胶体的封装化合物会盖覆在散热片的界面层上,但因该界面层与封装化合物的黏结性不佳,故在封装胶体成型后可轻易地将该界面层上的封装化合物去除,且因散热片的第一表面可与封装胶体良好黏接,所以去除处理实施时不会造成散热片与封装胶体及芯片间的脱层。同时,因该散热片在封装模具的模穴中时不会顶触至模穴的顶壁,故在模压作业中不会有芯片破裂(Crack)的问题产生,且由芯片承载件、芯片及散热片组成的结构体具有高度上的弹性,而可在毋须更换封装模具的情况下,以单一封装模具进行不同高度的封装件的模压工艺。
该散热片上的界面层可由与一般的封装化合物黏结性不佳的金、铬、镍或其合金等金属或铁氟龙等金属材料形成,以使该散热片的散热性不致受到该界面层敷设的影响。
在本发明的一较佳具体例中,该芯片承载件为一栅球网格阵列(Ball Grid Array,BGA)基板,在该基板上开设有至少一开孔以供焊线通过该开孔而电性连接该基板与芯片,该基板位于芯片下方的表面上并植接有多个焊球以作为芯片与外界装置电性连接的介质。
在本发明的另一较佳具体例中,该芯片承载件为一倒装式芯片(Flip Chip)基板,即基板的上表面具有多个成矩阵方式排列的焊垫,以供用以电性连接芯片与基板的多个焊锡凸块(Solder Bumps)焊接,同时,该基板的下表面上则植接有多个焊球以供芯片与外界装置电性连接。
在本发明的另一较佳具体例中,该芯片承载件为一四边扁平无引线(Quad Flat Nonlead,QFN)导线架或一栅球网格阵列基板,具有一上表面供芯片黏接,并以多个焊线电性连接该芯片与该导线架或基板;而为避免散热片与芯片的黏接损及焊线,该散热片的第一表面上对应于该芯片的部位可形成有一朝芯片延伸的连接部,以使该散热片通过该连接部与芯片黏接,且不致于碰触至焊线。
在本发明的又一较佳具体例中,该芯片承载件为一四边扁平无引线导线架或一栅球网格阵列基板,具有一上表面与芯片黏接并以多个焊线电性连接该芯片与该导线架或基板;为避免散热片与芯片直接的黏接会碰触至焊线,以及为降低散热片与芯片的热膨胀系数(Coefficientof Thermal Expansion,CTE)的不同而在两者直接黏接的情况下散热片对芯片所产生的热应力效应,该芯片可通过一与其热膨胀系数相当的缓冲垫片(Buffer Pad)与散热片相接,而使该缓冲垫片夹置在芯片与散热片间,同时,为使缓冲垫片减释散热片对芯片产生的热应力效应最佳化,该缓冲垫片宜使用芯片的瘕疪品(Defective Die)。
此外,为使该散热片可良好地与封装胶体黏结,该散热片的第一表面可予粗糙化(Roughened)、皱褶化(Corrogated)或凹凸化的处理。
下面结合附图及实施例对本发明进行详细说明:
图1是本发明的半导体封装件的第一实施例的剖视图;
图2(A)至2(H)是本发明半导体封装件的第一实施例的制造流程示意图;
图3是本发明半导体封装件的第二实施例的剖视图;
图4是本发明半导体封装件的第三实施例的剖视图;
图5是本发明半导体封装件的第四实施例的剖视图;
图6是本发明半导体封装件的第五实施例的剖视图;
图7是本发明半导体封装件的第六实施例的剖视图;
图8是现有具散热片半导体封装件的剖视图。
图中符号说明:
1,2,3,4,5,6,7 半导体封装件
10,21,31,41,51,61,71 芯片
11,23,33,43,53,63,73 散热片
110 顶面
12,24,24A,34,44,54,64,74 封装胶体
2A 半成品 20,30,40 基板
20A 基板模块片 200,300,400 上表面
201,301,401 下表面 202 开孔
203 侧边 210 作用表面
211 非作用表面 22,42,62 金线
23A 散热片模块板
230,330,430,530,630,730 第一表面
231,331 第二表面 232,632 侧表面
233,232A,333,533,633 镀金层
240 侧面 240A 渣料
25,26,45,46 粘合剂 29 焊球
304 凸块焊垫 32 焊锡凸块
48,58 缓冲垫片 50,70 导线架
500 芯片座 501 引线
610 作用表面 634 连接部
730a 凸部
如图1所示,本发明第一实施例的半导体封装件2主要由一基板20,黏设在该基板20上的芯片21,用以电性连接基板20与芯片21的多个金线22,黏接在该芯片21上的散热片23以及用以包覆该芯片21与金线22的封装胶体24所构成。
该基板20具有一上表面200,一相对于该上表面200的下表面201,以及一贯穿该基板20的开孔202;该基板20的下表面201上还形成有多个的导电迹线(Conductive Traces,未图标),以供该金线22通经该开孔202焊接在芯片21与导电迹线间,而使该芯片21与基板20形成电性连接关系。该芯片21具有一作用表面210及一相对的非作用表面211,使该作用表面210通过如银胶的粘合剂25黏接至基板20的上表面200上,并使多个形成在该作用表面210上以与金线22焊接的焊垫(Bond Pads,未图标)对应至该开孔202;当然,当该焊垫位于芯片21的作用表面210上邻近侧边处时,该芯片21的开孔202可形成两个以上。
该散热片23具有一第一表面230,一对应于该第一表面230的第二表面231,以及多个接连至该第一表面230及第二表面231的边缘间的侧表面232;该第二表面231上并镀有一镀金层233,使该镀金层233与用以形成该封装胶体24的封装化合物间的黏结性小于散热片23的第一表面230与封装化合物间的黏结性。该第一表面230是通过一现有的导热性的粘合剂26黏接至该芯片21的非作用表面211上,以使该芯片21产生的热量可直接传递至散热片23,而毋须经过封装胶体24传递。同时,该封装胶体24形成后,该散热片23仅通过其第一表面230与该封装胶体24黏结,使该散热片23的侧表面232及其第二表面231上的镀金层233均外露出该封装胶体24,即,使该封装胶体24形成在散热片23的第一表面230及基板20的上表面200间,而使该散热片23与基板20的面积相同,而使该散热片23具有最大的外露面积,故可有效提高散热效率。
此外,该基板20的下表面201上并以现有的植球方式植接有多个焊球29,以供该芯片21通过焊球29与外界装置电性连接。
该半导体封装件2的制法表示在图2(A)至2(H)中。如图2(A)所示,该制法的第一个步骤是准备一具矩阵式(Matrix type)基板模块片20A,该基板模块片20A是由十六个基板20以4×4矩阵方式排列所构成。各基板20均开设有一贯穿的开孔202。
接着,如图2(B)所示,在各基板20的一上表面200上的预设位置处以粘合剂25黏接一芯片21,使芯片21封盖住该开孔202的一端。
然后,如图2(C)所示,以多个的金线22通经该开孔202分别焊接至该芯片21及基板20的一下表面201上,以使该芯片21电线连接至该基板20。此一引线接合法(Wire Bonding)与现有的相同,故在此不予赘述。
如图2(D)所示,芯片21与基板20电性连接后,即将一由铜、铝、铜合金或铝合金等金属材料制成的散热片模块板23A通过一现有的粘合剂26(胶片亦可)分别与各芯片21黏接。该散热片模块板23A的大小须足以完全遮覆住与之藉芯片21相接的基板20,也即,该散热片模块板23A的侧边232A须延伸出任一位于外侧的基板20的侧边203(如图2(A)中虚线所示)。该散热片模块板23A的顶面上并敷镀以一镀金层233A,且该散热片模块板23A、芯片21及基板模块片20A所组合而成的结构体在置入封装模具(未图标)的模穴后,该散热片模块板23A上的镀金属233A不会顶触至模穴的顶壁,而使该镀金层233A与模穴的顶壁间保持有一适当的间隔。该散热片模块板23A的顶面上除可镀金外,也可镀如铬、镍或其合金等金属或如铁氟龙等材料,只要使该镀层与包覆芯片21用的封装化合物间的黏结性小于散热片模块板23A的底面与封装化合物间的黏结性即可。
如图2(E)所示,将该结合有散热片模块板23A、芯片21及基板模块片20A的结构体置入封装模具的模穴中,以进行模压作业,通过注入该模穴内的封装化合物形成一用以包覆该散热片模块板23A、芯片21、金线22及开孔202的封装胶体24A。由于该结构体的高度使散热片模块板23A上的镀金层233A与模穴的顶壁间有一适当的距离,故在封装模具合模后,芯片21不会遭受封装模具或散热片模块板23A而来的压力,故不会破裂,且散热片模块板23A与芯片21的黏接也无精确控制高度的需要,故可有效地提高制成品的合格率与信赖性。
如图2(F)所示,模压制成结束后,即在基板模块片20A的各基板20的下表面201上植接多个焊球29,以供该芯片21借其与外界装置形成电性连接关系。该焊球29的植接是以现有的植球方式进行,故不另赘述。
如图2(G)所示,以切割工具进行切单(Singulation)而形成出十六个半导体封装件的半成品2A。经切单后的半成品2A所形成的散热片23的侧面232外露出所形成的封装胶体24,并与该封装胶体24的侧面240切齐,而使该散热片23的侧面232上不会有溢胶的产生,且达到该散热片23与基板20具有相同的面积的目的,而无散热片23须与封装模具的模穴大小精准配合的需要。同时,各散热片23与芯片21的黏结是以分批次方式进行,故可简化制作工艺,减少耗时及降低成本。
最后,如图2(H)所示,各切单后的半成品2A予以加热,以借以形成该封装胶体24的封装化合物的热膨胀系数不同于散热片23及镀金层233的关系,使黏结性差的镀金层233与形成在镀金层233上的封装化合物渣料240A间的界面产生脱层,但加热程度并须控制在黏结性佳的散热片23的第一表面230与封装胶体24间的界面不致产生脱层而仍完全黏结;当镀金层233与封装化合物渣料240A间的界面产生脱层后,即可轻易地将该封装化合物渣料240A自镀金层233上撕除,且在撕除的过程中不会影响至散热片23与封装胶体24间的黏结,亦也不会在镀金层233上残留任何封装化合物,故该镀金层233上在封装化合物渣料240A去除后毋须进行任何去除溢胶的后处理,而可降低封装成本并确保制成的半导体封装件(参考图1)2外观的良好。
第二实施例:
如图3所示为本发明第二实施例的半导体封装件。该半导体封装件3具有一倒装式芯片基板30,该基板30的上表面300的预设位置上形成有多个的凸块焊垫(Bump Pads)304,并在该上表面300及与该上表面300相对应的下表面301上分别形成有多个的导电迹线(其为现有技术故未图标)。然后,使多个的焊锡凸块32与各凸块焊垫304焊接,以供一芯片31分别通过该焊锡凸块32以倒装芯片方式电性连接至该基板30上。该芯片31上分别通过粘合剂36与一散热片33的第一表面330相黏接,而使该芯片31所产生的热量可直接传递至散热片33上。该散热片33对应于其第一表面330的第二表面331上也敷镀有一镀金层333,使该镀金层333与形成一用以包覆该芯片31的封装胶体34的封装化合物间的黏结性小于散热片33的第一表面330与封装化合物间的黏结性,以在形成该封装胶体34的模压过程结束时,形成在该镀金层333上的封装化合物渣料(未图式)能轻易去除。由于该镀金层333与在模压制作过程中使用的封装模具的模穴顶壁间形成有一适当距离,故在模压制作过程中可确保芯片31与焊锡凸块32不致受压损坏,而使该具倒装芯片结构的半导体封装件3的合格率可大幅提高,且该散热片33仍得外露出该封装胶体34,使散热效率得以提高。
第三实施例:
如图4所示,本发明第三实施例的半导体封装件4是使用一现有的栅球网格阵列基板40,在该基板40的上表面400及下表面401上分别形成有导电迹线(未图标),且使该上表面400及下表面401的导电迹线彼此电性连接,由于其为现有技术,故在此不另赘述。将一芯片41通过如银胶的粘合剂45黏接至基板40的上表面400上后,以多个的金线42电性连接该芯片41与基板40,再以粘合剂47在该芯片41焊接有金线42的表面上的大致中间位置上黏接一以如半导体材料制成以使其热膨胀系数与芯片41相近或相等的缓冲垫片48,该缓冲垫片48的大小限制在不致干涉至金线42的范围内,且其厚度须略高于金线42的线弧的顶点,以在该缓冲垫片48上以粘合剂46黏接一散热片43时,该散热片43的第一表面430不致碰触至金线42,同时,该缓冲垫片48可消除在高温环境下散热片43因热膨胀系数的不同而对该芯片41所产生的热应力效应,而可确保该芯片41不致受压而破裂,但仍能使该芯片41所产生的热量通过该缓冲垫片48传递至该散热片43,以由该散热片43外露出用以包覆该芯片41及缓冲垫片48的封装胶体44的表面逸散至大气中。再者,该散热片43的第二表面431上也敷镀有一镀金属433。此外,该基板40的下表面401上并以现有的植球方式植接有多个焊球49,以供该芯片41藉之与外界装置电性连接。
第四实施例:
如图5所示为本发明第四实施例的半导体封装件的剖视图。该第四实施例的半导体封装件5的结构大致同于第三实施例所述,其不同处在于该半导体封装件5是以一四边扁平无引线导线架50作为芯片51的芯片承载件。该四边扁平无引线导线架50具有一芯片座500及多个引线501;该芯片座500是供芯片51与之黏接,再以金线52电性连接该芯片51及各引线501,且该芯片51上也黏接有一缓冲垫片58借以供一散热片53黏接其上,而使该缓冲垫片58夹设于芯片51与散热片53间,以使该散热片53的第一表面530不致碰触至金线52,同时,该散热片53的第二表面531上也敷镀有一镀金层533。一封装胶体54也形成在该散热片53的第一表面530及四边扁平无引线导线架50间,而将该芯片51及缓冲垫片58包覆,同时使该芯片座500及各引线501的底面均外露出该封装胶体54。
第五实施例:
图6所示为本发明第五实施例的半导体封装件的剖视图。该第五实施例的半导体封装件6的结构大致同于前述的第三实施例,其不同处在于该半导体封装件6所使用的散热片63,是在其第一表面630上朝芯片61的方向凸伸形成有一连接部634,使该连接部634可通过粘合剂66直接黏着至芯片61的作用表面610上,而使该芯片61所产生的热量可直接传递至该散热片63,并由该散热片63直接外露出用以包覆该芯片61的封装胶体64的镀金层633及侧表面632逸散至大气中,使散热效率可进一步提高;同时,该连接部634的形成可使该散热片63的第一表面630与该金线62的线弧顶点间保持一适当距离,而不致碰触至金线62。
第六实施例:
如图7所示为本发明第六实施例的半导体封装件的剖视图。该第六实施例的半导体封装件7的结构大致同于前述的第四实施例,其不同处在于其使用的散热片73的第一表面730上形成有若干凸部730a,以通过该凸部730a的形成,使该第一表面730与用以包覆黏接至一四边扁平无引线导线架70上的芯片71的封装胶体74的结合面积增加,故得提高该散热片73与封装胶体74间的黏结性。
Claims (24)
1.一种具散热片的半导体封装件,包括:
一芯片承载件;
至少一芯片,其接置在该芯片承载件上并与之电性连接;
一散热片,其具有一第一表面,一对应第一表面的第二表面,以及多个连接在该第一表面及第二表面边缘间的侧表面;该第一表面用以与该芯片黏接而使该散热片黏接至该芯片上,且使该芯片夹置在该芯片承载件及散热片间,而该第二表面上则敷设有一界面层;以及
一封装胶体,其是以封装化合物形成,以包覆该芯片并形成在该散热片的第一表面与芯片承载件之间,而使该散热片的第二表面上的界面层及侧表面均外露出该封装胶体,且使该散热片的侧表面与该封装胶体的侧边共平面,同时,使该界面层与该封装化合物间的黏结性小于该散热片的第一表面与该封装化合物间的黏结性。
2.根据权利要求1所述的半导体封装件,其特征在于:该散热片的面积同于该芯片承载件的面积。
3.根据权利要求1所述的半导体封装件,其特征在于:该散热片第二表面上的界面层是选自由金、铬、镍、其合金及铁氟龙材料所组成的组群中的一种所形成。
4.根据权利要求1所述的半导体封装件,其特征在于:该芯片承载件为一基板。
5.根据权利要求4所述的半导体封装件,其特征在于:该芯片以焊线电性连接至该基板。
6.根据权利要求4所述的半导体封装件,其特征在于:该芯片是通过焊锡凸块电性连接至该基板。
7.根据权利要求1所述的半导体封装件,其特征在于:该芯片承载件是一四边扁平无引线导线架。
8.根据权利要求7所述的半导体封装件,其特征在于:该芯片是以焊线电性连接至该四边扁平无引线导线架。
9.根据权利要求1所述的半导体封装件,其特征在于:该散热片的第一表面予以粗糙化处理。
10.根据权利要求1所述的半导体封装件,其特征在于:该散热片的第一表面予以凹凸化处理。
11.根据权利要求1所述的半导体封装件,其特征在于:该散热片的第一表面予以皱褶化处理。
12.根据权利要求1所述的半导体封装件,其特征在于:该散热片的第一表面上对应于该芯片的部位朝该芯片的方向凸伸出一连接部,以通过该连接部将该散热片连接至该芯片上,而使散热片位于该连接部外的第一表面与该芯片间隔开。
13.根据权利要求1所述的半导体封装件,其特征在于:该散热片通过一热导性粘合剂与该芯片黏接。
14.一种具散热片的半导体封装件,包括:
一芯片承载件;
至少一芯片,其接置在该芯片承载件上并与之电性连接;
至少一缓冲垫片,其是以与该芯片的热膨胀系数相当的材料制成,用以黏设在该芯片上;
一散热片,其具有一第一表面,一对应第一表面的第二表面,以及多个连接于该第一表面与第二表面边缘间的侧表面;该第一表面用以与该缓冲垫片黏接而使该缓冲垫片夹设于该散热片及芯片间,且使该散热片的第一表面与芯片间隔开,而该第二表面上则敷设有一界面层;以及
封装胶体,其是以形成封装化合物,以包覆该芯片与缓冲垫片,并形成于该散热片的第一表面与芯片承载件间,而使该散热片的第二表面上的界面层及侧表面均外露出该封装胶体,且使该散热片的侧表面与该封装胶体的侧边共平面,同时,使该界面层与该封装化合物间的黏结性小于该散热片的第一表面与该封装化合物间的黏结性。
15.根据权利要求14所述的半导体封装件,其特征在于:该散热片的面积同于该芯片承载件的面积。
16.根据权利要求14所述的半导体封装件,其特征在于:该散热片第二表面上的界面层是选自由金、铬、镍、其合金及铁氟龙等金属材料所组成的组群中的一种所形成。
17.根据权利要求14所述的半导体封装件,其特征在于:该芯片承载件为一基板。
18.根据权利要求17所述的半导体封装件,其特征在于:该芯片以焊线电性连接至该基板。
19.根据权利要求14所述的半导体封装件,其特征在于:该芯片承载件是一四边扁平无引线导线架。
20.根据权利要求19所述的半导体封装件,其特征在于:该芯片是以焊线电性连接至该四边扁平无引线导线架。
21.根据权利要求14所述的半导体封装件,其特征在于:该散热片的第一表面予以粗糙化处理。
22.根据权利要求14所述的半导体封装件,其特征在于:该散热片的第一表面予以凹凸化处理。
23.根据权利要求14所述的半导体封装件,其特征在于:该散热片的第一表面予以皱褶化处理。
24.根据权利要求14所述的半导体封装件,其特征在于:该散热片是通过一热导性粘合剂与该缓冲垫片黏接。
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Cited By (2)
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CN100416783C (zh) * | 2005-08-31 | 2008-09-03 | 南茂科技股份有限公司 | 晶穴朝下型芯片封装构造的制造方法及构造 |
CN100466210C (zh) * | 2005-07-15 | 2009-03-04 | 矽品精密工业股份有限公司 | 散热型半导体封装件及其制法 |
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JP4407489B2 (ja) * | 2004-11-19 | 2010-02-03 | 株式会社デンソー | 半導体装置の製造方法ならびに半導体装置の製造装置 |
CN101887885B (zh) * | 2009-05-12 | 2012-05-09 | 日月光封装测试(上海)有限公司 | 半导体封装体的堆叠构造 |
CN104752375A (zh) * | 2013-12-27 | 2015-07-01 | 奇鋐科技股份有限公司 | 半导体散热结构 |
US10079194B1 (en) * | 2017-03-07 | 2018-09-18 | Novatek Microelectronics Corp. | Chip on film package |
TWI667746B (zh) * | 2018-04-03 | 2019-08-01 | 南茂科技股份有限公司 | 半導體封裝結構及其製造方法 |
CN111384000A (zh) * | 2018-12-29 | 2020-07-07 | 中兴通讯股份有限公司 | 芯片封装 |
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Cited By (2)
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CN100466210C (zh) * | 2005-07-15 | 2009-03-04 | 矽品精密工业股份有限公司 | 散热型半导体封装件及其制法 |
CN100416783C (zh) * | 2005-08-31 | 2008-09-03 | 南茂科技股份有限公司 | 晶穴朝下型芯片封装构造的制造方法及构造 |
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