CN1832154A - 散热器及使用该散热器的封装体 - Google Patents
散热器及使用该散热器的封装体 Download PDFInfo
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- CN1832154A CN1832154A CNA2005101090472A CN200510109047A CN1832154A CN 1832154 A CN1832154 A CN 1832154A CN A2005101090472 A CNA2005101090472 A CN A2005101090472A CN 200510109047 A CN200510109047 A CN 200510109047A CN 1832154 A CN1832154 A CN 1832154A
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Abstract
本发明提供一种散热器及使用该散热器的封装体。上述散热器是嵌于一封装体的封胶体上,并置于上述封胶体内的一晶片上,上述封装体包含具有一灌胶口的一基板,上述晶片具有一中心区与距离上述灌胶口最远的一角落,而上述散热器包含:一基座,具有一贯穿开口,上述贯穿开口为一内缘所围绕;多个支撑体,具有一既定宽度,在上述内缘处凸出于上述基座上;以及一盖板,通过上述支撑体的支撑而固定于上述贯穿开口的上方,上述盖板具有一孔洞,在上述散热器嵌于上述封装体内时,上述孔洞是至少位于上述晶片的中心区与上述角落之间的区域的正上方。本发明可改善发生于其晶片上的层间介电层脱层的问题。
Description
技术领域
本发明是关于一种封装体,特别是关于一种具高可靠度的封装体。
背景技术
随着半导体装置中电路密度的增加与尺寸的缩减,其中金属导线图形的层数亦必须增加、间距亦须减少,以有效地连接半导体晶片中各分离的元件。多层被称作层间介电层(inter-layerdielectric;ILD)的绝缘膜或绝缘材料,是用来分离不同层的金属内连线。氧化硅常用作ILD层,其介电常数为4.0~4.5(真空为1)。然而,随着金属导线间距的缩减,由于电容值是反比于导线间距,层内或层间的电容值也随之增加,而增加RC延迟的时间。由于RC延迟的时间会对电路中信号传递的时间造成不良影响,因此,需要减少金属导线间的绝缘材料的介电常数以减少RC延迟的时间,而增进电路的效能例如时脉的反应。
当介电常数小于3的绝缘材料,通常称为低介电常数材料,将其用作金属导线间的ILD时,其与金属间的粘着强度会低于氧化硅与金属之间的粘着强度。再加上封装体中传统封胶材料的线膨胀系数通常大于10ppm/℃,而常用作半导体材料的硅的线膨胀系数约为3ppm/℃,两者之间线膨胀系数如此大的差异会造成热应力作用在封装体中的封胶体与晶片之间。因此,使用低介电常数材料的ILD时,封装制程中所产生的热应力会诱使ILD发生脱层的现象。
发明内容
有鉴于此,本发明是提供一种散热器及使用该散热器的封装体,释放并降低因环境因素或封装体可靠度实验而作用于封装体中的晶片上的热应力,而避免上述晶片中,低介电常数材料的ILD的脱层情形,而增进封装体的可靠度。
本发明是提供一种散热器,上述散热器是嵌于一封装体的封胶体上,并置于上述封胶体内的一晶片上,上述封装体包含具有一灌胶口(molding gate)的一基板,上述晶片具有一中心区与距离上述灌胶口最远的一角落,而上述散热器包含:一基座,具有一贯穿开口,上述贯穿开口为一内缘所围绕;多个支撑体,具有一既定宽度,在上述内缘处凸出于上述基座上;以及一盖板,通过上述支撑体的支撑而固定于上述贯穿开口的上方,上述盖板具有一孔洞,在上述散热器嵌于上述封装体内时,上述孔洞是至少位于上述晶片的中心区与上述角落之间的区域的正上方。
本发明所述的散热器,该孔洞更延伸至该盖板的边缘,而形成一缺口。
本发明所述的散热器,该些支撑体各至少部分支撑着该盖板。
本发明所述的散热器,该些支撑体的其中之一至少部分支撑着该盖板与该缺口,而其他的支撑体则实质上完全支撑着该盖板。
本发明所述的散热器,该孔洞为狭缝(slot)。
本发明是又提供一种封装体,包含:一基板,具有第一表面与第二表面,上述第一表面上具有第一电极与一灌胶口,上述第二表面与上述第一表面为相反面,其上具有第二电极;一晶片,置于上述第一表面上,并位于上述灌胶口以外之处,上述晶片具有一中心区、距离上述灌胶口最远的一角落、与第三电极,上述第三电极电性连接于上述第一电极;一散热器,置于上述第一表面上,并位于上述灌胶口以外之处,上述散热器具有一基座、多个支撑体、与一盖板,上述基座具有一贯穿开口,上述贯穿开口为一内缘所围绕,上述内缘并围绕上述晶片,上述支撑体具有一既定宽度,并在上述内缘处凸出于上述基座上,上述盖板通过上述支撑体的支撑而固定于上述晶片的上方,上述盖板具有一孔洞,上述孔洞是至少位于上述晶片的中心区与上述角落之间的区域的正上方;以及一封胶体,填入上述盖板以下的区域,并覆于上述基座上,且曝露上述盖板。
本发明所述的封装体,该孔洞更延伸至该盖板的边缘,而形成一缺口。
本发明所述的封装体,该些支撑体各至少部分支撑着该盖板。
本发明是又提供一种封装体,包含:一基板,具有第一表面与第二表面,上述第一表面上具有第一电极与一灌胶口,上述第二表面与上述第一表面为相反面,其上具有第二电极;一晶片,置于上述第一表面上,并位于上述灌胶口以外之处,上述晶片具有一中心区、距离上述灌胶口最远的一角落、与曝露的第三电极;一导体,电性连接于上述晶片的第三电极与上述基板的第一电极之间;一散热器,置于上述第一表面上,并位于上述灌胶口以外之处,上述散热器具有一基座、多个支撑体、与一盖板,上述基座具有一贯穿开口,上述贯穿开口为一内缘所围绕,上述内缘并围绕上述晶片,上述支撑体具有一既定宽度,且在上述内缘处凸出于上述基座上,呈一既定间距排列,上述盖板通过上述支撑体的支撑而固定于上述晶片与上述导体的上方,上述盖板具有一贯穿的狭缝,上述狭缝是至少位于上述晶片的中心区与上述角落之间的区域的正上方;一封胶体,填入上述盖板以下的区域,并覆于上述基座上,且曝露上述盖板;以及球状软焊料,位于上述第二电极上。
本发明所述的封装体,该狭缝更延伸至该盖板的边缘,而形成一缺口。
本发明所述的封装体,该些支撑体的其中之一至少部分支撑着该盖板与该缺口,而其他的支撑体则实质上完全支撑着该盖板。
本发明的散热器及使用该散热器的封装体,可有效地释放并降低因环境因素或封装体可靠度实验而作用于封装体中的晶片上的热应力,而避免上述晶片中,低介电常数材料的ILD的脱层情形,而增进封装体的可靠度。
附图说明
图1A为一俯视图,是显示本发明第一实施例的散热器;
图1B为沿着图1A的AA线所作的一剖面图;
图1C为一俯视图,是显示在一封装制程中,将图1A所示的散热器置于一基板上的晶片上方时,上述散热器、晶片、与基板的相对关系;
图2A为一俯视图,是显示本发明第二实施例的散热器;
图2B为沿着图2A的BB线所作的一剖面图;
图2C为一俯视图,是显示在一封装制程中,将图2A所示的散热器置于一基板上的晶片上方时,上述散热器、晶片、与基板的相对关系;
图3为一剖面图,是显示本发明第三实施例的封装体,其是使用绘示于图2A的散热器;
图4为一剖面图,是显示本发明第四实施例的封装体,其是使用绘示于图2A的散热器;
图5为一剖面图,是显示本发明第五实施例的封装体,其是使用绘示于图2A的散热器。
具体实施方式
为了让本发明的上述和其他目的、特征和优点能更明显易懂,下文特举一(些)较佳实施例,并配合所附图示,作详细说明如下:
本发明的发明人发现嵌有一散热器的球栅阵列封装体(ballgrid array;PBGA),通常称为HSBGA(heat spreader ball gridarray),常有严重的可靠度问题。HSBGA封装体中含低介电常数材料ILD层的晶片常无法通过JDEC规范的热循环可靠度试验(thermal cycle tests;TCT)。本发明的发明人发现其原因在于由TCT所引发的热应力会使上述晶片中,距离封装基板的灌胶口最远的晶片角落附近的ILD发生脱层的问题。当HSBGA封装体无法通过TCT试验时,就必须报废或降级,而影响到其产出与良率。
图1A为一俯视图,是显示本发明第一实施例的散热器;图1B为沿着图1A的AA线所作的一剖面图。本发明的散热器包含一基座10、多个支撑体20、与一盖板30,三者通常包含相同材质例如铜、铝、上数的组合、或其他具导热性质的材料。基座10具有一贯穿开口12,贯穿开口12为一内缘13所围绕。另外,基座10较好为具有一接触垫14,以便与一基板对准并置于其上。贯穿开口12较好为大体上成圆形。具有一既定宽度的支撑体20是在内缘12之处凸出于基座10上,各支撑体20之间较好呈一既定间距排列。支撑体20的数量、宽度、与间距的设计可视其功能而定,但必须使其能够充分地支持、固定盖板30。盖板30是通过支撑体20的支撑而固定于贯穿开口12的上方。本发明的一重要特征在于盖板30具有一孔洞32a,其可以为任一形状,而较好为一狭缝,以减少盖板30的面积损失,增进本发明的散热器的帮助封装体散热的功能。孔洞32a亦可以延伸至盖板30的边缘而将盖板30分割成数块,而其前提在于各支撑体20或其中之一必须至少部分支撑着盖板30,以在封装制程中的封胶步骤中维持盖板30的稳定性,以避免其与封装体中的回路接触而发生短路。
在图1C中,本发明的散热器通过接触垫14与一基板100对齐并置于其上,基板100并具有粘着于其上的晶片110,在基板100的角落并具有一灌胶口102。孔洞32a是至少位于晶片110的中心区112与距离灌胶口102最远的一角落114之间的区域的正上方,并曝露上述区域。因此,孔洞32a的位置与大小是决定于上述区域的位置与大小。位于中心区112与角落114之间的区域的正上方的孔洞32a,可帮助使用本发明的封装体,释放来自环境或可靠度试验例如TCT而作用于其上的热应力。因此,即使晶片110具有低介电常数材料的ILD,虽然上述ILD与金属导线之间的附着强度较差,而孔洞32a的应力释放的功能会避免在距离灌胶口102最远的角落114附近的ILD发生脱层的现象。
图2A为一俯视图,是显示本发明第二实施例的散热器;图2B为沿着图2A的BB线所作的一剖面图。本实施例的散热器除了孔洞32b延伸至盖板30的角落而形成一缺口33b之外,其余均大体上与第一实施例的散热器相似。因此其他元件的细节及连结关系可参考第一实施例所描述的,在此便予以省略。缺口33b的位置与尺寸的选择必须使至少一或二个支撑体20能至少部分支撑着盖板30,以在封装制程中的封胶步骤中维持盖板30的稳定性,以避免其与封装体中的回路接触而发生短路。
在图2C中,本发明的散热器通过接触垫14与一基板100对齐并置于其上,基板100并具有粘着于其上的晶片110,在基板100的角落并具有一灌胶口102。孔洞32b是至少位于晶片110的中心区112与距离灌胶口102最远的一角落114之间的区域的正上方,并曝露上述区域。因此,孔洞32b的位置与大小是决定于上述区域的位置与大小。位于中心区112与角落114之间的区域的正上方的孔洞32b,和第一实施例的孔洞32a一样,可帮助使用本发明的封装体,释放来自环境或可靠度试验例如TCT而作用于其上的热应力。
以下的第三至第五实施例是揭露本发明的封装体,均以使用本发明第二实施例的散热器为例,但不应对本发明构成限制。本领域技术人员亦可以在本发明的封装体中使用第一实施例的散热器。
图3为一剖面图,是显示本发明第三实施例的封装体,为沿着其对角线所绘制。首先提供一基板300,其可以是适用于BGA基板的塑胶基底或陶瓷基底的印刷电路板;基板300亦可以为导线架。基板300包含互为相反面的第一表面301与第二表面302。第一表面301上具有第一电极303,并在其一角落处具有一灌胶口306;第二表面302上具有第二电极304。第二电极304可为BGA或LGA封装体的导体接触垫,或适用于表面粘着技术(surface mounttechnology;SMT)或引脚插入连接技术(pin-through-hole;PTH)的引脚(lead)。基板300较好为更包含一内部线路(未绘示)电性连接于第一表面301与第二表面302上的第一电极303与第二电极304之间。一连接材料200例如可含银微粒或不含银微粒的环氧树脂,是形成于第一表面301上、第一电极303与灌胶口306以外的区域,然后将一晶片310置于连接材料200上并使其硬化,而将晶片310固定在第一表面301上。晶片310上具有一中心区312、角落314、与第三电极316。角落314是晶片310中,距离灌胶口306最远的一个角落。接下来,以传统的焊线步骤形成一导体320例如为金线或铝线,以电性连接第一电极303与第三电极316。接下来,本发明第二实施例的散热器是置于第一表面301上,并位于灌胶口306以外之处(其俯视图可参考图2C)。因此本实施例的散热器的其他元件的细节及连结关系,以及上述散热器、基板300、与晶片310的相对位置关系均可参考第二实施例所描述的,在此便予以省略。接下来,一封胶体330形成于基板300上,并填入盖板30以下的区域,并覆于基座10上,且曝露盖板30;然后,再施以一硬化的步骤使封胶体330硬化。封胶体330则包含环氧树脂、硬化剂、与无机填充物。上述无机填充物在封胶体330中的含量较好为89~92wt%,以减少封胶体330的线膨胀系数,而可减少因环境因素或可靠度试验例如TCT所产生并作用于晶片310上的热应力。最后,当基板300为适用于BGA的基板时,可形成一球状软焊料340于第二电极304上。当第二电极304为适用于SMT或PTH的导电引脚时,其则会被裁剪并加工至所需的形状。
图4为一剖面图,是显示本发明第四实施例的封装体,为沿着其对角线所绘制。本实施例的封装体为一卷带式自动接合(tapeautomatic bonding;TAB)的封装体。首先,提供一基板400,其例如是适用于TAB的可挠式印刷电路板。基板400包含互为相反面的第一表面401与第二表面402。第一表面401上具有第一电极403,并在其一角落处具有一灌胶口406。包含两个端点421与422的导电性接合物420,是通过端点421置于第一表面403上。第二表面402上具有第二电极404。第二电极404可为BGA或LGA封装体的导体接触垫,或适用于SMT或PTH的引脚。基板400较好为更包含一内部线路(未绘示)电性连接于第一表面401与第二表面402上的第一电极403与第二电极404之间。一连接材料200例如可含银微粒或不含银微粒的环氧树脂,是形成于第一表面401上、第一电极403与灌胶口406以外的区域,然后将一晶片410置于连接材料200上并使其硬化,而将晶片410固定在第一表面401上。晶片410上具有一中心区412、角落414、与第三电极416。角落414是晶片410中,距离灌胶口406最远的一个角落。接下来,将接合物420的端点422接合于第三电极416,以电性连接第一电极403与第三电极416。接下来,本发明第二实施例的散热器是置于第一表面401上,并位于灌胶口406以外之处(其俯视图可参考图2C)。因此本实施例的散热器的其他元件的细节及连结关系,以及上述散热器、基板400、与晶片410的相对位置关系均可参考第二实施例所描述的,在此便予以省略。接下来,一封胶体430形成于基板400上,并填入盖板30以下的区域,并覆于基座10上,且曝露盖板30;然后,再施以一硬化的步骤使封胶体430硬化。最后,当基板400为适用于BGA的基板时,可形成一球状软焊料440于第二电极404上。有关封胶体430与第二电极404的其他相关细节,可参考第三实施例对封胶体330与第二电极304的相关叙述,在此便予以省略。
图5为一剖面图,是显示本发明第五实施例的封装体,为沿着其对角线所绘制。首先提供一基板500,其可以是适用于BGA基板的塑胶基底或陶瓷基底的印刷电路板;基板500亦可以为导线架。基板500包含互为相反面的第一表面501与第二表面502。第一表面501上具有适用于覆晶封装接合的第一电极503,并在其一角落处具有一灌胶口506;第二表面502上具有第二电极504。第二电极504可为BGA或LGA封装体的导体接触垫,或适用于SMT或PTH的引脚。基板500较好为更包含一内部线路(未绘示)电性连接于第一表面501与第二表面502上的第一电极503与第二电极504之间。接下来,提供一晶片510,其上具有一中心区512、角落514、与第三电极516,其中第三电极516为凸出于晶片510上的导电凸块。然后将第三电极516与第一电极503对准而固定于其上,使第三电极516电性连接于第一电极503,并将晶片510置于第一表面501上。接下来施以一热制程例如回焊(reflow)或热压合(thermallamination),以增加第三电极516与第一电极503之间的接合强度。接下来,形成一底胶(underfill)250,填满第一表面501与晶片510之间的其他空间。接下来,本发明第二实施例的散热器是置于第一表面501上,并位于灌胶口506以外之处(其俯视图可参考图2C)。因此本实施例的散热器的其他元件的细节及连结关系,以及上述散热器、基板500、与晶片510的相对位置关系均可参考第二实施例所描述的,在此便予以省略。由于本实施例的封装体是使用覆晶接合(flip-chip bonding)的技术,在晶片510与盖板30之间较好为一导热性的材料260所连接,以增加本实施例的封装体的散热效能。接下来,一封胶体530形成于基板500上,并填入盖板30以下的区域,并覆于基座10上,且曝露盖板30;然后,再施以一硬化的步骤使封胶体530硬化。最后,当基板500为适用于B GA的基板时,可形成一球状软焊料540于第二电极504上。有关封胶体530与第二电极504的其他相关细节,可参考第三实施例对封胶体330与第二电极304的相关叙述,在此便予以省略。
孔洞32b是至少位于中心区312、412、512与角落314、414、514之间的区域的正上方,而可分别帮助本发明第三至五实施例的封装体,释放来自环境或可靠度试验例如TCT而作用于其上的热应力。因此,即使晶片310、410、510具有低介电常数材料的ILD,虽然上述ILD与金属导线之间的附着强度较差,而孔洞32b的应力释放的功能会分别避免在距离灌胶口306、406、506最远的角落314、414、514附近的ILD发生脱层的现象。
如上所述,本发明的散热器及使用该散热器的封装体,可有效地释放并降低因环境因素或封装体可靠度实验而作用于封装体中的晶片上的热应力,而避免上述晶片中,低介电常数材料的ILD的脱层情形,而增进封装体的可靠度,是达成本发明的目的。
另外,使用低介电常数材料作为ILD的晶片以接面向下(cavity down)的型式封装时,因环境因素或封装体可靠度实验例如TCT的热循环而产生的热应力亦会使其ILD发生脱层。上述接面向下型式的封装体,使用含89~92wt%的无机填充物的封胶材料时,可以降低上述晶片与封胶体之间线膨胀系数的差异,而改善发生于其晶片上的ILD脱层的问题。
以上所述仅为本发明较佳实施例,然其并非用以限定本发明的范围,任何熟悉本项技术的人员,在不脱离本发明的精神和范围内,可在此基础上做进一步的改进和变化,因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。
附图中符号的简单说明如下:
10:基座
12:贯穿开口
13:内缘
14:接触垫
20:支撑体
30:盖板
32a、32b:孔洞
33b:缺口
100:基板
102:灌胶口
110:晶片
112:中心区
114:角落
200:连接材料
250:底胶
260:导热性的材料
300、400、500:基板
301、401、501:第一表面
302、402、502:第二表面
303、403、503:第一电极
304、404、504:第二电极
306、406、506:灌胶口
310、410、510:晶片
312、412、512:中心区
314、414、514:角落
316、416、516:第三电极
320:导体
330、430、530:封胶体
340、440、540:球状软焊料
420:导电性接合物
421、422:端点
Claims (11)
1.一种散热器,嵌于一封装体的封胶体上,并置于该封胶体内的一晶片上,该封装体包含具有一灌胶口的一基板,该晶片具有一中心区与距离该灌胶口最远的一角落,而该散热器包含:
一基座,具有一贯穿开口,该贯穿开口为一内缘所围绕;
多个支撑体,具有一既定宽度,在该内缘处凸出于该基座上;以及
一盖板,通过该支撑体的支撑而固定于该贯穿开口的上方,该盖板具有一孔洞,在该散热器嵌于该封装体内时,该孔洞是至少位于该晶片的中心区与该角落之间的区域的正上方。
2.根据权利要求1所述的散热器,其特征在于,该孔洞更延伸至该盖板的边缘,而形成一缺口。
3.根据权利要求2所述的散热器,其特征在于,该支撑体各至少部分支撑着该盖板。
4.根据权利要求2所述的散热器,其特征在于,该支撑体的其中之一至少部分支撑着该盖板与该缺口,而其他的支撑体则实质上完全支撑着该盖板。
5.根据权利要求1所述的散热器,其特征在于,该孔洞为狭缝。
6.一种封装体,所述封装体包含:
一基板,具有第一表面与第二表面,该第一表面上具有第一电极与一灌胶口,该第二表面与该第一表面为相反面,其上具有第二电极;
一晶片,置于该第一表面上,并位于该灌胶口以外之处,该晶片具有一中心区、距离该灌胶口最远的一角落、与第三电极,该第三电极电性连接于该第一电极;
一散热器,置于该第一表面上,并位于该灌胶口以外之处,该散热器具有一基座、多个支撑体、与一盖板,该基座具有一贯穿开口,该贯穿开口为一内缘所围绕,该内缘并围绕该晶片,该支撑体具有一既定宽度,并在该内缘处凸出于该基座上,该盖板通过该支撑体的支撑而固定于该晶片的上方,该盖板具有一孔洞,该孔洞是至少位于该晶片的中心区与该角落之间的区域的正上方;以及
一封胶体,填入该盖板以下的区域,并覆于该基座上,且曝露该盖板。
7.根据权利要求6所述的封装体,其特征在于,该孔洞更延伸至该盖板的边缘,而形成一缺口。
8.根据权利要求7所述的封装体,其特征在于,该支撑体各至少部分支撑着该盖板。
9.一种封装体,所述封装体包含:
一基板,具有第一表面与第二表面,该第一表面上具有第一电极与一灌胶口,该第二表面与该第一表面为相反面,其上具有第二电极;
一晶片,置于该第一表面上,并位于该灌胶口以外之处,该晶片具有一中心区、距离该灌胶口最远的一角落、与曝露的第三电极;
一导体,电性连接于该晶片的第三电极与该基板的第一电极之间;
一散热器,置于该第一表面上,并位于该灌胶口以外之处,该散热器具有一基座、多个支撑体、与一盖板,该基座具有一贯穿开口,该贯穿开口为一内缘所围绕,该内缘并围绕该晶片,该支撑体具有一既定宽度,且在该内缘处凸出于该基座上,呈一既定间距排列,该盖板通过该支撑体的支撑而固定于该晶片与该导体的上方,该盖板具有一贯穿的狭缝,该狭缝是至少位于该晶片的中心区与该角落之间的区域的正上方;
一封胶体,填入该盖板以下的区域,并覆于该基座上,且曝露该盖板;以及
球状软焊料,位于该第二电极上。
10.根据权利要求9所述的封装体,其特征在于,该狭缝更延伸至该盖板的边缘,而形成一缺口。
11.根据权利要求10所述的封装体,其特征在于,该支撑体的其中之一至少部分支撑着该盖板与该缺口,而其他的支撑体则实质上完全支撑着该盖板。
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US11/073,676 US7190066B2 (en) | 2005-03-08 | 2005-03-08 | Heat spreader and package structure utilizing the same |
US11/073,676 | 2005-03-08 |
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CN107004658A (zh) * | 2014-12-04 | 2017-08-01 | 微软技术许可有限责任公司 | 用于从电子设备高效地传递热量的系统以及用于形成该系统的方法 |
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US20080237842A1 (en) * | 2007-03-29 | 2008-10-02 | Manepalli Rahul N | Thermally conductive molding compounds for heat dissipation in semiconductor packages |
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US20230067664A1 (en) * | 2021-08-31 | 2023-03-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and manufacturing method thereof |
TWI779811B (zh) * | 2021-09-01 | 2022-10-01 | 豪傑長宏科技有限公司 | 用於半導體晶片封裝的複合式封閉型金屬蓋板 |
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-
2005
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- 2005-08-24 TW TW094128920A patent/TWI272705B/zh not_active IP Right Cessation
- 2005-10-18 CN CNB2005101090472A patent/CN100378972C/zh not_active Expired - Fee Related
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CN101226888B (zh) * | 2008-02-15 | 2010-09-15 | 日月光半导体制造股份有限公司 | 散热型芯片封装工艺及其构造 |
CN107004658A (zh) * | 2014-12-04 | 2017-08-01 | 微软技术许可有限责任公司 | 用于从电子设备高效地传递热量的系统以及用于形成该系统的方法 |
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US20060202326A1 (en) | 2006-09-14 |
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TWI272705B (en) | 2007-02-01 |
US7190066B2 (en) | 2007-03-13 |
US20070138627A1 (en) | 2007-06-21 |
US7378731B2 (en) | 2008-05-27 |
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