CN1283004C - 半导体装置及其制造方法、线路基板及电子机器 - Google Patents

半导体装置及其制造方法、线路基板及电子机器 Download PDF

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CN1283004C
CN1283004C CNB02160455XA CN02160455A CN1283004C CN 1283004 C CN1283004 C CN 1283004C CN B02160455X A CNB02160455X A CN B02160455XA CN 02160455 A CN02160455 A CN 02160455A CN 1283004 C CN1283004 C CN 1283004C
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semiconductor device
semiconductor
semiconductor chip
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CN1430277A (zh
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富松浩之
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Seiko Epson Corp
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Seiko Epson Corp
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    • H05K3/341—Surface mounted components

Abstract

一种半导体装置，包括芯片座(30)、在芯片座(30)的一个面上叠加的多个半导体芯片、向所述芯片座延伸的引出脚(34)、与多个半导体芯片中第一半导体芯片(10)的第一接点(12)及多个半导体芯片中第二半导体芯片(20)的第二接点22)相接合的第一金属丝线(40)、与引出脚(34)及第一或第二接点(12、22)相接合的第二金属丝线(50)、以及将多个半导体芯片密封，从芯片座(30)的另一个面露出的密封材料(60)。在迭式结构的半导体装置中，能够同时提高可靠性与实现高速化。

Description

半导体装置及其制造方法、线路基板及电子机器
技术领域
本发明涉及一种半导体装置及其制造方法、线路基板及电子机器。
背景技术
实现了高密度安装的迭式结构的半导体装置为众所周知。例如，在引出脚框架的芯片座上叠置多个半导体芯片，并且通过金属丝线将各半导体芯片与引出脚电连接的形式是为人所共知的。此时，各半导体芯片的电极与引出脚之间是通过金属丝线直接接合的。
然而，半导体芯片的电极与引出脚之间的距离，比不同半导体芯片的电极与电极之间的距离要大，如果以引出脚为起点分别向各半导体芯片引出金属丝线，则全体的金属丝线就会变长。因而，金属丝线的电阻也会增大，有时成为高速化的障碍。而且，由于金属丝线较长，还有与其它金属丝线发生短路的可能性。
发明内容
本发明是为了解决上述问题而提出的，其目的在于，在具有迭式存储器(栈)结构的半导体装置中，提高可靠性的同时实现高速化。
为了达到上述目的，本发明所采取的措施如下。
(1)本发明中的半导体装置包括：芯片座；在所述芯片座的一个面上叠放的多个半导体芯片；向所述芯片座延伸的引出脚；接合在所述多个半导体芯片中的第一半导体芯片的第一接点、及所述多个半导体芯片中的第二半导体芯片的第二接点上的第一金属丝线；接合在所述引出脚及第一或第二接点上的第二金属丝线；以及将所述多个半导体芯片密封，并使所述芯片座的另一个面露出的密封材料。
根据本发明，第一金属丝线与第一半导体芯片的第一接点及第二半导体芯片的第二接点相接合。也就是说，第一与第二半导体芯片之间通过第一金属丝线而电连接。因此，与以引出脚作为起点分别向第一及第二接点引出金属丝线的情况相比，可以缩短全体的金属丝线的长度(第一与第二金属丝线的长度)。这样，不仅能够节省金属丝线的材料费，而且通过减小全体金属丝线的电阻从而能够实现半导体装置的高速化。还有，由于全体金属丝线的长度较短，所以能够防止第一与第二金属丝线之间的短路。
(2)在该半导体装置中，还可以使所述第二半导体芯片装载在所述第一半导体芯片之上，所述第二金属丝线与所述引出脚及所述第二接点相接合。
(3)在该半导体装置中，还可以将所述第二金属丝线通过所述第一金属丝线的上方而引出。
这样，能够防止第一与第二金属丝线之间的短路。
(4)在该半导体装置中，还可以使所述第二金属丝线与所述第一金属丝线形成交叉地引出。
这样，就不会受到第一金属丝线引出方式的限制，将第二金属丝线自由地引出。
(5)在该半导体装置中，还可以将所述第二金属丝线在所述第二接点上与所述第一金属丝线相重叠地接合。
这样，即使是在第二接点区域很窄的情况下，也可以在第二接点上连接多根金属丝线。
(6)在该半导体装置中，还可以使所述第二金属丝线具有形成在前端部的球，所述球压接在所述第一金属丝线上。
这样，通过将第二金属丝线的球压接在第2接点上的第一金属丝线的局部上，可以增强第一金属丝线与第二接点的接合部。
(7)在该半导体装置中，还可以使所述第二金属丝线，避开所述第一金属丝线的接合部地接合在接合有所述第一金属丝线的所述第二接点上。
这样，例如因不需要将第一及第二金属丝线重叠就行，因而能够使第一及第二金属丝线可靠地连接在第二接点上。
(8)在该半导体装置中，还可以使所述第二半导体芯片具有多个所述第二接点，所述多个第二接点具有通过布线电连接的一组接点，所述第一金属丝线与所述一组接点中的一个接点相接合，所述第二金属丝线与所述一组接点中的另一个接点相接合。
这样，例如因不需要将第一及第二金属丝线重叠就行，因而能够使第一及第二金属丝线可靠地连接在第二接点上。
(9)在该半导体装置中，还可以在所述第二接点上设置凸起，使所述第一及第二金属丝线通过所述凸起与所述第二接点相接合。
(10)在该半导体装置中，还可以将所述第二半导体芯片装载在所述第一半导体芯片之上，使所述第二金属丝线与所述引出脚及所述第一接点相接合。
(11)在该半导体装置中，所述第一半导体芯片可以是存储器，所述第二半导体芯片可以是微处理器。
(12)本发明中的电路基板安装了所述半导体装置。
(13)本发明中的电子机器具有所述半导体装置。
(14)本发明中的半导体装置的制造方法包括：
(a)将多个半导体芯片叠放在芯片座一侧的面上的工序；
(b)将第一金属丝线接合在所述多个半导体芯片中的第一半导体芯片的第一接点、及所述多个半导体芯片中的第二半导体芯片的第二接点上的工序；
(c)将所述第二金属丝线接合在向所述芯片座延伸的引出脚及所述第一或第二接点上的工序；以及
(d)将所述多个半导体芯片密封，并使所述芯片座的另一个面露出的工序。
根据本发明，将第一金属丝线与第一半导体芯片的第一接点及第二半导体芯片的第二接点相接合。也就是说，将第一与第二半导体芯片之间通过第一金属丝线直接电连接。因此，与自引出脚作为起点，分别向第一及第二接点引出金属丝线的情况相比，全体的金属丝线的长度(第一与第二金属丝线的长度)就能够减少。这样，不仅能够节省金属丝线的材料费，而且还由于全体金属丝线的电阻的减小而能够实现半导体装置的高速化。还有，由于全体金属丝线的长度较短，能够防止第一与第二金属丝线之间的短路。
(15)在该半导体装置的制造方法中，还可以，
在所述(a)工序中，将所述第二半导体芯片装载在所述第一半导体芯片之上的工序，
在所述(c)工序中，将所述第二金属丝线与所述引出脚及所述第二接点相接合。
(16)在该半导体装置的制造方法中，还可以，
在所述(c)工序中，将所述第二金属丝线通过所述第一金属丝线的上方引出。
这样，就能够防止第一与第二金属丝线之间的短路。
(17)在该半导体装置的制造方法中，还可以，
在所述(c)工序中，将所述第二金属丝线通过与所述第一金属丝线相交叉而引出。
这样，就不会受到第一金属丝线引出方式的限制，将第二金属丝线自由地引出。
(18)在该半导体装置的制造方法中，还可以，
在所述(c)工序中，将所述第二金属丝线在所述第二接点上与所述第一金属丝线相重叠地接合。
这样，即使是在第二接点区域很窄的情况下，也可以在第二接点上连接多根金属丝线。
(19)在该半导体装置的制造方法中，还可以，
在所述(c)工序中，在所述第二金属丝线的前端部形成球，并将所述球压接在所述第一金属丝线上。
这样，由于第二金属丝线的球压接在第一金属丝线上，所以能够增强第一金属丝线与第二接点的接合部。
(20)在该半导体装置的制造方法中，还可以，
在所述(b)或(c)工序中，不形成球地将所述第一及第二金属丝线的前端部，与所述第二接点相接合。
(21)在该半导体装置的制造方法中，还可以，
在所述(c)工序中，将所述第二金属丝线，避开所述第一金属丝线的接合部地接合在接合有所述第一金属丝线的所述第二接点上。
这样，例如，由于不需要将第一及第二金属丝线重叠就行，所以能够将第一及第二金属丝线可靠地连接在第二接点上。
(22)在该半导体装置的制造方法中，还可以，
所述第二半导体芯片具有多个第二接点，
所述多个第二接点具有通过布线电连接的一组接点，
在所述(b)工序中，将所述第一金属丝线与所述一组接点中的一个接点相接合，
在所述(c)工序中，将所述第二金属丝线与所述一组接点中的另一个接点相接合。
这样，例如，由于不需要将第一及第二金属丝线重叠就行，所以能够将第一及第二金属丝线可靠地连接在第二接点上。
(23)在该半导体装置的制造方法中，还可以，
在所述(b)或(c)工序中，在所述第二接点上设置有凸起，将所述第一及第二金属丝线通过所述凸起与所述第二接点相接合。
附图说明
图1(A)与(B)是表示实施例1中的半导体装置的图。
图2是表示实施例1中的半导体装置的图。
图3是表示实施例1的变形例的半导体装置的图。
图4是表示实施例1的变形例的半导体装置的图。
图5(A)～(C)是表示实施例1的半导体装置的制造方法的图。
图6(A)～(C)是表示实施例1的变形例的半导体装置的制造方法的图。
图7是表示实施例2的半导体装置的图。
图8是表示实施例3的半导体装置的图。
图9是表示装载有应用本发明实施例的半导体装置的线路基板的图。
图10是表示应用本发明实施例的电子机器的图。
图11是表示应用本发明实施例的电子机器的图。
符号说明：
10-第一半导体芯片；12-第一接点；20-第二半导体芯片；22-第二接点；24-第二接点；26-一组接点；30-芯片座；34-引出脚；40-第一金属丝线；41-球；42-凸起；50-第二金属丝线；51-球；52-凸起；60-密封材料；150-第二金属丝线；200-半导体芯片；210-半导体芯片；220-半导体芯片；230-金属丝线；232-金属丝线；234-金属丝线。
具体实施方式
以下参照附以说明本发明的实施例。但是，本发明并不限于以下的实施例。
(实施例1)
图1(A)～图6(C)是说明实施例1中半导体装置及其制造方法的图。
如图1(A)所示，本实施例中的半导体装置，包括多个半导体芯片、芯片座30、引出脚34、第一及第二金属丝线40、50、以及密封材料60。还有，图1(B)是为了说明第一及第二金属丝线40、50状态的、半导体装置的局部的平面图。
多个半导体芯片包括第一及第二半导体芯片10、20。在图1(A)中，两个半导体芯片(第一及第二半导体芯片10、20)被叠置。或者是，三个半导体芯片叠放也没有关系。在这种情况下，第一及第二半导体芯片10、20，是指多个半导体芯片中的任意两个。
第一半导体芯片10大多是长方体。在第一半导体芯片10的某一个面上形成有线路元件(晶体管等)。第一半导体芯片10具有一个或多个第一接点12。第一接点12既可以是矩形(例如正方形)的角形接点，也可以是圆形接点。第一接点12，可以由铝类或铜类的金属形成薄且平的形状。第一接点12，大多形成在有线路元件的面的一侧。第一接点12，大多是沿着第一半导体芯片10的面中的至少一个边(例如相对向的2边或4边)排列。而且，在第一半导体芯片10的避开第一接点12的至少一部分上，形成有钝化膜(图中未表示)。钝化膜例如可以由SiO2、SiN、聚酰亚胺树脂所形成。
第二半导体芯片20可以具有与第一半导体芯片10相似的形状。在第二半导体芯片20装载在第一半导体芯片10上的情况下，希望第二半导体芯片20的外形能够比第一半导体芯片10的外形小。第二半导体芯片20具有一个或多个第二接点22。另外，其它的结构能够用第一半导体芯片10中的说明。
第一及第二半导体芯片10、20叠放在芯片座30上。芯片座30是由铜类或铁类的板材加工而成，为矩形的情况居多。在图1(A)中，第一半导体芯片10装载在芯片座30上，第二半导体芯片20装载在第一半导体芯片10上。在这种情况下，第一半导体芯片10正面朝上地焊接在芯片座30上，第二半导体芯片20正面朝上地焊接在第一半导体芯片10上。第二半导体芯片20，避开多个第一接点12而装载在第一半导体芯片10上。第二半导体芯片20可以装载在第一半导体芯片10的近似中央部。
在图1(A)中，由粘结剂32将第一半导体芯片10接合于芯片座30。第一及第二半导体芯片10、20之间也可以由粘结剂32而接合。作为粘结剂32，可以使用热固性树脂，也可以使用热传导性高的材料，例如金属糊状物(例如银糊)。这样，由第一及第二半导体芯片10、20的工作时所产生的热，能够通过芯片座30的传导而容易散去。
多个引出脚34向芯片座30延伸。引出脚34大多是由与芯片座30相同的材料而构成。引出脚34包含有内部引出脚36及外部引出脚38。内部引出脚36是由后述的密封材料60所密封的部分，外部引出脚38是由密封材料60引出的部分，并作为与外部电连接的部分而使用。外部引出脚38弯折成所规定的形状(在图1(A)中为拐角状)。还有，外部引出脚38上可以形成焊接材料(例如焊锡)或锡等金属薄膜39。
第一接点12与第二接点22通过第一金属丝线40而电连接。详细说来，第一金属丝线40的一端连接着第一接点12，而另一端连接着第二接点22。还有，第一金属丝线40，例如可以由金、铝、铜等金属所构成。
在第一接点12上还可以设置凸起42。希望凸起42的材料能够是与连接的第一金属丝线40相同的材料，例如，也可以是金。凸起42也可以是第一金属丝线40的一部分。即，凸起42可以是由在第一金属丝线40的前端部形成的球受压溃缩而形成。由于在第一接点12上形成了凸起42，使第一金属丝线40与第一接点12之间的接合强度得到提高。
在本实施例中，第二接点22与引出脚34(具体讲是内部引出脚36)通过第二金属丝线50而电连接。详细说来，第二金属丝线50的一端连接着第二接点22，而另一端连接着引出脚34。还有，第二金属丝线50可以由与第一金属丝线40相同的材料所构成。
在第二接点22上还可以设置凸起52。希望凸起52的材料能够是与连接的第一及第二金属丝线40、50相同的材料，例如，也可以是金。凸起52也可以是第二金属丝线50的一部分。即，凸起52可以是由在第二金属丝线50的前端部形成的球受压溃缩而形成。由于在第二接点22上形成了凸起52，使第二金属丝线50与第二接点22之间的接合强度得到提高。
或者，凸起52也可以是第一金属丝线40的一部分。而且，在引出脚34与第二金属丝线50的接合部，也可以设置凸起(参照图6(C))。由于在引出脚34上形成了凸起52，使第二金属丝线50与引出脚34之间的接合强度得到提高。
如图1(A)所示，第二金属丝线50从第一金属丝线40的上方而引出。换言之，第一金属丝线40的环(弯曲部分)不会超过第二金属丝线50的环。这样，就能够防止第一、第二金属丝线40、50之间的短路。
在图1(A)与图1(B)所示的例子中，第一、第二金属丝线40、50在第二接点22上重叠接合。这样，引出脚34与第一接点12之间，就通过第一、第二金属丝线40、50而电气接通。而且，即使是第二接点22很窄，也可以将第一、第二金属丝线40、50连接在第二接点22上。在第一金属丝线40上，可以重叠第二金属丝线50。这样，第二金属丝线50就容易从第一金属丝线40的上方而引出。
如图1(A)所示，密封材料60将多个半导体芯片密封。详细说来，密封材料密封了第一、第二半导体芯片10、20，第一、第二金属丝线40、50，以及内部引出脚36。密封材料60大多是树脂(例如环氧系列的树脂)。密封材料60露出芯片座30的一部分。详细说来，密封材料60将与芯片座30的第一、第二半导体芯片10、20的装载面的反向的面露出。这样，第一、第二半导体芯片10、20中所产生的热，就能够通过芯片座30的露出部分而散发。
如图2所示，第二金属丝线50还可以与第一金属丝线40交叉而引出。详细说来，在第一、第二半导体芯片10、20的平面视图中，第一及第二金属丝线40、50可以交叉。在这种情况下，第一及第二金属丝线40、50并不接触。例如，第二金属丝线50可以从第一金属丝线40的上方而引出。这样，第二金属丝线50就不受第一金属丝线40的引出形式的限制，可以自由地引出。换言之，第一接点12、第二接点22、引出脚34各自的位置，可以不受第一及第二金属丝线40、50引出形式的限制，可以自由地设计。
多个半导体芯片，例如可以是闪存储器、SRAM(Static RAM)、DRAM(Dynamic RAM)等各种存储器，或者是被称为MPU(Micro ProcessorUnit)、MCU(Micro Controller Unit)的等微处理器。例如，第一、第二半导体芯片10、20，可以是存储器与微处理器的组合、或存储器与存储器的组合(闪存储器与SRAM、SRAM与SRAM、DRAM与DRAM等)。在图1所示的例中，第一半导体芯片10是存储器(例如闪存储器)，第二半导体芯片20是微处理器。
图3表示了本实施例中半导体装置的变形例。在本变形例中，第二半导体芯片20有一个或多个第二接点24(图3中为一个)。在第二接点24上，第一及第二金属丝线40、50不相重合而接合。详细说来，第一金属丝线40与第二接点24的一部分相结合，而第二金属丝线50则与第二接点24上避开与第一金属丝线40相接合部分的另一部分接结合。换言之，在一个第二接点24的平面视图上，第一及第二金属丝线40、50的接合部相并列。由此，由于第一及第二金属丝线40、50能够不相重合而接合，所以第一及第二金属丝线40、50能够确实接合在第二接点22上。如图3所示，第二接点24可以具有比第二半导体芯片20上形成的其它接点的外形较大的外形。例如，第二接点24可以是以其它接点的正方形的一边为短边的矩形。
图4表示了本实施例中半导体装置的其它的变形例。在本变形例中，第二半导体芯片20，通过布线28而连接有一组接点26(图4中为2个)。而且，第一金属丝线40与一组接点26中的一个相接合，第二金属丝线50与一组接点26中的另一个相接合。这样，由于不需要将第一及第二金属丝线40、50重叠就行，所以能够将第一及第二金属丝线40、50可靠地连接在第二接点22上。
布线28，在第二半导体芯片20上形成一组接点26的面上而形成。布线28也可以在第二半导体芯片20的制造工序中与一组接点26的形成同时形成。在这种情况下，布线28可以是与一组接点26相同的材料(例如铝类或铜类的金属)。如图4所示，也可以在一组接点26的接点之间形成其它的接点(例如第二接点22)。根据本实施例，由于在接点与接点之间进行了电连接，所以不必要从一组接点26的各个接点向第一半导体芯片10及引出脚34引线即可。因此，就能够减少整体金属丝线的数目。
根据本实施例，第一金属丝线40与第一半导体芯片10的第一接点12及第二半导体芯片20的第一接点22相连接。也就是说，第一及第二半导体芯片10、20由第一金属丝线40而直接连接。因此，与以引出脚34为起点分别向第一及第二接点21、22引出金属丝线相比，能够使整体的金属丝线(第一及第二金属丝线40、50的长度)缩短。这样，不仅能够减少金属丝线的材料费用，而且由于全体丝线的电阻的减小，能够实现半导体装置的高速化。而且，由于全体丝线长度的减小，还能够防止第一及第二金属丝线40、50之间的短路。
下面说明本实施例中半导体装置的制造方法。这里，图5(A)～图6(C)是说明半导体装置的制造方法的一部分(引线接合法(wirebonding))的图。
首先，进行模接合工序。即，在芯片座30上装载第一及第二半导体芯片10、20。例如，可以通过接合剂32，进行芯片座30与第一半导体芯片10之间，以及第一半导体芯片10与第二半导体芯片20之间的接合。
接着，进行引线接合工序。例如，由金属丝线，将第一接点21与第二接点22，第二接点22与引出脚34的内部引出脚36电连接。在引线接合工序中，如图所示，可以采用钉头(nailhead)方式，也可以采用在前端部不形成球的楔入(wedge)方式。
如图5(A)所示，在第一半导体芯片10的形成第一接点12的一侧，配置毛细管(capillary)70。在毛细管70中，穿通地插有第一金属丝线40(成为第一金属丝线的电线)。在第一金属丝线40上，在毛细管70的外侧形成有球41。球41是在第一金属丝线40的前端部，例如由电焊炬而进行的高压放电所形成。这样，开放钳制器72，使毛细管70下降，将球41压向第一接点12。在球41以一定的压力压向第一接点12期间施加超声波或热。这样。在第一接点12上形成凸起42，使第一金属丝线40与第一接点12相接合(第一接合)。
其后，关闭毛细管70，保持第一金属丝线40，如图5(A)所示，同时控制毛细管70与钳制器72，弯曲第一金属丝线40。这样，第一金属丝线40的一部分，就压向第二接点22比能够与其接合，即第一金属丝线40与第二接点22相接合(第二接合)。也就是说，第一金属丝线40在不形成球的情况下与第二接点22相接合。例如，在第一金属丝线40的直径约为25～30μm的情况下，可以用约0.20～0.30N的压力将第一金属丝线40的宽度压溃至其直径的1.5～2倍。在这种情况下，压接时施加超声波或热等。
如图5(A)所示，第一接合的位置(例如第一接点12的位置)比第二接合的位置(例如第二接点22的位置)要低，这同与此相反的情况相比，能够使第一金属丝线40弯曲的高度降低。因此，可以使半导体装置变薄。
接着，如图5(B)所示，与第一金属丝线40的接合同样，将第二金属丝线50与第二接点22及引出脚3接合。例如，可以对第二接点22实行第一接合。对内部引出脚36实行第二接合。在第一接合中，如上所述，在第二金属丝线50的前端部形成球51，将球51压向第二接点22。在第一及第二金属丝线40、50重叠接合的情况下，如图5(C)所示，将球51压向第二接点22上的第一金属丝线40的一部分，在第一金属丝线40上形成凸起52。由此，能够对第一金属丝线40与第二接点22的接合部进行补强。第一接合的位置(例如第二接点22的位置)比第二接合的位置(例如内部引出脚36的位置)要低，这同与此相反的情况相比，能够使第二金属丝线50弯曲的高度降低。可以使半导体装置变薄。在第二接点22上，由于没有形成从第一金属丝线40的凸起42上升起的部分，所以即使是在第一金属丝线40上进行第二金属丝线50的接合，通过第一金属丝线40的倒下，能够防止与其它金属丝线之间的短路。
作为引线接合法工序的变形例，如图6(A)～6(C)所示，可以在第二接点22上设置凸起80，通过凸起80对第二金属丝线50进行第二接合。希望凸起80能够与第一金属丝线40是同一材料，例如可以使用金。凸起80，可以由图中未显示的金属丝线的前端部形成球，将金属丝线引向距离前端部近的部分，在第二接点22上残留球而形成。其后，为了使其界面平坦，可以对凸起80实行水平处理。
或者，凸起80也可以由电解电镀或无电解电镀所形成。在这种情况下，例如，在半导体晶片的状态下，也可以一起形成凸起80。希望凸起80的表面层能够由与第一金属丝线40相同的材料(例如金)所构成。如果由电解电镀或无电解电镀形成凸起80，由于容易形成凸起80平坦的上面，所以能够确保第一金属丝线40与凸起80的接合。而且，由于在第二接点22上覆盖了凸起80(例如金)，所以即使是第一金属丝线(例如金线)40的引线接合的位置有若干偏离，也能够进行压接接合。
如图6(B)所示，在第二金属丝线50中，也可以对内部引出脚36实行第一接合，而对第二接点22实行第二接合。在第一及第二金属丝线40、50重叠接合的情况下，如在凸起80上接合在第一及第二金属丝线40、50。在这种情况下，图6(C)所示，第一及第二金属丝线40、50可以不形成球，而接合在凸起80上。
还有，引线接合法工序并不限于这样的例子，上述全部的结构都能够适用。
引线接合工序结束后，实行造型工序。详细说来，在模子用模具中，设置装载有第一及第二半导体芯片10、20的芯片座30。模具由上模具与下模具所构成。上模具与下模具分别各自形成凹部，由二者的凹部形成模具的腔体。在腔体内注入密封材料(例如热固性树脂)，将第一及第二半导体芯片10、20，第一及第二金属丝线40、50，以及内部引出脚36密封。
其后，实行屏障棒(dam bar)切割工序、外部引出脚的电镀工序、以及成形工序。进而。还有印标记工序与检测工序，经过以上的工序，完成半导体装置的制造。
本实施例中的半导体装置，包含由上述方法制造的结构。关于这种半导体装置制造方法的效果，已经在前面做了说明。
(实施例2)
图7表示了实施例2中的半导体装置。在本实施例中，第一接点12与引出脚34(详细讲是内部引出脚36)通过第二金属丝线150而电连接。详细地讲，是第二金属丝线150的一个端部与第一接点12相连接，而另一端部则与引出脚34相连接。在这种情况下，还可以第一接点12上设置凸起152，凸起152可以是由在第二金属丝线150的前端部形成的球经压溃而形成。
根据本实施例，除了第一接点12之外，第一及第二金属丝线40、150在第一半导体芯片10的平面视图上不重叠。所以，能够防止第一及第二金属丝线40、150的短路。
如图7所示，第一及第二金属丝线40、150也可以在第一接点12上重叠接合。在这种情况下，可以在第一金属丝线40上重叠第二金属丝线150，也可以在第二金属丝线150上重叠第一金属丝线40。
还有，半导体装置及其制造方法中其它的结构与效果，在实施例1中说明的内容都可以适用。
(实施例3)
图8表示了实施例3中的半导体装置。在本实施例中，三个半导体芯片200、210、220叠放在芯片座30上。在这种情况下，上述实施例中说明的第一及第二半导体芯片，是指三个半导体芯片200、210、220中的任意两个。在图8中，最上层的半导体芯片220的接点与中间层的半导体芯片210的接点之间，通过金属丝线232而电连接。在这种情况下，中间层的半导体芯片210作为第一半导体芯片、最上层的半导体芯片220作为第二半导体芯片、金属丝线232作为第二金属丝线，能够在最大可能的限度范围内利用上述实施例中说明的内容。还有，中间层的半导体芯片210的接点与最下层的半导体芯片200的接点之间，通过金属丝线234而电连接。
图9是表示安装了适用于本发明的半导体装置的线路基板的图。线路基板1000例如一般可采用玻璃环氧树脂板等有机系列的基板。线路基板1000中，例如可以形成由铜等构成的布线模式1100以构成所希望的线路，布线模式1100与半导体装置1的外部引出脚38相连接。而且，在线路基板1000中，设置有散热构件(heat spreader)1200，散热构件1200与半导体装置1的芯片座30的露出面相接合。这样，第一及第二半导体芯片10、20所产生的热，就能够通过芯片座30由散热构件1200而散出。
这里，关于具有适用于本发明的半导体装置的电子机器，图10中给出了笔记本电脑2000、图11中给出了携带电话3000。
本发明并不限于上述实施例，可以进行种种的变形。例如，本发明包含实施例中说明的结构与实质上相同的结构(例如，功能、方法及结果相同的结构，或者是目的与结果相同的结构)。而且，本发明还包含与实施例中说明的结构具有同样作用及效果的结构，或者能够达到同一目的的结构。而且，本发明还包含在实施例中说明的结构上添加已有技术的结构。

Claims (20)

1.一种半导体装置，包括：
芯片座；
在所述芯片座的一个面上叠放的多个半导体芯片；
向所述芯片座延伸的引出脚；
接合在所述多个半导体芯片中的第一半导体芯片的第一接点、及所述多个半导体芯片中的第二半导体芯片的第二接点上的第一金属丝线；
接合在所述引出脚及所述第二接点上的第二金属丝线；以及将所述多个半导体芯片密封，并使所述芯片座的另一个面露出的密封材料，
所述第二半导体芯片装载在所述第一半导体芯片之上。
2.根据权利要求1所述的半导体装置，其特征在于：所述第二金属丝线通过所述第一金属丝线的上方而引出。
3.根据权利要求1或2所述的半导体装置，其特征在于：使所述第二金属丝线与所述第一金属丝线形成交叉地引出。
4.根据权利要求1所述的半导体装置，其特征在于：所述第二金属丝线在所述第二接点上与所述第一金属丝线相重叠地接合。
5.根据权利要求4所述的半导体装置，其特征在于：所述第二金属丝线具有形成在前端部的球，
所述球压接在所述第一金属丝线上。
6.根据权利要求1所述的半导体装置，其特征在于：所述第二金属丝线，避开所述第一金属丝线的接合部地接合在接合有所述第一金属丝线的所述第二接点上。
7.根据权利要求1所述的半导体装置，其特征在于：所述第二半导体芯片具有多个所述第二接点，
所述多个第二接点具有通过布线电连接的一组接点，
所述第一金属丝线与所述一组接点中的一个接点相接合，
所述第二金属丝线与所述一组接点中的另一个接点相接合。
8.根据权利要求1所述的半导体装置，其特征在于：在所述第二接点上设置有凸起，
所述第一及第二金属丝线通过所述凸起与所述第二接点相接合。
9.根据权利要求1所述的半导体装置，其特征在于：所述第一半导体芯片为存储器，所述第二半导体芯片为微处理器。
10.一种电路基板，其特征在于：安装有权利要求1所述的半导体装置。
11.一种电子机器，其特征在于：具有权利要求1所述的半导体装置。
12.一种半导体装置的制造方法，包括：
将多个半导体芯片叠放在芯片座一侧的面上的工序a；
将第一金属丝线接合在所述多个半导体芯片中的第一半导体芯片的第一接点、及所述多个半导体芯片中的第二半导体芯片的第二接点上的工序b；
将第二金属丝线接合在向所述芯片座延伸的引出脚及所述第二接点上的工序c；以及
将所述多个半导体芯片密封，并使所述芯片座的另一个面露出的工序d，
在所述工序a中，将所述第二半导体芯片装载在所述第一半导体芯片之上。
13.根据权利要求12所述的半导体装置的制造方法，其特征在于：
在所述工序c中，将所述第二金属丝线通过所述第一金属丝线的上方引出。
14.根据权利要求12或13所述的半导体装置的制造方法，其特征在于：
在所述工序c中，将所述第二金属丝线与所述第一金属丝线形成交叉地引出。
15.根据权利要求12所述的半导体装置的制造方法，其特征在于：
在所述工序c中，将所述第二金属丝线在所述第二接点上与所述第一金属丝线相重叠地接合。
16.根据权利要求15所述的半导体装置的制造方法，其特征在于：
在所述工序c中，在所述第二金属丝线的前端部形成球，并将所述球压接在所述第一金属丝线上。
17.根据权利要求15所述的半导体装置的制造方法，其特征在于：
在所述工序b及c中，不形成球地将所述第一及第二金属丝线的前端部，与所述第二接点相接合。
18.根据权利要求12所述的半导体装置的制造方法，其特征在于：
在所述工序c中，将所述第二金属丝线，避开所述第一金属丝线的接合部地接合在接合有所述第一金属丝线的所述第二接点上。
19.根据权利要求12所述的半导体装置的制造方法，其特征在于：
所述第二半导体芯片具有多个第二接点，
所述多个第二接点具有通过布线电连接的一组接点，
在所述工序b中，将所述第一金属丝线与所述一组接点中的一个接点相接合，
在所述工序c中，将所述第二金属丝线与所述一组接点中的另一个接点相接合。
20.根据权利要求12所述的半导体装置的制造方法，其特征在于：
在所述工序b及c中，在所述第二接点上设置凸起，将所述第一及第二金属丝线通过所述凸起与所述第二接点相接合。
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