CN1577617A - 磁存储装置与磁基片 - Google Patents
磁存储装置与磁基片 Download PDFInfo
- Publication number
- CN1577617A CN1577617A CNA2004100642989A CN200410064298A CN1577617A CN 1577617 A CN1577617 A CN 1577617A CN A2004100642989 A CNA2004100642989 A CN A2004100642989A CN 200410064298 A CN200410064298 A CN 200410064298A CN 1577617 A CN1577617 A CN 1577617A
- Authority
- CN
- China
- Prior art keywords
- mram
- cell array
- memory cell
- bit line
- word line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01021—Scandium [Sc]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Physics & Mathematics (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Thin Magnetic Films (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001029426A JP4818519B2 (ja) | 2001-02-06 | 2001-02-06 | 磁気記憶装置 |
| JP29426/2001 | 2001-02-06 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011424982A Division CN1193374C (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1577617A true CN1577617A (zh) | 2005-02-09 |
Family
ID=18893780
Family Applications (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100643002A Expired - Fee Related CN100458968C (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置 |
| CNA2004100642993A Pending CN1577618A (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
| CNB011424982A Expired - Fee Related CN1193374C (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
| CNA2004100642989A Pending CN1577617A (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
Family Applications Before (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100643002A Expired - Fee Related CN100458968C (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置 |
| CNA2004100642993A Pending CN1577618A (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
| CNB011424982A Expired - Fee Related CN1193374C (zh) | 2001-02-06 | 2001-11-30 | 磁存储装置与磁基片 |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US6567299B2 (enExample) |
| JP (1) | JP4818519B2 (enExample) |
| KR (1) | KR100448428B1 (enExample) |
| CN (4) | CN100458968C (enExample) |
| DE (1) | DE10164283A1 (enExample) |
| TW (1) | TW548656B (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102054524A (zh) * | 2009-10-27 | 2011-05-11 | 索尼公司 | 信息存储元件及其驱动方法 |
| CN102347074A (zh) * | 2010-07-21 | 2012-02-08 | 索尼公司 | 可变电阻存储器件和其驱动方法 |
| CN109314181A (zh) * | 2016-06-20 | 2019-02-05 | 国立大学法人东北大学 | 隧道磁阻元件及其制备方法 |
Families Citing this family (129)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4780878B2 (ja) * | 2001-08-02 | 2011-09-28 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| JP4780874B2 (ja) * | 2001-09-04 | 2011-09-28 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| JP2003124538A (ja) * | 2001-10-16 | 2003-04-25 | Sony Corp | 情報記憶装置およびその情報記憶装置を実装した電子機器 |
| KR100641667B1 (ko) * | 2001-10-31 | 2006-11-08 | 인터내셔널 비지네스 머신즈 코포레이션 | 반도체 장치 및 그 제조 방법 |
| US6876567B2 (en) * | 2001-12-21 | 2005-04-05 | Intel Corporation | Ferroelectric memory device and method of reading a ferroelectric memory |
| US6781578B2 (en) * | 2002-01-02 | 2004-08-24 | Hewlett-Packard Development Company, L.P. | Stylus based input devices utilizing a magnetic random access momory array |
| US6798404B2 (en) * | 2002-01-02 | 2004-09-28 | Hewlett-Packard Development Company, L.P. | Integrated digitizing tablet and display apparatus and method of operation |
| JP2003272389A (ja) * | 2002-03-20 | 2003-09-26 | Sony Corp | データ記憶回路及び同データ記憶回路におけるデータ書込み方法及びデータ記憶装置 |
| DE10218785A1 (de) * | 2002-04-26 | 2003-11-13 | Infineon Technologies Ag | Halbleiterspeichereinrichtung und Betriebsverfahren für eine Halbleiterspeichereinrichtung |
| US6801450B2 (en) * | 2002-05-22 | 2004-10-05 | Hewlett-Packard Development Company, L.P. | Memory cell isolation |
| US6885576B2 (en) * | 2002-08-13 | 2005-04-26 | Micron Technology, Inc. | Closed flux magnetic memory |
| JP4219134B2 (ja) * | 2002-09-03 | 2009-02-04 | 株式会社ルネサステクノロジ | 薄膜磁性体記憶装置 |
| JP4063035B2 (ja) | 2002-10-08 | 2008-03-19 | ソニー株式会社 | 強磁性トンネル接合素子を用いた磁気記憶装置 |
| US7002249B2 (en) * | 2002-11-12 | 2006-02-21 | Primarion, Inc. | Microelectronic component with reduced parasitic inductance and method of fabricating |
| JP2004179483A (ja) * | 2002-11-28 | 2004-06-24 | Hitachi Ltd | 不揮発性磁気メモリ |
| KR100506932B1 (ko) * | 2002-12-10 | 2005-08-09 | 삼성전자주식회사 | 기준 셀들을 갖는 자기 램 소자 및 그 구조체 |
| JP3987924B2 (ja) | 2002-12-13 | 2007-10-10 | 国立大学法人大阪大学 | 磁性メモリアレイ、磁性メモリアレイの書き込み方法及び磁性メモリアレイの読み出し方法 |
| JP4096302B2 (ja) * | 2002-12-16 | 2008-06-04 | ソニー株式会社 | 磁気メモリ装置 |
| US7660181B2 (en) * | 2002-12-19 | 2010-02-09 | Sandisk 3D Llc | Method of making non-volatile memory cell with embedded antifuse |
| US8008700B2 (en) * | 2002-12-19 | 2011-08-30 | Sandisk 3D Llc | Non-volatile memory cell with embedded antifuse |
| US7800932B2 (en) * | 2005-09-28 | 2010-09-21 | Sandisk 3D Llc | Memory cell comprising switchable semiconductor memory element with trimmable resistance |
| US6946882B2 (en) * | 2002-12-20 | 2005-09-20 | Infineon Technologies Ag | Current sense amplifier |
| US7433253B2 (en) * | 2002-12-20 | 2008-10-07 | Qimonda Ag | Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module |
| US7251178B2 (en) * | 2004-09-07 | 2007-07-31 | Infineon Technologies Ag | Current sense amplifier |
| JP2004207364A (ja) | 2002-12-24 | 2004-07-22 | Toshiba Corp | 半導体装置及びその半導体装置のデータ書き込み方法 |
| US6818549B2 (en) * | 2003-03-05 | 2004-11-16 | Hewlett-Packard Development Company, L.P. | Buried magnetic tunnel-junction memory cell and methods |
| JP2004363527A (ja) * | 2003-04-11 | 2004-12-24 | Toshiba Corp | 磁気記憶装置、データ複写装置、データ複写システム、データ複写プログラム、及びデータ複写方法 |
| KR100542743B1 (ko) | 2003-04-22 | 2006-01-11 | 삼성전자주식회사 | 자기 랜덤 엑세스 메모리 |
| US6888771B2 (en) * | 2003-05-09 | 2005-05-03 | Micron Technology, Inc. | Skewed sense AMP for variable resistance memory sensing |
| JP4835974B2 (ja) * | 2003-06-20 | 2011-12-14 | 日本電気株式会社 | 磁気ランダムアクセスメモリ |
| US6937509B2 (en) * | 2003-09-08 | 2005-08-30 | Hewlett-Packard Development Company, L.P. | Data storage device and method of forming the same |
| JP2005108304A (ja) | 2003-09-29 | 2005-04-21 | Toshiba Corp | 半導体記憶装置及びその制御方法 |
| KR100615089B1 (ko) * | 2004-07-14 | 2006-08-23 | 삼성전자주식회사 | 낮은 구동 전류를 갖는 자기 램 |
| US6982902B2 (en) * | 2003-10-03 | 2006-01-03 | Infineon Technologies Ag | MRAM array having a segmented bit line |
| US7611911B2 (en) * | 2003-10-08 | 2009-11-03 | International Business Machines Corporation | Method and system for patterning of magnetic thin films using gaseous transformation to transform a magnetic portion to a non-magnetic portion |
| US7166881B2 (en) * | 2003-10-13 | 2007-01-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-sensing level MRAM structures |
| JP4533701B2 (ja) * | 2004-08-25 | 2010-09-01 | 株式会社東芝 | 磁気メモリ |
| US20050141148A1 (en) | 2003-12-02 | 2005-06-30 | Kabushiki Kaisha Toshiba | Magnetic memory |
| WO2005086170A1 (ja) * | 2004-03-05 | 2005-09-15 | Nec Corporation | トグル型磁気ランダムアクセスメモリ |
| US6946698B1 (en) | 2004-04-02 | 2005-09-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | MRAM device having low-k inter-metal dielectric |
| JP4553620B2 (ja) * | 2004-04-06 | 2010-09-29 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| US7099176B2 (en) * | 2004-04-19 | 2006-08-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Non-orthogonal write line structure in MRAM |
| JP4415745B2 (ja) * | 2004-04-22 | 2010-02-17 | ソニー株式会社 | 固体メモリ装置 |
| US7265053B2 (en) * | 2004-04-26 | 2007-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Trench photolithography rework for removal of photoresist residue |
| US7532203B2 (en) * | 2004-04-26 | 2009-05-12 | Samsung Electronic Co., Ltd. | Data input device that utilizes a layer of magnetic particles to store non-volatile input data that is magnetically coupled to an underlying MRAM array |
| JP2005317739A (ja) * | 2004-04-28 | 2005-11-10 | Toshiba Corp | 磁気記憶装置およびその製造方法 |
| US20060039183A1 (en) * | 2004-05-21 | 2006-02-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-sensing level MRAM structures |
| US7372116B2 (en) * | 2004-06-16 | 2008-05-13 | Hitachi Global Storage Technologies Netherlands B.V. | Heat assisted switching in an MRAM cell utilizing the antiferromagnetic to ferromagnetic transition in FeRh |
| FR2871921A1 (fr) * | 2004-06-16 | 2005-12-23 | St Microelectronics Sa | Architecture de memoire a lignes d'ecriture segmentees |
| US7221584B2 (en) * | 2004-08-13 | 2007-05-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | MRAM cell having shared configuration |
| US7337270B2 (en) * | 2004-09-10 | 2008-02-26 | Wistron Corporation | Apparatus, system, and method for servicing a data storage device using work-in-process (WIP) maps |
| US7355884B2 (en) | 2004-10-08 | 2008-04-08 | Kabushiki Kaisha Toshiba | Magnetoresistive element |
| JP2006135292A (ja) * | 2004-10-08 | 2006-05-25 | Toshiba Corp | 磁気抵抗効果素子 |
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2001
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- 2001-09-17 KR KR10-2001-0057198A patent/KR100448428B1/ko not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102054524A (zh) * | 2009-10-27 | 2011-05-11 | 索尼公司 | 信息存储元件及其驱动方法 |
| CN102054524B (zh) * | 2009-10-27 | 2014-03-12 | 索尼公司 | 信息存储元件及其驱动方法 |
| CN102347074A (zh) * | 2010-07-21 | 2012-02-08 | 索尼公司 | 可变电阻存储器件和其驱动方法 |
| CN109314181A (zh) * | 2016-06-20 | 2019-02-05 | 国立大学法人东北大学 | 隧道磁阻元件及其制备方法 |
| CN109314181B (zh) * | 2016-06-20 | 2022-09-30 | 国立大学法人东北大学 | 隧道磁阻元件及其制备方法 |
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| CN100458968C (zh) | 2009-02-04 |
| US20030210591A1 (en) | 2003-11-13 |
| US6741495B2 (en) | 2004-05-25 |
| US20040174756A1 (en) | 2004-09-09 |
| DE10164283A1 (de) | 2002-08-29 |
| US6567299B2 (en) | 2003-05-20 |
| CN1368735A (zh) | 2002-09-11 |
| KR20020065323A (ko) | 2002-08-13 |
| CN1577618A (zh) | 2005-02-09 |
| US6950369B2 (en) | 2005-09-27 |
| US20020145902A1 (en) | 2002-10-10 |
| CN1577619A (zh) | 2005-02-09 |
| TW548656B (en) | 2003-08-21 |
| JP2002231904A (ja) | 2002-08-16 |
| KR100448428B1 (ko) | 2004-09-13 |
| CN1193374C (zh) | 2005-03-16 |
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