WO2006046510A1 - 多層プリント配線板及び多層プリント配線板の製造方法 - Google Patents
多層プリント配線板及び多層プリント配線板の製造方法 Download PDFInfo
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- WO2006046510A1 WO2006046510A1 PCT/JP2005/019499 JP2005019499W WO2006046510A1 WO 2006046510 A1 WO2006046510 A1 WO 2006046510A1 JP 2005019499 W JP2005019499 W JP 2005019499W WO 2006046510 A1 WO2006046510 A1 WO 2006046510A1
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- layer
- corrosion
- solder
- resistant layer
- printed wiring
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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- H05K1/114—Pad being close to via, but not surrounding the via
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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- H05K2201/0388—Other aspects of conductors
- H05K2201/0391—Using different types of conductors
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
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- H05K3/28—Applying non-metallic protective coatings
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- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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Definitions
- Multilayer printed wiring board and method for manufacturing multilayer printed wiring board are Multilayer printed wiring board and method for manufacturing multilayer printed wiring board
- the present invention relates to a multilayer printed wiring board in which electronic components, semiconductor elements, and the like are mounted on a surface layer of a substrate, and a method for manufacturing the same.
- the present invention relates to a multilayer printed wiring board suitably used for a mobile phone, a portable electronic device, a package, and the like, and a manufacturing method thereof.
- a one-unit circuit board is formed by opening a via hole in a hard insulating base material having a conductor circuit on at least one side with a laser and applying a conductor layer to the opening with a metal paste or plating.
- a multilayer circuit board (multilayer printed wiring board) can be obtained by preparing two or more layers of this circuit board and thermocompression-bonding these boards sequentially or collectively. At that time, the via hole or via hole land of one circuit board and the conductor circuit or land of the other circuit board are connected, so that the electrical connection of the two-layer circuit board is made. In other areas where electrical connection is not performed, the circuit boards are brought into close contact with each other by an adhesive layer made of a thermosetting resin or a pre-preda. Examples of these conventional techniques include JP-A-10-13028.
- a solder resist layer for protecting a conductor circuit was formed on the surface layer of these substrates or a general printed wiring board, and a solder pad having a part of the solder resist layer opened was formed. The opening force conductor circuit is exposed, and a corrosion-resistant layer of gold, nickel gold, or the like is formed on the surface layer. All solder pads are provided with a corrosion-resistant layer, and solder is formed on the conductor circuit on which the corrosion-resistant layer is applied, and electronic components and the like are mounted.
- Patent Document 1 JP-A-10-13028
- the mounting density can be increased, it is also required to ensure reliability. Among them, improvement of reliability especially for drop test is desired. In other words, even if a product (all parts, liquid crystal, etc. are mounted and shown in a case) or a printed wiring board is dropped from a certain height, the function and startability of the board will not be reduced. Therefore, it is required to make it difficult for parts to fall off.
- the substrate manufactured by the conventional method it is difficult to maintain the function and startability of the substrate with respect to the drop test in the reliability test.
- the board manufactured by the conventional method has been unable to reduce the frequency of parts falling off.
- the present invention has been made to solve the above-described problems, and an object of the present invention is to ensure reliability and ensure electrical connectivity and functionality.
- a conductor circuit is formed on the surface layer, a solder resist layer covering the conductor circuit is applied, and a plurality of openings of the solder resist exposing a part of the conductor circuit are provided.
- a multilayer printed wiring board in which a plurality of solder pads are formed and a corrosion-resistant layer is formed on the surface of the conductor circuit!
- the solder pad is technically characterized by a mixture of a corrosion-resistant layer-formed solder pad with a corrosion-resistant layer and a corrosion-resistant layer-unformed solder pad without a corrosion-resistant layer.
- an interlayer connection is formed by a via hole, and a conductor layer is filled in the via hole, and at least two or more layers are laminated, and a solder resist layer is applied to a surface layer, and a part of the conductor circuit is exposed.
- a multilayer printed wiring board in which a plurality of solder pads are formed by a plurality of openings, and a corrosion-resistant layer is formed on the surface layer of the conductor circuit,
- the solder pad is technically characterized by a mixture of a corrosion-resistant layer-formed solder pad with a corrosion-resistant layer and a corrosion-resistant layer-unformed solder pad without a corrosion-resistant layer.
- a multilayer printed wiring board in which a portion where the corrosion-resistant layer is formed and a portion where the corrosion-resistant layer is not formed is mixed is a conventional surface layer.
- the substrate expands and contracts due to the temperature when mounting IC chips, etc., under heat cycle conditions, or at high temperatures and humidity.
- the surface of the substrate is in the same state, so that the generated stress is easily transmitted due to expansion and contraction.
- the stress caused by heat or the like is buffered, so that it is difficult for warpage to occur as a multilayer printed wiring board, and the flatness of the substrate surface is ensured. For this reason, it is easy to obtain connectivity with the IC chip and connectivity with the external substrate in the packaging substrate where the IC chip is mounted as a bare chip. Furthermore, it is easy to obtain connectivity between an IC chip and an electronic component, especially on a mixed packaging substrate that has electronic components such as capacitors mounted on the surface layer in addition to the IC chip.
- the portion that is formed by the formation of the corrosion-resistant layer ensures the rigidity of the substrate as compared with the portion that is formed by the formation of the corrosion-resistant layer. Since the rigidity is secured, it is possible to suppress the warpage of the printed circuit board and other problems with the printed wiring board.Even if components are mounted, poor contact between the conductor part of the solder pad and the external terminals of the component, etc. It is hard to cause.
- the mounted parts are placed on a rigid corrosion-resistant layer, so it is stable.
- operation parts such as keypads are in contact with the land portion where the corrosion-resistant layer is formed.
- the portion where the corrosion-resistant layer is not formed is more flexible than the portion where the corrosion-resistant layer is formed. Since it has flexibility, the stress generated by expansion and contraction is buffered, and defects such as cracks in the conductor circuit, solder, or insulating layer are more reliable than conventional printed wiring boards. Further, even when subjected to an impact from an external force, the portion where the corrosion-resistant layer is not formed can be buffered against the impact. For this reason, the mounted parts are not easily affected by the impact, and problems such as part dropout are less likely to occur.
- the printed board is subject to thermal expansion and contraction (for example, when the temperature rises, it expands and returns from high temperature to room temperature. Therefore, in the portion where the corrosion-resistant layer is not formed, defects such as cracks in the conductor circuit and the insulating layer are less likely to occur compared to the portion where the corrosion-resistant layer is formed. In particular, it is difficult to cause defects such as cracks in the solder layer. With the expansion and contraction, the generated stress is buffered, It is estimated that the generated stress is less likely to be concentrated locally, and that it is difficult to cause defects such as cracks. The same tendency was observed in the size of the printed board (meaning vertical and horizontal sizes), thickness, number of layers, and materials.
- the area of the portion where the corrosion-resistant layer is formed be larger than the area of the portion where the corrosion-resistant layer is not formed. This is because it is easier to increase the rigidity of the substrate itself by increasing the area of the portion where the corrosion-resistant layer is formed!
- the corrosion-resistant layer is formed by forming one or more kinds of metals selected from noble metals such as gold, silver, and platinum in one or more layers, and by laminating a combination of noble metals and other metals 1 It refers to something above the layer.
- noble metals such as gold, silver, and platinum
- Specific examples include nickel gold, nickel silver, nickel platinum, gold (single layer), silver (single layer), nickel palladium gold, nickel-palladium mono-silver, and the like.
- the conductor circuit from which the solder pad portion force is also exposed is a circuit having various shapes such as a flat circuit, a circuit having a recess, a circuit having a protrusion, and a circuit having a rough surface layer. Also good.
- These substrates can be applied to various types of printed wiring boards such as printed wiring boards that perform interlayer connection through via holes, substrates manufactured by a subtractive method, and substrates manufactured by an additive method. Is possible. Other than this, it can also be applied to substrates manufactured through the conformal method.
- solder pads are used to recognize dummy conductor layers, alignment marks, and products that are not electrically connected only through the exposed conductor circuit from the opening of the solder resist layer. Also included are conductor layers formed on the switch and terminal conductor layers for switches. It is desirable that the solder pad provided with the corrosion resistant layer is mainly an external terminal.
- the corrosion-resistant layer is formed in the portion where the corrosion-resistant layer is formed, and the rigidity of the substrate is increased as compared with the portion. Since the rigidity is increased, defects in the printed wiring board such as board warping can be suppressed, and even if external terminals are mounted, poor contact and unconnected connections between the solder pad conductors and external terminals such as parts can be avoided. Hard to cause. In addition, since the external terminals are arranged on the pads on which the corrosion-resistant layer is formed, the installation itself is stabilized.
- the strength is increased by repeated contact with the solder pad on which the corrosion-resistant layer is formed, and the rigidity of the pad portion. ing. In addition, repeated contact is unlikely to cause poor contact.
- solder pads not provided with the corrosion-resistant layer are mainly terminals for mounting electronic components.
- the solder pad portion where the corrosion resistant layer is not formed is more flexible than the portion where the corrosion resistant layer is formed.
- the portion where the corrosion-resistant layer is not formed has flexibility, so that the impact can be buffered.
- the connectivity of the components is ensured, so that the electrical connectivity and functionality as a product do not deteriorate, and the reliability is lower than that of a conventional printed wiring board.
- the electronic components used for the electronic component mounting terminals include active components such as semiconductors, and general passive components such as capacitors, resistors, and inductors.
- the solder pad provided with the corrosion-resistant layer is preferably a connection pad for connecting the IC chip mainly by a bare chip.
- wire bonding pads and solder pads for connecting flip-chip IC chips are desirable U ,.
- connection pad with the IC chip having a corrosion-resistant layer applied to the connection area of the IC chip is formed.
- the rigidity of the substrate is increased. Since the rigidity is increased, it is possible to suppress the warpage of the printed wiring board and other problems on the printed wiring board.Even when components are mounted, contact failure between the conductor part of the solder pad and the external terminals of the component, etc. may be caused. hard.
- solder pads not provided with the corrosion-resistant layer are mainly terminals for mounting electronic components.
- the portion where the corrosion-resistant layer is not formed is more flexible than the portion where the corrosion-resistant layer is formed. Because it has flexibility, the stress generated by expansion and contraction is buffered, and defects such as cracks in the conductor circuit or insulating layer ensure long-term reliability compared to conventional printed wiring boards. Further, even when an impact from an external force is received, the portion where the corrosion-resistant layer is not formed can be buffered against the impact. For this reason, the mounted components are not easily affected by the impact, and problems such as component dropping are less likely to occur.
- solder pad for connecting an IC chip and a solder pad for connecting an electronic component are formed on the same surface layer, the solder pad for connecting an IC chip is used. It is desirable that a corrosion-resistant layer is formed on the solder pads for connecting electronic components, and no corrosion-resistant layer is formed. As a result, compared to the conventional package substrate, if the warpage of the substrate is suppressed, the influence on the impact of external force can be buffered. For this reason, connection with IC chips and electronic components mounted on the surface of the package substrate is secured, making it difficult to reduce connectivity and reliability.
- an external terminal for example, a PGA pin
- stress such as thermal stress at the time of external terminal placement is buffered, and the occurrence of defects such as cracks in conductive materials such as solder for connection can be suppressed. Can be obtained. Also
- the external terminals in the present application may be arranged on the same surface as the IC chip to be mounted, or may be arranged on the opposite surface of the IC chip.
- the corrosion-resistant layer is formed on the surface of the region where the corrosion-resistant layer is formed and the opposite surface, even though the region where the corrosion-resistant layer is formed and the region where the corrosion-resistant layer is not formed are arranged on the same surface.
- An area that is not used may be arranged. Further, depending on the case, a mixture of these may be used.
- a metaphysis layer is provided, and an OSP (Organic Solderability Preservative: preflux) layer is provided on the solder pad.
- OSP Organic Solderability Preservative: preflux
- a coating layer other than the OSP layer may be applied.
- a layer mainly composed of an imidazole compound for example, alkylbenzimidazole, benzimidazole, etc.
- metal ions for example, copper ions, silver ions, nickel, etc.
- organic acids may be contained.
- An organic film is applied on the copper circuit exposed from the solder pad by immersing the printed wiring board in which the solder pad is exposed in this solution between room temperature and heating temperature (for example, 80 ° C.). This organic coating can ensure solderability.
- an organic film can be formed on the conductor and can be applied as long as it is removed during heating.
- a solder resist layer that covers the conductor circuit of the surface layer is applied, and a plurality of solder pads are formed by a plurality of openings of the solder resist that expose a part of the conductor circuit.
- a technical feature is a method for producing a multilayer printed wiring board through the steps (a) to (e).
- a multilayer printed wiring board is manufactured in which a portion where the corrosion-resistant layer is formed and a portion where the corrosion-resistant layer is not formed are mixed in the exposed conductor layer portion of the printed wiring board. it can. According to the printed wiring board obtained by the manufacturing method of the present application, reliability is easily obtained as compared with the conventional multilayer printed wiring board in which the corrosion-resistant layer is formed on all the conductor portions exposed on the surface layer.
- the solder pad covered with the mask layer is mainly an electronic component mounting pad or an external terminal connection pad.
- solder pad portion where the corrosion-resistant layer is not formed and where the corrosion-resistant layer is not formed By covering with a mask layer, it is possible to form a solder pad portion where the corrosion-resistant layer is not formed and where the corrosion-resistant layer is not formed.
- the solder pad portion where the corrosion resistant layer is not formed is more flexible than the portion where the corrosion resistant layer is formed. When subjected to an impact from an external force, the portion where the corrosion-resistant layer is not formed has flexibility, so that the impact can be buffered.
- a solder pad without a corrosion-resistant layer as an electronic component mounting terminal, it is difficult to cause a drop between the conductive circuit exposed from the solder pad and the electronic component when an impact is applied from the outside.
- the mask layer can cover the solder pad not provided with the corrosion-resistant layer through exposure / development or laser opening. That is, in the surface layer of the substrate to which the solder resist layer is applied, a mask layer forming portion and a non-forming portion are formed on the mask layer, and a plating film is applied to the non-forming portion of the mask layer.
- the mask layer is formed by applying a resin whose viscosity has been adjusted in advance or applying it in the form of a dry film. Thereafter, a mask layer is formed in a region where the corrosion-resistant layer is not formed, and a corrosion-resistant layer is not formed on the solder pad portion below the mask layer. In other solder pad areas, an opening is formed in the mask layer by exposure and development, or an opening is formed in the mask layer by laser. Thereby, a non-formation portion of the mask layer is formed on the solder resist layer, and a corrosion-resistant layer is formed on the solder pad in the non-formation region.
- an OSP layer may be formed on a solder pad not provided with the corrosion-resistant layer.
- OSP Organic Solderability Preservative: preflux
- a multilayer printed wiring board for a knock board can be manufactured by the above manufacturing method.
- a corrosion-resistant layer is formed on a solder pad for mounting a bare chip of an IC chip, and a corrosion-resistant layer is not formed on a solder pad for an electronic component such as a capacitor. They may be applied on the same surface layer.
- a mask layer is mainly applied to solder pads for electronic components. As a result, a corrosion resistant layer is not formed on the corresponding solder pad.
- Solder resist is applied to the printed wiring board on which one side or both sides are electrically connected to the conductor circuit (including lands), the dummy conductor layer, the alignment mark, and the conductor layer formed to recognize the product. Form a layer. If necessary, a blackening treatment or a roughening layer may be formed on the conductor circuit and the conductor layer.
- the printed wiring board refers to various types of printed wiring boards such as a printed wiring board that performs interlayer connection in via holes, a board manufactured by a subtractive method, and a board manufactured by an additive method.
- the solder resist is formed by applying a resin whose viscosity has been adjusted in advance, attaching a film in the form of a dry film, or thermocompression bonding.
- the thickness when the solder resist layer is formed is 10 to 50 m, and the thickness after the solder resist layer is completely cured is 5 to 50 m.
- thermosetting resins, thermoplastic resins, photo-curable resins, thermosetting resins with (meth) acrylic resins, and composites of these resins are used. Among these, it is desirable to use epoxy resin, polyimide resin, phenol resin, polyolefin resin, phenoxy resin, and the like.
- the formed solder resist layer may be dried at about 80 to 100 ° C. as necessary. This causes the solder resist layer to be in a semi-cured (B stage) state.
- the mask on which the solder pads are drawn is placed on the solder resist layer, exposed to ultraviolet rays, and then developed with a chemical solution such as alkali to form the solder pads on the solder resist layer.
- a chemical solution such as alkali
- An opening is provided.
- an opening having a solder pad force is provided in the solder resist layer by a laser.
- a carbon dioxide laser, an excimer laser, a YAG laser, or the like can be used as a laser for providing the opening.
- the pulse energy is 0.5 ⁇ : LOOniJ
- the pulse width is 1 ⁇ : LOO / zs
- the pulse interval is 0.5ms or more
- the frequency is 1000 ⁇ 6000Hz.
- via holes may be formed by abrasion.
- desmear treatment may be performed by chemical treatment with an acid or an oxidizing agent, plasma with oxygen or nitrogen, physical treatment such as corona treatment, or the like.
- the solder pad includes a dummy conductor layer that is not electrically connected only by a conductor circuit (including), an alignment mark, and a conductor layer formed to recognize a product.
- a mask layer is formed on a printed wiring board in which solder pads are formed on the solder resist layer.
- the mask layer is formed by applying a resin whose viscosity has been adjusted in advance, attaching a film in the form of a dry film, or thermocompression bonding.
- the thickness of the mask layer is about 5 to 30 ⁇ m.
- thermosetting resin, thermoplastic resin, photo-curable resin, heat-curable resin partly (meth) acrylated resin, or a composite of these resins can be used. Among them, it is desirable to use epoxy resin, polyimide resin, phenol resin, polyolefin resin, phenoxy resin, and the like.
- the formed mask layer may be dried at about 80 to about LOO ° C as required. Thereby, the mask layer may be in a semi-cured (B stage) state. This B-stage may be pasted as a film. In some cases, direct exposure may be performed.
- the mask on which the solder pad non-formation region is drawn is placed on the mask layer and exposed to ultraviolet rays or the like, and then developed with a chemical solution such as an alkali to develop the corrosion resistance layer on the solder layer on the mask layer.
- a chemical solution such as an alkali to develop the corrosion resistance layer on the solder layer on the mask layer.
- An opening that also has a non-forming region force is provided, or an opening made of an anti-corrosion layer forming region is provided in the solder pad by a laser.
- a mask layer non-formation portion and a mask formation portion are formed on the solder resist.
- a carbon dioxide laser, an excimer laser, a YAG laser, or the like can be used as a laser for providing an opening in the mask layer.
- the pulse energy is 0.5 ⁇ : LOOniJ
- the pulse width is 1 ⁇ : LOO / zs
- the pulse interval is 0.5ms or more
- the frequency is 1000 ⁇ 6000Hz.
- via holes may be formed by abrasion.
- the desmear process may be performed by a physical process or the like.
- a corrosion-resistant layer is formed on the solder pad in the area where the mask layer is not formed.
- a corrosion-resistant layer is formed on the solder resist layer where the mask layer is not formed.
- the corrosion-resistant layer refers to a layer in which one or more kinds of metals selected from gold, silver, platinum and noble metals are formed in one or more layers. Specific examples include nickel gold, nickel silver, nickel-platinum, gold (single layer), silver (single layer) nickel-palladium monogold, nickel-palladium silver, and the like.
- These corrosion-resistant layers are formed by plating (electrolytic plating, electroless plating, substitution plating). Besides this, it may be formed by vapor deposition such as sputtering. These single layers or a plurality of layers of two or more layers may be used.
- the corrosion resistant layer is applied to the solder pad corresponding to the non-formation portion of the mask layer.
- the mask layer is peeled off with a chemical solution such as alkali to obtain a printed wiring board in which a corrosion-resistant layer-formed solder pad with a corrosion-resistant layer and a corrosion-resistant layer-free solder pad without a corrosion-resistant layer are mixed. Can do.
- an OSP Organic Solder ability Preservative: preflux
- OSP Organic Solder ability Preservative: preflux
- solder such as Sn-Pb, Sn-Ag-Cu, etc. was placed on each pad by printing, so that a solder layer was formed in the shape of a solder pad having a conductor circuit (including land) force.
- a printed wiring board is obtained.
- MPU capacitors, resistors and other electronic components, LCDs, digital displays and other display systems, keypads and switches, and other external terminals such as USB and earphones A kind is implemented.
- a solder pad without a corrosion-resistant layer is used as an electronic component mounting terminal, and a solder pad with a corrosion-resistant layer is used for an external terminal.
- the circuit board as a basic unit constituting the multilayer circuit board is a starting material obtained by attaching copper foil 32 on one or both sides of an insulating base material 30. (Fig. 1 (A)).
- the insulating base material is, for example, a glass cloth epoxy resin base material, a glass cloth bismaleimide triazine resin base material, a glass cloth polyphenylene ether resin base material, a aramid non-woven fabric epoxy resin base material.
- Hard laminate substrates selected from aramid nonwovens—polyimide resin base materials can be used, but glass cloth epoxy resin base materials are most preferred.
- the insulating base material preferably has a thickness of 20-600 ⁇ m.
- the reason for this is that when the thickness is less than 20 ⁇ m, the strength decreases and the handling becomes difficult, the reliability with respect to the electrical insulation is lowered, and the formation of via holes may be difficult. Conversely, when the thickness exceeds 600 m, it becomes difficult to form fine via holes, and in some cases, to fill with conductive paste, and the substrate itself becomes thick.
- the thickness of the copper foil is preferably 5 to 18 ⁇ m.
- a direct laser method in which a copper foil and an insulating base material are simultaneously formed, and a conformal method in which a copper foil portion corresponding to the via hole of the copper foil is removed by etching. Yes, either one can be used.
- the via hole forming opening is formed in the insulating base material by using a laser force as described later, and the via hole is deformed at the end face portion of the copper foil. Therefore, it is difficult to form a conductor circuit. Conversely, if the copper foil exceeds 18 m, it is difficult to form a conductor circuit pattern with a fine line width by etching.
- the thickness of the copper foil 32 may be adjusted through half-etching (FIG. 1B). In this case, the copper foil 32 is thicker than the above numerical value (5 to 18 m). Half etching Later, the thickness of the copper foil is adjusted to 5 to 18 / ⁇ ⁇ . Furthermore, in the case of a double-sided copper-clad laminate, the thickness may be different on both sides as long as the copper foil thickness is within the above range. As a result, the strength can be ensured and the subsequent process can be prevented.
- the conductor circuit When the conductor circuit is formed on one side by etching, it can be easily formed.
- the insulating base and the copper foil are, in particular, obtained by laminating a pre-predder in which a glass cloth is impregnated with epoxy resin in a glass cloth and a copper foil, and heating and pressing. It is preferable to use a double-sided copper-clad laminate. The reason is that the position of the wiring pattern and via hole is not shifted during handling after the copper foil is etched, and the position accuracy is excellent.
- This laser carriage is performed by a pulse oscillation type carbon dioxide laser carriage apparatus.
- the additional conditions are as follows: pulse energy of 0.5 to: LOOmJ, pulse width of 1 to: LOO s, and pulse interval of 0.5 ms or more. It is desirable that the number of shots be in the range of 1-50.
- the diameter of the via forming opening 34 that can be formed under such processing conditions is preferably 50 to 250 m.
- a desmear treatment is performed to remove the resin residue remaining on the side and bottom surfaces of the opening formed in the step (2).
- This desmear treatment is performed by wet treatment such as chemical treatment of acid or oxidant (for example, chromic acid, permanganic acid) or dry treatment such as oxygen plasma discharge treatment, corona discharge treatment, ultraviolet laser treatment or excimer laser treatment. Is called.
- acid or oxidant for example, chromic acid, permanganic acid
- dry treatment such as oxygen plasma discharge treatment, corona discharge treatment, ultraviolet laser treatment or excimer laser treatment. Is called.
- These desmear treatment methods are selected according to the amount of smear that is expected to remain depending on the type, thickness, via hole opening diameter, laser conditions, and the like of the insulating base material.
- the electrolytic copper plating process it is deposited on the upper part of the via hole opening of the substrate.
- the raised electrolytic copper plating may be removed by belt sander polishing, puff polishing, etching, or the like for flattening.
- the electroless plating film may be made of a metal such as copper, nickel or silver.
- a resist layer 38 is formed on the electrolytic copper plating film 36 (FIG. 2A).
- the resist layer can be applied either in the form of a coating or in the form of a film.
- a mask on which a circuit is drawn in advance is placed on this resist, exposed and developed to form an etching resist layer, and the metal layer in the portion where no etching resist is formed is etched to include conductor circuits and lands.
- Conductor circuit patterns 44 and 42 are formed (Fig. 2 (B)).
- the etching solution is preferably at least one aqueous solution selected from aqueous solutions such as monohydrogen sulfate, persulfate, cupric chloride, and ferric chloride.
- aqueous solutions such as monohydrogen sulfate, persulfate, cupric chloride, and ferric chloride.
- the entire surface of the copper foil may be etched in advance to adjust the thickness.
- the land as a part of the conductor circuit is preferably formed so that its inner diameter is substantially the same as the via hole diameter, and its outer diameter is in the range of 50 to 250 ⁇ m.
- Single-sided circuit board 30 manufactured according to the steps (1) to (5) described above has a copper foil as a conductor layer on one surface of an insulating base material, and reaches the copper foil from the other surface. It has a via hole in the opening and a unit circuit board. By laminating a plurality of these layers, it is used as a circuit board for forming a multilayer circuit board. At the time of this lamination, all circuit boards may be laminated, and a multilayer circuit board may be formed by batch heating and pressure bonding. In addition, a multilayer circuit board may be formed by sequentially stacking at least one circuit board one by one to make a multilayer. All of these circuit boards may be laminated on a double-sided circuit board, or all of them may be laminated on a single-sided circuit board, or a mixed board of these may be laminated.
- the copper foil of the uppermost single-sided circuit board of the circuit board integrated in (6) above The copper foil of the outermost single-sided circuit board can be etched to form a conductor circuit and a conductor circuit (both including via hole lands).
- a photosensitive dry film resist is applied to the surface of the laminated and pressure-bonded copper foils, respectively, and then exposed and developed along a predetermined circuit pattern to form an etching resist.
- the metal layer in the non-resist formation portion is etched to form a conductor circuit and a conductor circuit including a no hole land.
- solder resist layer 90 is formed on the surface of the outermost circuit board (FIG. 4A).
- the solder resist composition is applied to the entire outer surface of the circuit board, the coating film is dried, and then a photomask film on which the solder pad openings are drawn is placed on the coating film for exposure, By performing development processing, solder pad openings 90a exposing the conductive pad portions positioned immediately above the via holes of the conductor circuit are formed.
- a solder resist layer formed in a dry film may be pasted and an opening may be formed by exposure and development or laser.
- a mask layer 50 a is formed on a solder resist layer 90 on a substrate having solder pads opened by coating or pasting a fine film.
- An exposure mask 50 on which a mask layer forming portion 52a is drawn is placed on the mask layer 50 ⁇ (FIG. 4B), and an unformed portion of the mask layer 50 is formed through exposure and development ( Figure 4 (C)).
- Figure 4 (C) Figure 4 (C)
- a corrosion-resistant layer such as nickel 54-gold 56 is formed on the solder pad 60 exposed from the non-formation portion of the mask layer 20 (FIGS. 5A and 5B).
- the thickness of the nickel layer 54 is preferably 1 to 7 ⁇ m
- the thickness of the gold layer 56 is preferably 0.01 to 0.
- a corrosion-resistant layer such as -keckel palladium-gold, gold (single layer), silver (single layer) may be formed.
- the mask layer 50 is peeled off.
- a corrosion-resistant layer-formed solder pad 60A having a corrosion-resistant layer and a corrosion-resistant layer-unformed solder pad 60B having no corrosion-resistant layer are mixed is obtained (FIG. 5 (C)).
- a portion where a corrosion-resistant layer is formed is mainly used for an external terminal, and the corrosion-resistant layer is formed.
- the non-formed portion is mainly used as an electronic component mounting terminal.
- a portion where a corrosion-resistant layer is formed is mainly used as a terminal for an IC chip mounted on a bare chip. It is mainly used for terminals for mounting electronic components or pads for external terminals where corrosion-resistant layers are not formed.
- solder resist opening force obtained in the above step (8) Solder body is supplied to the solder pad portion exposed directly above the via hole, and the solder bump 96U is melted and solidified. 96D is formed (Fig. 6).
- a conductive ball or a conductive pin is bonded to the pad portion using a conductive adhesive or a solder layer to form a multilayer circuit board.
- components such as capacitors and resistors may be mounted on the formed solder layer.
- external terminals such as a liquid crystal and a keypad are mounted.
- solder transfer method As a method for supplying the solder body and the solder layer, a solder transfer method or a printing method can be used.
- solder transfer method a solder foil is bonded to a pre-preder, and the solder foil is etched leaving only a portion corresponding to the opening, thereby forming a solder pattern to form a solder carrier film.
- the film is laminated so that the solder pattern comes into contact with the pads after the film is coated on the solder resist opening of the substrate, and then transferred.
- the printing method is a method in which a printing mask (metal mask) provided with an opening at a position corresponding to a pad is placed on a substrate, a solder paste is printed, and heat treatment is performed.
- solder for forming such solder bumps SnZAg solder, SnZln solder, SnZZn solder, Sn / Bi solder, and the like can be used.
- knock board if bare chip mounting is performed by flip chip, it is mounted on the same surface as the IC chip or on the opposite surface of the IC chip.
- An external terminal arranged can be obtained.
- the melting point of the solder connected to the IC chip is the melting point of the solder layer connected to the external terminal. It is desirable that the force be lower than the melting point as well. As a result, the connection terminal, It is easy to ensure the connectivity.
- the package substrate if bare chip mounting is performed by wire bonding, the IC chip is mounted, and external terminals are arranged on the same surface as the IC chip or on the opposite surface of the IC chip. Is obtained.
- the present invention can also be applied to a substrate manufactured by a subtra method, a semi-additive method, a fluidic method, or two or more manufacturing methods thereof.
- the substrate is a via hole (non-through hole), but it may be a substrate in which interlayer connection is made through all or part of through holes (through holes) that penetrate all layers of the substrate.
- a double-sided circuit board constituting a multilayer circuit board is manufactured.
- This circuit board uses, as a starting material, a double-sided copper-clad laminate obtained by laminating epoxy resin in glass cloth and making a B-stage pre-preda 30 and copper foil 32 and heat-pressing them. ( Figure 1 (A)).
- the insulating substrate had a thickness of 75 ⁇ m and the copper foil had a thickness of 12 m.
- a copper foil thicker than 12 m may be used as the laminated board, and the thickness of the copper foil may be adjusted to 12 m by etching (Fig. 1 (B)).
- a double-sided circuit board having a copper foil 32 is irradiated with a carbon dioxide laser to form via holes that penetrate the copper foil 32 and the insulating base material 30 and reach the copper foil 32 on the opposite surface.
- An opening 34 was formed (Fig. 1 (C)). Furthermore, the inside of the opening was desmeared by chemical treatment with permanganic acid.
- a high-peak short-pulse oscillation type carbon dioxide laser processing machine manufactured by Hitachi Via Co., Ltd. was used for forming the opening for forming the via hole, and the substrate thickness was 75 ⁇ m.
- a glass cloth epoxy resin base material was directly irradiated with a laser beam on a copper foil to form an opening 34 for forming an 80 m ⁇ via hole at a speed of 100 holes Z seconds.
- Additive A (Reaction accelerator) 10. 0 ml / 1
- Additive A promotes the formation of an electrolytic copper plating film in the via hole, and conversely adheres mainly to the copper foil portion by additive B, thereby suppressing the formation of the plating film.
- additive B is attached, so that formation of a plating film is suppressed as in the copper foil portion. Is done.
- the electrolytic copper plating 36 was filled in the opening 34 to form a via hole 46 in which the via hole portion and the copper foil were flattened (FIG. 1 (D)).
- the thickness of the conductor layer may be adjusted by a physical method of sander belt polishing and puff polishing.
- a photosensitive dry film etching resist 38 was formed on the copper foil 32 and the copper plating 36 of the insulating base material subjected to the above step (3) (FIG. 2 (A)).
- the resist 38 was formed with a thickness of 15 to 20 m, and a resist circuit non-formed portion was formed on the copper foil through a conductor circuit, a land of a no-hole, exposure and development. Etching is performed on the non-formed portion of the resist with an etching solution made of hydrogen peroxide and Z sulfuric acid to remove the copper plating film and the copper foil corresponding to the non-formed portion.
- the circuit board 30 obtained through the steps (1) to (5) is regarded as one unit (FIG. 3 (A)), and an adhesive layer 48 such as a pre-preda is sandwiched between the boards 30. ⁇ 250 ° C, pressure 1.0 ⁇ 5. Okgf / cm 2 was heated and laminated to form multilayered wire board 10 (Fig. 3 (B))
- a solder resist layer was formed on the surface of the circuit board located in the uppermost layer and the lowermost layer of the multilayer substrate 10.
- a solder resist layer formed into a film was formed to a thickness of 20 to 30 ⁇ m on the substrate by applying a film-formed solder resist layer or coating with a varnish whose viscosity was adjusted in advance.
- solder resist layer Before forming the solder resist layer on the surface of the circuit board located on the uppermost layer and the lowermost layer of the multilayer substrate, a roughened layer is provided as necessary.
- a mask layer in the form of a dry film made of a photosensitive resin is formed on the solder resist layer.
- a mask layer was formed to a thickness of 10 to 20 ⁇ m on the solder resist layer by applying a film-formed mask layer or coating with a varnish whose viscosity was adjusted in advance.
- a soda-lime glass base slope 52 having a thickness of 5 mm on which a mask layer non-formation pattern (mask pattern) 52a was drawn was applied to the mask layer 50 a
- the film was exposed to UV light of 800 mjZcm 2 (FIG. 4 (B)) and DMTG developed. Furthermore, heat treatment is performed at 120 ° C for 1 hour, and solder pads in areas where no corrosion-resistant layer is formed 6
- a mask layer (thickness 15 m) 50 is also formed which has a mask layer forming portion covered with OB and a non-forming force of the mask layer in which the solder pad 60A in the region where the corrosion resistant layer is formed is exposed (FIG. 4 (C )).
- a plan view of the multilayer printed wiring board 10 is shown in FIG.
- the bb cross section in Fig. 8 (B) corresponds to Fig. 4 (C).
- the substrate was immersed in an electroless gold plating solution composed of 1.5 gZl of cyanogen-platinum potassium and 80 gZl of citrate at a temperature of 80 ° C for 600 seconds to obtain a thickness of 0 on the nickel plating 54 layer.
- a 05 ⁇ m gold-plated layer 56 was formed, and a corrosion-resistant metal layer composed of a nickel plating layer 54 and a gold-plated layer 56 was formed (FIG. 5 (B)).
- FIG. 8 (C) A plan view of the multilayer printed wiring board 10 is shown in FIG. 8 (C).
- the cc cross section in Fig. 8 (C) corresponds to Fig. 5 (B).
- a corrosion-resistant layer made of nickel 54-gold 56 was formed on the solder pad 60A corresponding to the non-formed portion of the mask layer 50.
- the mask layer 50 is peeled off with an alkaline solution or the like, and a corrosion-resistant layer-formed solder pad 60A having a corrosion-resistant layer and a corrosion-resistant layer are formed.
- a printed wiring board 10 was obtained.
- An OPS layer 58 was formed on the solder pad 60B with no corrosion-resistant layer (FIG. 5 (C)).
- FIG. 8 (D) A plan view of the multilayer printed wiring board 10 is shown in FIG. 8 (D).
- the d-d cross section in Fig. 8 (D) corresponds to Fig. 5 (C).
- solder base made of SnZPb solder having a melting point T2 of about 183 ° C is applied to the solder pads 60A and 60B that also expose the opening force of the solder resist layer covering the uppermost multilayer circuit board.
- Solder layers 96U and 96D were formed by printing and reflowing at 183 ° C (Fig. 6).
- the solder layer 96U, 96D on the corrosion-resistant layer-unformed solder pad 60B without the corrosion-resistant layer is mainly mounted on the corrosion-resistant layer-formed solder pad 60A.
- an external terminal 92A such as a keypad is mainly mounted (Fig. 7).
- FIG. 9 is a plan view of a multilayer printed wiring board for a mobile phone manufactured by the manufacturing method of Example 1.
- FIG. 9 is a plan view of a multilayer printed wiring board for a mobile phone manufactured by the manufacturing method of Example 1.
- a solder pad 60B to which a component is attached via solder and an anticorrosion layer made of a nickel layer and a gold layer are formed in the opening 90a of the solder resist layer 90, and the land constituting the keypad terminal.
- 60A is provided.
- the land 60A includes a central portion 60Ac and an outer ring portion 60Ar.
- a carbon column (conductive member) held by a flexible holding member is disposed on the land 60A, and when the key operation is performed, the carbon column is connected to the central portion 60Ac and the ring portion 60Ar. Configured to electrically connect! Speak.
- Example 11 is the same as Example 1-1 except that the corrosion-resistant layer of Example 1 was formed and the OPS layer was not formed on the solder pad.
- Example 1-1 is the same as Example 1-1 except that a corrosion-resistant layer consisting of nickel, palladium, and gold is formed on the solder pad on which the corrosion-resistant layer of Example 1-1 is formed.
- Example 1-1 is the same as Example 1-1 except that a single layer of corrosion resistant layer such as a metal strength is formed on the solder pad on which the corrosion resistant layer of Example 1-1 is formed.
- Example 1-1 In Comparative Example 1-1, all solder pads were formed with a corrosion-resistant layer (nickel-gold). Otherwise, the same as Example 1-1.
- Example 1 group and Comparative Example 1 item A was evaluated with the manufactured printed wiring board, and the manufactured printed wiring board was housed in a casing, and evaluation was performed on items B and C below. It was. The evaluation results are shown in FIG.
- Heat cycle conditions 130 ° CZ3min. 55 ° C / 3min. 1 cycle. This cycle test is conducted up to 5000 cycles, and after 500 cycles, the test is allowed to stand for 2 hours and then the continuity test. We compared the number of cycles until a circuit with a resistance change rate exceeding ⁇ 10% exceeded 50% of the measured circuit.
- the multilayer printed wiring board of the present invention was applied to a multilayer printed wiring board for a mobile phone.
- the printed wiring board of the present invention is applied to a package substrate on which an IC chip is mounted.
- Example 2-1-1 The manufacturing process is the same as in Example 1-1, but Example 2-1-1 is used as the package substrate.
- Fig. 11 (A) shows a perspective view of the package substrate 70 before mounting the IC chip
- Fig. 11 (B) shows a cross section along the line B-B in Fig. 11 (A)
- Fig. 11 (C) shows after the IC chip is mounted.
- a perspective view of the package substrate 70 is shown
- FIG. 11 (D) shows a DD cross section of FIG. 11 (C).
- 12 (A1) shows a plan view of the package substrate 70 before mounting the IC chip
- FIG. 12 (B1) shows a rear view
- FIG. 12 (A2) shows a plan view of the package substrate 70 after mounting the IC chip.
- FIG. 12 (B2) shows a back view.
- a cavity 74 is provided on the surface of the package substrate 70, and a bonding pad 72 extends to the cavity 74.
- FIG. 11 (B) the knock substrate 70 is formed by laminating the substrate 30 in which the via hole 46 is formed, and the bonding pad 72 on the front side has a corrosion resistant layer composed of a nickel layer 54 and a gold layer 56. Is formed.
- An OPS layer 58 is provided on the pad 80 on the back side.
- the IC chip 76 is accommodated in the cavity 74, and the IC chip 7 6 and the bonding pad 72 are connected by a wire (gold wire) 78.
- a connection pin 82 is attached via a solder 83 to a bump (corrosion-resistant layer not formed) 80 which is an external terminal on the back side.
- Example 2 Shorte as in 1-1, wire bonding pad (corrosion-resistant layer formation) 72 is arranged on the front surface, and connection pin nod 80 (corrosion-resistant layer non-formation) 80 is arranged on the back surface.
- the OSP layer is not applied.
- Example 2- Shame as in 1-1, wire bonding pad (corrosion-resistant layer formation) 72 is arranged on the front surface, and connection pin node 80 (corrosion-resistant layer non-formation) 80 is arranged on the back surface.
- the bonding pad (corrosion-resistant layer) 72 is applied with either nickel or gold-palladium palladium.
- Example 2-1-1 Same as Example 1, except that wire bonding pad (corrosion-resistant layer formation) 72 and electronic component mounting pad (corrosion-resistant layer non-formation) 86 are formed on the surface as shown in FIG. 13 (A1).
- a connection pin node (non-corrosion resistant layer) 80 as an external terminal is disposed on the back surface, and an OSP layer is applied on the electronic component mounting pad 86 and the connection pin pad 80.
- an electronic component (chip capacitor) 90 is mounted on the electronic component mounting pad 86 on the front surface, and a connection pin 82 is mounted on the pad 80 on the back surface.
- Example 2 Showe as 1—1, but with wire bonding pad (corrosion-resistant layer) 72 and connection pin pad (corrosion-resistant layer not formed) 80 on the surface as shown in FIG. 14 (A1). Place the OSP layer on the pad 80 for connecting pins. Then, as shown in FIG. 14 (A1), an IC chip 76 is mounted on the surface, and a connection pin 82 is attached to the pad 80.
- wire bonding pad corrosion-resistant layer
- connection pin pad corrosion-resistant layer not formed
- Example 2-11 Same as 1, except that a flip chip pad (corrosion-resistant layer formation) 88 is formed on the front surface as shown in FIG. 15 (A1), and on the back surface as shown in FIG. 15 (B1).
- the BGA pad (corrosion-resistant layer is not formed) 80 which is an external terminal, is disposed on the BGA pad 80 and an OSP layer is applied. So Then, the IC chip 76 is mounted via the flip chip pad 88 on the front surface as shown in FIG. 15 (A2), and the BGA 84 is formed on the BGA pad 80 on the back surface as shown in FIG. 15 (B2). .
- Example 2-4-1 Same as 1 but with flip chip pad (corrosion-resistant layer formation) 88 formed on the front surface and BGA pad (corrosion-resistant layer not formed) 80, which is an external terminal, on the back surface. There is no OSP layer on top.
- Example 2 Showe as in 1-1, flip chip pad (corrosion-resistant layer formation) 88 is formed on the front surface, and BGA pad (corrosion-resistant layer non-formation) 80, which is an external terminal, is arranged on the back surface.
- the force to apply the OSP layer to the flip-chip pad (corrosion-resistant layer formation) 88 is applied with nickel-gold or nickel-palladium-gold.
- Example 2 Shorte as 1, except that the flip chip pad (corrosion-resistant layer formation) 88 and the electronic component mounting pad (corrosion-resistant layer non-formation) 86 are formed on the surface as shown in FIG. 15 (A1).
- the BGA pad (corrosion-resistant layer not formed) 80 is disposed on the back surface, and the OSP layer is applied on the electronic component mounting pad 86 and the BGA pad (corrosion-resistant layer not formed) 80.
- an electronic component (chip capacitor) 90 is mounted on the electronic component mounting pad 86 on the front surface, and BGA 84 is formed on the BGA pad 80 on the rear surface.
- Example 2-1 Same as 1 except that a flip-chip pad (corrosion-resistant layer formation) 88 and a BGA pad (corrosion-resistant layer non-formation) 80 are arranged on the surface as shown in FIG. 17 (A1). Apply an OSP layer to the BGA pad (corrosion-resistant layer not formed) 80. Then, as shown in FIG. 17A1, an IC chip 76 is mounted on the surface, and a BGA 84 is formed on the BGA pad 80 on the surface.
- a flip-chip pad (corrosion-resistant layer formation) 88 and a BGA pad (corrosion-resistant layer non-formation) 80 are arranged on the surface as shown in FIG. 17 (A1). Apply an OSP layer to the BGA pad (corrosion-resistant layer not formed) 80. Then, as shown in FIG. 17A1, an IC chip 76 is mounted on the surface, and a BGA 84 is formed on the BGA pad 80 on the surface.
- Example 2-1 corrosion resistant layers (nickel-gold) were formed on all pads 80. Otherwise, it was the same as Example 2-1-1.
- Example 2-2 a corrosion-resistant layer (nickel-gold) was formed on all pads 80. Other than that The same as Example 2-4-1.
- Example 2 group and Comparative Example 2 the manufactured printed wiring board was evaluated for item 2-A, and the printed wiring board on which the IC chip was mounted was as follows. Evaluation was performed on the C item.
- Heat cycle conditions 130 ° CZ3min. 55 ° C / 3min. 1 cycle. This cycle test is conducted up to 5000 cycles, and after 500 cycles, the test is allowed to stand for 2 hours and then the continuity test. The number of cycles where continuity was confirmed was confirmed by comparing the number of cycles.
- the cross section near the external connection terminal where the resistance change rate exceeded 10% was cross-cut, and the pad was observed with a microscope (X200) to confirm the presence of cracks in the conductor circuit or solder layer. .
- Heat cycle conditions 130 ° CZ3min. 55 ° C / 3min. 1 cycle. This cycle test is conducted up to 5000 cycles, and after 500 cycles, the test is allowed to stand for 2 hours and then the continuity test. The number of cycles in which the resistance change rate exceeded ⁇ 10% was checked for the presence or absence of 5 or more, and the number of cycles that existed was compared.
- FIG. 1 is a process diagram showing a method for producing a multilayer printed wiring board according to Example 1 of the present invention.
- FIG. 2 is a process drawing showing the method for producing the multilayer printed wiring board of Example 1.
- FIG. 3 is a process diagram showing a method for producing the multilayer printed wiring board of Example 1.
- FIG. 4 is a process diagram showing a method for producing the multilayer printed wiring board of Example 1.
- FIG. 5 is a process diagram showing a method for producing the multilayer printed wiring board of Example 1.
- FIG. 6 is a cross-sectional view of a multilayer printed wiring board according to Example 1.
- FIG. 7 is a cross-sectional view of the multilayer printed wiring board of FIG. 6 showing a state where components are mounted.
- FIG. 8 is a plan view showing a method for manufacturing the multilayer printed wiring board according to the first embodiment.
- 9] is a plan view of a printed wiring board applied to the mobile phone of the first embodiment.
- FIG. 10 is a chart showing the evaluation results of Example 1 and Comparative Example 1.
- FIG. 11 (A) is a perspective view of the package substrate according to Example 2-1-1 before mounting the IC chip
- FIG. 11 (B) is a cross-sectional view along BB in FIG. 11 (A).
- FIG. 11 (C) is a perspective view of the package substrate after the IC chip is mounted
- FIG. 11 (D) is a sectional view taken along the line DD in FIG. 11 (C).
- FIG. 12 (A1) is a plan view of the package substrate according to Example 2-1-1 before mounting the IC chip
- FIG. 12 (B1) is a back view
- FIG. FIG. 12B is a plan view of the package substrate after mounting the IC chip
- FIG. 12B2 is a rear view.
- FIG. 13 (A1) is a plan view of the package substrate according to Example 2-2-1 before mounting the IC chip
- FIG. 13 (B1) is a back view
- FIG. FIG. 13B is a plan view of the package substrate after mounting the IC chip
- FIG. 13B2 is a rear view.
- FIG. 14 (A1) is a plan view of the package substrate according to Example 2-3-1 before mounting the IC chip
- FIG. 14 (B1) is a back view
- FIG. 14 (A2) is FIG. 14B is a plan view of the package substrate after mounting the IC chip
- FIG. 14B2 is a rear view.
- FIG. 15 (A1) is a plan view of the package substrate according to Example 2-4-1 before mounting the IC chip
- FIG. 15 (B1) is a back view
- FIG. FIG. 15B is a plan view of the package substrate after mounting the IC chip
- FIG. 15B2 is a rear view.
- FIG. 16 (A1) is a plan view of the package substrate according to Example 2-5-1 before mounting the IC chip
- FIG. 16 (B1) is a back view
- FIG. FIG. 16B is a plan view of the package substrate after mounting the IC chip
- FIG. 16B2 is a rear view.
- FIG. 17 (A1) is a plan view of the package substrate according to Example 2-6-1 before mounting the IC chip
- FIG. 17 (B1) is a back view
- FIG. FIG. 17B is a plan view of the package substrate after mounting the IC chip
- FIG. 17B2 is a rear view.
- FIG. 18 is a chart showing the evaluation results of Example 2 and Comparative Example 2.
Abstract
Description
Claims
Priority Applications (3)
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JP2006543131A JP4794458B2 (ja) | 2004-10-27 | 2005-10-24 | 多層プリント配線板及び多層プリント配線板の製造方法 |
CN2005800371265A CN101049057B (zh) | 2004-10-27 | 2005-10-24 | 多层印刷电路板及多层印刷电路板的制造方法 |
EP05795675A EP1806956A4 (en) | 2004-10-27 | 2005-10-24 | MULTILAYER WIRING PLATE AND METHOD FOR MANUFACTURING MULTILAYER WIRING PLATE |
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JP2004-312791 | 2004-10-27 | ||
JP2004312791 | 2004-10-27 |
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PCT/JP2005/019499 WO2006046510A1 (ja) | 2004-10-27 | 2005-10-24 | 多層プリント配線板及び多層プリント配線板の製造方法 |
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US (3) | US7626829B2 (ja) |
EP (1) | EP1806956A4 (ja) |
JP (2) | JP4794458B2 (ja) |
KR (1) | KR20070057990A (ja) |
CN (1) | CN101049057B (ja) |
TW (2) | TWI392426B (ja) |
WO (1) | WO2006046510A1 (ja) |
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KR101412389B1 (ko) | 2010-03-31 | 2014-06-25 | 이비덴 가부시키가이샤 | 배선판 및 그 제조 방법 |
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WO2018181742A1 (ja) | 2017-03-31 | 2018-10-04 | 三菱瓦斯化学株式会社 | プリント配線板の製造方法 |
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Also Published As
Publication number | Publication date |
---|---|
EP1806956A4 (en) | 2007-11-21 |
EP1806956A1 (en) | 2007-07-11 |
US20060102384A1 (en) | 2006-05-18 |
US20130112469A1 (en) | 2013-05-09 |
CN101049057A (zh) | 2007-10-03 |
US8737087B2 (en) | 2014-05-27 |
TWI319698B (ja) | 2010-01-11 |
TWI392426B (zh) | 2013-04-01 |
TW200631478A (en) | 2006-09-01 |
JP2011139101A (ja) | 2011-07-14 |
US8353103B2 (en) | 2013-01-15 |
JPWO2006046510A1 (ja) | 2008-05-22 |
JP4794458B2 (ja) | 2011-10-19 |
TW201010552A (en) | 2010-03-01 |
US7626829B2 (en) | 2009-12-01 |
KR20070057990A (ko) | 2007-06-07 |
CN101049057B (zh) | 2011-12-07 |
US20100000087A1 (en) | 2010-01-07 |
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