TW381224B - Non-volatile semiconductor memory device - Google Patents
Non-volatile semiconductor memory device Download PDFInfo
- Publication number
- TW381224B TW381224B TW087112838A TW87112838A TW381224B TW 381224 B TW381224 B TW 381224B TW 087112838 A TW087112838 A TW 087112838A TW 87112838 A TW87112838 A TW 87112838A TW 381224 B TW381224 B TW 381224B
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18085996A JP3062730B2 (ja) | 1996-07-10 | 1996-07-10 | 不揮発性半導体記憶装置および書込み方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW381224B true TW381224B (en) | 2000-02-01 |
Family
ID=16090611
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW087112838A TW381224B (en) | 1996-07-10 | 1997-06-16 | Non-volatile semiconductor memory device |
| TW086108317A TW350048B (en) | 1996-07-10 | 1997-06-16 | Non-volatile semiconductor memory and the writing method |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW086108317A TW350048B (en) | 1996-07-10 | 1997-06-16 | Non-volatile semiconductor memory and the writing method |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US5959882A (https=) |
| JP (2) | JP3062730B2 (https=) |
| KR (1) | KR980011502A (https=) |
| TW (2) | TW381224B (https=) |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5978270A (en) * | 1995-08-31 | 1999-11-02 | Hitachi, Ltd. | Semiconductor non-volatile memory device and computer system using the same |
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| JP4090570B2 (ja) * | 1998-06-02 | 2008-05-28 | 株式会社ルネサステクノロジ | 半導体装置、データ処理システム及び不揮発性メモリセルの閾値変更方法 |
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| USRE40110E1 (en) | 1999-09-20 | 2008-02-26 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device for storing multivalued data |
| JP2001093288A (ja) | 1999-09-20 | 2001-04-06 | Toshiba Corp | 不揮発性半導体記憶装置 |
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| JP4750655B2 (ja) | 2006-09-12 | 2011-08-17 | Okiセミコンダクタ株式会社 | 半導体不揮発性メモリ、データ書き込み方法、半導体不揮発性メモリの製造方法、及びデータ書き込みプログラム |
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| US8565019B2 (en) * | 2007-11-20 | 2013-10-22 | Kabushiki Kaisha Toshiba | Method for controlling threshold value in nonvolatile semiconductor memory device |
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| KR102363382B1 (ko) * | 2017-09-26 | 2022-02-16 | 에스케이하이닉스 주식회사 | 불휘발성 메모리 장치, 불휘발성 메모리 장치의 동작 방법 및 불휘발성 메모리 장치를 포함하는 데이터 저장 장치 |
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| WO1997050089A1 (en) * | 1996-06-24 | 1997-12-31 | Advanced Micro Devices, Inc. | A method for a multiple bits-per-cell flash eeprom with page mode program and read |
| JP3062730B2 (ja) * | 1996-07-10 | 2000-07-12 | 株式会社日立製作所 | 不揮発性半導体記憶装置および書込み方法 |
| US5675537A (en) * | 1996-08-22 | 1997-10-07 | Advanced Micro Devices, Inc. | Erase method for page mode multiple bits-per-cell flash EEPROM |
| US5864569A (en) * | 1996-10-18 | 1999-01-26 | Micron Technology, Inc. | Method and apparatus for performing error correction on data read from a multistate memory |
-
1996
- 1996-07-10 JP JP18085996A patent/JP3062730B2/ja not_active Expired - Fee Related
-
1997
- 1997-06-16 TW TW087112838A patent/TW381224B/zh not_active IP Right Cessation
- 1997-06-16 TW TW086108317A patent/TW350048B/zh not_active IP Right Cessation
- 1997-07-02 KR KR1019970030562A patent/KR980011502A/ko not_active Withdrawn
- 1997-07-09 US US08/890,396 patent/US5959882A/en not_active Expired - Lifetime
-
1998
- 1998-10-13 JP JP29056298A patent/JP3993323B2/ja not_active Expired - Lifetime
-
1999
- 1999-06-29 US US09/342,223 patent/US6525960B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1027486A (ja) | 1998-01-27 |
| US6525960B2 (en) | 2003-02-25 |
| KR980011502A (ko) | 1998-04-30 |
| JP3062730B2 (ja) | 2000-07-12 |
| US5959882A (en) | 1999-09-28 |
| JPH11195299A (ja) | 1999-07-21 |
| US20020181279A1 (en) | 2002-12-05 |
| JP3993323B2 (ja) | 2007-10-17 |
| TW350048B (en) | 1999-01-11 |
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