KR101974763B1 - 다층 기판 - Google Patents

다층 기판 Download PDF

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Publication number
KR101974763B1
KR101974763B1 KR1020177017940A KR20177017940A KR101974763B1 KR 101974763 B1 KR101974763 B1 KR 101974763B1 KR 1020177017940 A KR1020177017940 A KR 1020177017940A KR 20177017940 A KR20177017940 A KR 20177017940A KR 101974763 B1 KR101974763 B1 KR 101974763B1
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South Korea
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semiconductor substrate
conductive particles
substrate
conductive
electrodes
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Korean (ko)
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KR20170093171A (ko
Inventor
야스시 아쿠츠
도모유키 이시마츠
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데쿠세리아루즈 가부시키가이샤
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    • H01L24/28
    • H01L24/11
    • H01L24/13
    • H01L24/17
    • H01L24/27
    • H01L24/29
    • H01L24/73
    • H01L24/81
    • H01L24/83
    • H01L24/92
    • H01L25/0657
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    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
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    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01204Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates
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    • H10W72/01212Manufacture or treatment of bump connectors, dummy bumps or thermal bumps at a different location than on the final device, e.g. forming as prepeg
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    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting
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    • H10W72/07351Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07354Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in dispositions
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    • H10W72/221Structures or relative sizes
    • H10W72/222Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H10W72/223Multilayered bumps, e.g. a coating on top and side surfaces of a bump core characterised by the structure of the outermost layers, e.g. multilayered coatings
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    • H10W72/221Structures or relative sizes
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    • H10W72/221Structures or relative sizes
    • H10W72/225Bumps having a filler embedded in a matrix
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    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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    • H10W99/00Subject matter not provided for in other groups of this subclass

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  • Non-Insulated Conductors (AREA)
  • Wire Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Adhesive Tapes (AREA)
  • Combinations Of Printed Boards (AREA)
KR1020177017940A 2015-01-13 2016-01-13 다층 기판 Active KR101974763B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015004595 2015-01-13
JPJP-P-2015-004595 2015-01-13
PCT/JP2016/050873 WO2016114318A1 (ja) 2015-01-13 2016-01-13 多層基板

Publications (2)

Publication Number Publication Date
KR20170093171A KR20170093171A (ko) 2017-08-14
KR101974763B1 true KR101974763B1 (ko) 2019-05-02

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Country Status (6)

Country Link
US (1) US10199358B2 (https=)
JP (2) JP2016131245A (https=)
KR (1) KR101974763B1 (https=)
CN (2) CN107112314B (https=)
TW (3) TWI709221B (https=)
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