CN107112314B - 多层基板 - Google Patents

多层基板 Download PDF

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Publication number
CN107112314B
CN107112314B CN201680004447.3A CN201680004447A CN107112314B CN 107112314 B CN107112314 B CN 107112314B CN 201680004447 A CN201680004447 A CN 201680004447A CN 107112314 B CN107112314 B CN 107112314B
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electrodes
conductive particles
semiconductor substrate
electrode
substrate
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CN107112314A (zh
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阿久津恭志
石松朋之
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Dexerials Corp
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Dexerials Corp
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Non-Insulated Conductors (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
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Abstract

提供导通特性优异且能够以低成本制造的、层叠具有贯通电极的半导体基板的多层基板。在多层基板的俯视观察中，导电粒子选择性地存在于贯通电极所对置的位置。多层基板具有对置的贯通电极通过导电粒子连接、形成有该贯通电极的半导体基板彼此通过绝缘粘接剂粘接的连接构造。

Description

多层基板
技术领域
本发明关于多层基板。
背景技术
在IC的高密度安装领域中，使用将装入IC等的电子部件的半导体基板层叠的多层基板。
作为多层基板的制造方法，有这些方法，即将具有凸点的贯通电极形成在各个半导体基板，利用凸点的回流来连接对置的半导体基板的贯通电极彼此的方法（专利文献1）；或在对置的半导体基板之间夹着向绝缘粘接剂层中分散了导电粒子的各向异性导电性膜，并加热加压而连接贯通电极彼此的方法（专利文献2）。
现有技术文献
专利文献
专利文献1：日本特开2010－272737号公报
专利文献2：日本特开平8－330736号公报。
发明内容
发明要解决的课题
然而，在各个半导体基板的贯通电极形成凸点、并通过焊锡的回流来连接对置的半导体基板的贯通电极、层叠半导体基板的方法，其制造工序复杂。
在使用各向异性导电性膜来连接对置的贯通电极、层叠半导体基板的方法中，虽然能够简化多层基板的制造工序，但由于各向异性导电性膜在绝缘粘接剂层中随机地分散了导电粒子，所以存在各向异性导电性膜的导电粒子没有充分地夹在对置的半导体基板的贯通电极间的情况，从而存在导通特性出现偏差这一问题。另一方面，在对置的半导体基板间存在多数对贯通电极的连接无贡献的导电粒子，因而还存在无用的导电粒子花费成本这一问题。
因此，课题为利用各向异性导电性膜来层叠半导体基板，并且以简便的制造工序且低成本提供导通特性优异的多层基板。
用于解决课题的方案
本发明人发现了在利用各向异性导电性膜层叠半导体基板、制造多层基板时，若对应于半导体基板的贯通电极的配置而选择性地配置各向异性导电性膜的绝缘粘接剂中的导电粒子，则能够以导电粒子可靠地连接对置的半导体基板的贯通电极，另外，减少对连接无贡献的导电粒子数量而降低多层基板的制造成本，想到了本发明。
即，本发明提供多层基板，层叠了具有贯通电极的半导体基板，其中，
在多层基板的俯视观察中，导电粒子选择性地存在于贯通电极所对置的位置，
具有对置的贯通电极通过导电粒子连接、形成有该贯通电极的半导体基板彼此通过绝缘粘接剂粘接的连接构造。
特别是，作为该多层基板，提供如下方式，即层叠了具有贯通电极的第1半导体基板和具有贯通电极的第2半导体基板的多层基板，其中，
具有这样的连接构造：
第1半导体基板的贯通电极与第2半导体基板的贯通电极对置，并通过选择性地配置在它们之间的导电粒子连接，
第1半导体基板和第2半导体基板通过绝缘粘接剂粘接。
另外，本发明提供多层基板的制造方法，使形成在半导体基板的贯通电极彼此对置并接合，其中，在具有贯通电极的半导体基板彼此之间夹住对应于贯通电极所对置的部分在多层基板的俯视观察中的位置而在绝缘粘接剂层选择性地配置导电粒子的各向异性导电性膜，对该各向异性导电性膜进行加热加压，从而各向异性导电性连接这些半导体基板。
特别是，作为该多层基板的制造方法，提供如下方式，即是对具有贯通电极的第1半导体基板和具有贯通电极的第2半导体基板，使它们的贯通电极彼此对置而接合的多层基板的制造方法，在第1半导体基板与第2半导体基板之间夹住导电粒子对应于贯通电极的配置而选择性地配置在绝缘粘接剂层的各向异性导电性膜，对该各向异性导电性膜进行加热加压，从而各向异性导电性连接第1半导体基板与第2半导体基板。
进而，本发明作为使用于上述多层基板的制造方法的各向异性导电性膜，提供包含绝缘粘接剂层和配置在该绝缘粘接剂层的导电粒子的各向异性导电性膜，其中，导电粒子对应于以各向异性导电性膜连接的贯通电极的配置而选择性地配置在绝缘粘接剂层。
另外，作为对上述多层基板的制造方法有用的各向异性导电性膜，提供各向异性导电性膜，该各向异性导电性膜包含绝缘粘接剂层和配置在该绝缘粘接剂层的导电粒子，其中，形成2个以上的导电粒子接近的导电粒子单元，
在该导电粒子单元中，任意的导电粒子和与该导电粒子最接近的导电粒子的距离为导电粒子直径的0.2～0.5倍。
发明效果
依据本发明的多层基板，由于半导体基板的贯通电极彼此利用导电粒子可靠地连接，所以导通特性稳定，并且对连接无贡献的导电粒子在半导体基板间减少，因此能抑制多层基板的制造成本。另外，基于同样的理由，对仪表操作工时数的削减也是有效的。
本发明的多层基板，通过使用导电粒子选择性地配置在特定位置的各向异性导电性膜，能以简便的工序进行制造。
特别是在利用本发明的方法来制造层叠3个以上半导体基板的多层基板的情况下，若在层叠的半导体基板间使用共同的各向异性导电性膜，则能够大幅削减多层基板的总制造成本。因而，能够以低价格提供本发明的多层基板。
附图说明
[图1]图1是本发明的一实施方式的多层基板1A的截面图。
[图2]图2是本发明的一实施方式的多层基板1B的截面图。
[图3A]图3A是多层基板1B的制造工序的说明图。
[图3B]图3B是多层基板1B的制造工序的说明图。
[图3C]图3C是多层基板1B的制造工序的说明图。
[图3D]图3D是多层基板1B的制造工序的说明图。
[图4]图4是多层基板1C的截面图。
[图5A]图5A是多层基板1D的截面图。
[图5B]图5B是使用于多层基板1D的制造的各向异性导电性膜10D中的导电粒子的配置图（俯视图）。
[图6]图6是使用于实施例1的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图7]图7是使用于实施例3的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8A]图8A是使用于实施例4的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8B]图8B是使用于实施例5的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8C]图8C是使用于实施例6的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8D]图8D是使用于实施例7的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8E]图8E是使用于实施例8的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8F]图8F是使用于实施例9的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8G]图8G是使用于实施例10的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
[图8H]图8H是使用于实施例11的多层基板的制造的半导体基板的表面中的电极和导电粒子的配置图。
具体实施方式
以下，一边参照附图，一边对本发明详细地进行说明。此外，各图中，同一标号表示同一或同等的结构要素。
＜多层基板中的连接构造＞
图1是本发明的一实施方式的多层基板1A的截面图。
该多层基板1A在布线基板2层叠了3层的半导体基板3A、3B、3C，各半导体基板3A、3B、3C是形成有IC等的半导体部件的半导体晶圆。在布线基板2形成有贯通电极4X，在各半导体基板3A、3B、3C形成有贯通电极4A、4B、4C。而且，在布线基板2的表面贯通电极4X露出的部分、或贯通电极4A、4B、4C露出于半导体基板的表面的部分，分别形成有电极焊盘。此外，本发明中作为半导体基板3A、3B、3C，也可以使用半导体芯片。另外，本发明中，对构成多层基板的半导体基板的层叠数量无特别限制。
在多层基板1A中，具有布线基板2的贯通电极4X和第1半导体基板3A的贯通电极4A对置，这些贯通电极4X、4A通过选择性地配置在这些贯通电极4X、4A间的导电粒子11而电连接的连接构造。另外，具有第1半导体基板3A的贯通电极4A和第2半导体基板3B的贯通电极4B对置，这些贯通电极4A、4B通过选择性地配置在这些贯通电极4A、4B间的导电粒子11而电连接的连接构造。
在该连接构造中，在贯通电极4A、4B的对置的部位选择性地配置有导电粒子11是指导电粒子11主要存在于贯通电极4A、4B的对置面或其附近，在贯通电极4A、4B的对置面能捕获到1个以上的导电粒子11。在成本方面贯通电极4A、4B的对置面上的捕获数优选为1～数个。在利用各向异性导电性膜而在贯通电极4A、4B的对置面配置多个导电粒子的情况下，能够缓和半导体基板3A、3B与导电粒子11的对位精度。另一方面，从导通稳定性方面来看来说优选使贯通电极4A、4B的对置面上的捕获数为10个以上。在利用各向异性导电性膜而在贯通电极4A、4B的对置面配置导电粒子的情况下，为了更加稳定地捕获导电粒子，也可以在各向异性导电性膜的对应的部位，配置要在贯通电极4A、4B的对置面捕获的所期望的导电粒子数量的等倍到数倍的导电粒子。通过这样处理，能够缓和对位精度，且还能期待削减半导体基板的制造所需的时间的效果。
第1半导体基板3A和第2半导体基板3B的对置面彼此通过绝缘粘接剂12来粘接。绝缘粘接剂12由后述的各向异性导电性膜10A的绝缘粘接剂层形成。
与第1半导体基板3A的贯通电极4A连接的第2半导体基板3B的贯通电极4B，在第3半导体基板3C侧，还与第3半导体基板3C的贯通电极4C对置，通过在它们之间选择性地配置的导电粒子11，第2半导体基板3B的贯通电极4B与第3半导体基板3C的贯通电极4C电连接。该第2半导体基板3B与第3半导体基板3C的对置面彼此也通过绝缘粘接剂12来粘接。
这样，多层基板1A具有布线基板2的贯通电极4X和3层的半导体基板的贯通电极4A、4B、4C沿多层基板的层叠方向以直线状相连的连接构造。依据该以直线状相连的连接构造，电传输的路径变短，因此能够提高传输速度。
＜多层基板中的导电粒子＞
多层基板1A如后述那样通过利用导电粒子具有特定配置的本发明的各向异性导电性膜来连接构成多层基板的各层而制造。各向异性导电性膜中的导电粒子11的粒径大小，通常小于贯通电极4A、4B的对置面的直径，但是在多层基板1A中，导电粒子11从起初的形状压垮而粒径大小成为与贯通电极4A、4B的对置面的直径相同程度也可。这意味着压垮的导电粒子11既可以收集到贯通电极4A、4B的对置面内，也可为外周部的至少一部分从贯通电极4A、4B的对置面伸出的状态。此外，也依赖于导电粒子11的构成原料，但是导电粒子11存在在多层基板1A中也维持粒子形状的情况。
在多层基板1A的第1半导体基板3A与第2半导体基板3B之间，如上述那样在贯通电极4A、4B的对置的部位选择性地存在导电粒子11，大部分导电粒子11被对置的贯通电极4A、4B捕获。因此，即便存在未被对置的贯通电极4A、4B捕获的导电粒子11，也优选使那样的导电粒子11的数量为存在于第1半导体基板3A与第2半导体基板3B之间的导电粒子的总数的5％以下，更优选为0.5％以下。特别优选使导电粒子11的大致全部被贯通电极4A、4B捕获。在构成多层基板1A的其他的半导体基板间也同样。这样通过减少对贯通电极4A、4B、4C的连接无贡献的导电粒子11，从而变得容易对性能进行模拟解析，能削减改善工时数。
＜布线基板＞
在此，作为构成多层基板1A的布线基板2，能够使用FR4等的环氧玻璃基板等。作为布线基板2，也可以利用IC芯片或IC形成用的硅晶片。布线基板2可根据多层基板1A的用途等而适当选择。
在布线基板2的电极部分，根据需要设有焊锡球5。
＜半导体基板＞
作为半导体基板3A、3B、3C，只要有贯通电极4A、4B、4C就无特别限制，例如，能够使用硅等一般的半导体材料。
贯通电极4A、4B、4C的规格能够适当设定。例如，贯通电极4A、4B、4C既可以具备电极焊盘，也可以具备凸点。但是，在层叠半导体基板3A、3B、3C的情况下，使用以使各半导体基板3A、3B、3C的贯通电极4A、4B、4C在多层基板1A的厚度方向至少跨过2层的半导体基板而以直线状相连的方式、优选以跨过多层基板1A的表面和背面而以直线状相连的方式配置的基板。
＜搭载部件＞
在本发明的多层基板，根据需要能够搭载各种部件。
例如图2所示的多层基板1B具有各层的贯通电极4X、4A、4B、4C以直线状相连的连接构造，在最外层具有与贯通电极4C连接的散热用的散热器6。因而，多层基板1B能够通过散热器6来有效率地对从形成在布线基板2或半导体基板3A、3B、3C的IC等的电子部件等释放的热进行散热。
＜多层基板的制造方法＞
作为本发明的多层基板的制造方法，例如，在图2的多层基板1B的情况下，首先，如图3A所示，在具有贯通电极4X的布线基板2与具有贯通电极4A的半导体基板3A之间，夹住导电粒子11对应于应该连接的贯通电极4X、4A的配置而选择性地配置在绝缘粘接剂层12的本发明的各向异性导电性膜10A，通过对各向异性导电性膜10A进行加热加压来各向异性导电性连接布线基板2与第1半导体基板3A，得到图3B所示的2层的连接构造体。更具体而言，将布线基板2和各向异性导电性膜10A，以使应该连接的贯通电极4X与导电粒子11的配置相匹配的方式对位重叠，进而使第1半导体基板3A也同样地对位叠合，加热加压而将它们各向异性导电性连接。
同样地，如图3C所示，将第1半导体基板3A和各向异性导电性膜10B对位重叠，在其上将第2半导体基板3B对位重叠，加热加压而各向异性导电性连接，得到图3D所示的3层的连接构造。进而同样地在第2半导体基板3B上将各向异性导电性膜和第3半导体基板3C对位重叠，并加热加压。该对位也可以通过利用CCD等观测各向异性导电膜的与贯通电极对应的导电粒子（如后述那样形成有导电粒子单元的情况下，构成该导电粒子单元的导电粒子）和贯通电极，使它们叠合来进行。
然后，通过导热带等，在第3半导体基板3C上连接散热器6，在布线基板2的电极焊盘形成焊锡球5，通过常用方法来得到多层基板1B。或者，也可以取代焊锡球5而设置导电粒子。
此外，作为布线基板2或半导体基板3A、3B、3C与各向异性导电性膜10A、10B的对位方法，也能够在布线基板2、半导体基板3A、3B、3C及各向异性导电性膜10A、10B，分别先带有对准标记，通过对齐这些对准标记来进行对位。
即，以前，在层叠半导体基板而制造多层基板的情况下，作为一个例子，在半导体基板形成数十μm～数百μm大小的对准标记，利用CCD或激光来进行半导体基板彼此的对位。另一方面，在各向异性导电性膜单分散或以格子状配置有导电粒子，因此在各向异性导电性膜未带有对准标记。相对于此，本发明所使用的各向异性导电性膜，由于导电粒子11对应于应该连接的贯通电极的配置而选择性地配置在绝缘粘接剂层12，所以能够将导电粒子11的配置作为对准标记的代替。优选也包括这样的导电粒子的配置在内而在各向异性导电性膜设置一些对准标记。
＜各向异性导电性膜＞
关于在本发明的多层基板的制造方法中使用的本发明的各向异性导电性膜，导电粒子11对应于应该连接的贯通电极的配置而选择性地配置在绝缘粘接剂层12，优选通过导电粒子11形成对准标记。作为对准标记，优选通过导电粒子的配置来形成。由此，能够明确地检测对准标记，且不需要追加用于使各向异性导电性膜带有对准标记的新的工序。另一方面，对准标记也可以通过以激光照射等使绝缘粘接剂层12局部固化而形成。由此对附带对准标记的位置进行变更变得容易。
作为这样的各向异性导电性膜的制造方法，通过对金属板进行机械加工、激光加工、光刻等的公知加工方法而制作具有与导电粒子11的配置对应的凸部的模具，向该模具填充固化性树脂，使之固化而制造凹凸反转的树脂模，使导电粒子进入该树脂模的凹部，其上填充绝缘粘接剂层形成用组合物，并使之固化，从模中取出即可。
另外，为了使导电粒子11在绝缘粘接剂层12处于特定配置，也可以为在绝缘粘接剂层形成组合物层上，设置以既定配置形成贯通孔的构件，从其上供给导电粒子11，使之通过贯通孔等的方法。
＜形成各向异性导电性膜的导电粒子＞
作为形成各向异性导电性膜10A、10B的导电粒子，能够从公知的用于各向异性导电性膜的材料中适当选择。可举出例如焊锡、镍、钴、银、铜、金、钯等的金属粒子、金属包覆树脂粒子等。金属包覆树脂粒子的金属包覆，能够利用非电解镀法、溅射法等的公知的金属膜形成方法来形成。金属包覆只要在芯（core）树脂材料的表面形成就无特别限制。芯树脂材料既可以仅由树脂形成，也可以为提高导通可靠性而含有导电微粒。
在导通可靠性和成本方面，作为导电粒子，优选使用上述粒子中的焊锡粒子。另一方面，在后面工序中不需要回流工序等情况下，优选使用金属包覆树脂粒子。这是因为在本发明中通过在绝缘性粘接剂层配置有导电粒子的各向异性导电性膜的加热加压，进行贯通电极彼此的连接或半导体基板彼此的粘接，因此，若使用金属包覆树脂粒子作为导电粒子，则能够使加热加压低温化，会扩大绝缘性粘接剂的材料选择的范围。
另外，作为导电粒子，也能够一并使用2种以上的粒子。
从电极间接合的稳定性方面来看，导电粒子11的粒径优选为2～40μm。
＜形成各向异性导电性膜的绝缘粘接剂层＞
作为绝缘粘接剂层12，能够适当采用在公知的各向异性导电性膜使用的绝缘性树脂层。例如，能够使用包含丙烯酸酯化合物和光自由基聚合引发剂的光自由基聚合型树脂层；包含丙烯酸酯化合物和热自由基聚合引发剂的热自由基聚合型树脂层；包含环氧化合物和热阳离子聚合引发剂的热阳离子聚合型树脂层；包含环氧化合物和热阴离子聚合引发剂的热阴离子聚合型树脂层等。另外，这些树脂层可根据需要为分别聚合的树脂。另外，也可以由多个树脂层形成绝缘粘接剂层12。
但是，根据从多层基板1A切出芯片等的用途，在制造多层基板1A后切断多层基板1A的情况下，优选绝缘粘接剂层12具有能承受切断的柔软性和粘接性。
另外，根据需要，也可以向绝缘粘接剂层12加入二氧化硅微粒、氧化铝、氢氧化铝等的绝缘性填充物。绝缘性填充物的配合量相对于形成绝缘粘接剂层的树脂100质量份优选为3～40质量份。由此，在各向异性导电性连接时即便绝缘粘接剂层12熔化，也能抑制导电粒子11因熔化的树脂而无用地移动。
绝缘性填充物的大小优选为不阻碍各向异性导电性连接的大小。
在这样制造的各向异性导电性膜10A、10B中，几乎不存在存在于既定位置以外的导电粒子。然而，即便存在于既定位置也能存在不被对置的贯通电极4A、4B捕获的导电粒子。因而，在将该各向异性导电性膜10A、10B使用于半导体基板3A、3B的连接之后，使在对置的半导体基板3A、3B之间，不被贯通电极4A、4B捕获的导电粒子11的数量，优选成为存在于对置的半导体基板3A、3B之间的导电粒子11的总数的5％以下。
＜变形方式1＞
本发明的多层基板能够采取各种方式。
例如，图4所示的多层基板1C，通过在图1所示的多层基板1A中，作为连接布线基板2的贯通电极4X与第1半导体基板3A的贯通电极4A的各向异性导电性膜、连接第1半导体基板3A的贯通电极4A与第2半导体基板3B的贯通电极4B的各向异性导电性膜、和连接第2半导体基板3B的贯通电极4B与第3半导体基板3C的贯通电极4C的各向异性导电性膜，使用共同的各向异性导电性膜而制造。即，作为各向异性导电性膜，使用在想要制造的多层基板1C的俯视观察中，导电粒子11对应于布线基板2或各半导体基板3A、3B、3C的贯通电极彼此对置的位置而选择性地配置在绝缘粘接剂层12的构成。由此，在多层基板1C的俯视观察中，在贯通电极4X、4A、4B、4C所对置的位置会存在导电粒子11、11x。换言之，在对置的贯通电极之间并不是一定存在仅对该贯通电极选择性地配置的导电粒子。例如，在半导体基板3A与半导体基板3B之间，除了导电粒子11选择性地配置在形成在这些半导体基板3A与半导体基板3B的贯通电极4A、4B所对置的位置以外，还存在对半导体基板3A的贯通电极4A与半导体基板的贯通电极4B的连接无贡献的导电粒子11x。因而，相对于在半导体基板3A与半导体基板3B之间存在的全部导电粒子，在半导体基板3A与半导体基板3B之间不被贯通电极捕获的导电粒子可以超过5％而存在。然而，在半导体基板3A与半导体基板3B之间对这些连接无贡献的导电粒子11x，对布线基板2的贯通电极4X与第1半导体基板3A的贯通电极4A的连接有贡献。另外，在多层基板1C的俯视观察中，在贯通电极彼此不对置的位置，未配置或者实质上不存在导电粒子。即，优选的是在图4所示的多层基板1C中，在多层基板的膜厚方向的任意截面的各半导体基板间，在垂直方向上与全部的贯通电极重叠的位置存在导电粒子的状态。
这样利用共同的各向异性导电性膜来连接各半导体基板时，能够削减制造多层基板所需的总成本。另外，也能容易对应多层基板的陈列（lineup）的增加（规格变更）。
如以上那样，本发明的多层基板中，多层基板的俯视观察下，在贯通电极所对置的位置选择性地存在导电粒子。而且，通过这样配置的导电粒子，对置的贯通电极连接，形成有该贯通电极的半导体基板彼此通过绝缘粘接剂来粘接。在该情况下，对置的贯通电极，既可以如图1所示，通过仅在该对置的贯通电极之间选择性地配置的导电粒子11来连接，另外，也可以如图4所示，在形成有对置的贯通电极的半导体基板间，包含对该对置的贯通电极的连接无贡献的导电粒子11x。
＜变形方式2＞
图5A所示的多层基板1D是图1所示的多层基板1A中对置的贯通电极4X、4A、4B、4C分别通过2个以上的导电粒子11来连接的基板。图5B是示出使用于该连接的各向异性导电性膜10D中的导电粒子11的配置的俯视图。
在该各向异性导电性膜10D中，对绝缘粘接剂层12形成有接近地配置2个以上的导电粒子4的导电粒子单元11u。各导电粒子单元11u优选对应于以该各向异性导电性膜1D连接的贯通电极的配置而配置，以使对置的贯通电极通过构成导电粒子单元11u的多个导电粒子11来连接。通过以构成导电粒子单元11u的多个导电粒子11连接对置的贯通电极，与以一个一个的导电粒子连接的情况相比，能够使连接后的导通电阻可靠（robust）。
在各向异性导电性膜中，构成导电粒子单元11u的导电粒子数量为2个以上，从导通稳定性的观点来看，更优选为3个以上。另外，各向异性导电性连接时，通过使导电粒子不仅存在于对置的贯通电极的电极面内，而且也存在于电极的外周，能够扩大膜的粘合偏移的容许范围，从这一方面来看，构成导电粒子单元11u的导电粒子数量优选为30个以下，更优选为20个以下。
另外，从使贯通电极的对置部分容易捕获多个导电粒子方面来看，在导电粒子单元11u中，优选使导电粒子单元11u内的任意导电粒子和与该导电粒子最接近的导电粒子的距离L小于导电粒子直径的0.5倍，也可以使邻接的导电粒子彼此接触。另一方面，从防止各向异性导电性连接时更加压垮的导电粒子11彼此互相干涉而导电粒子的配置从所期望的位置偏离方面来看，导电粒子单元11u中邻接的导电粒子优选相距导电粒子直径的0.2倍以上。
＜变形方式3＞
在利用共同的各向异性导电性膜连接各半导体基板，从而削减制造多层基板所需的总成本的情况下，也可以使用在一面配置导电粒子单元11u的各向异性导电性膜来制造多层基板。在该情况下，构成各导电粒子单元11u的导电粒子数量为3个以上，优选为12个以上，更优选为20个以上，在各导电粒子单元内导电粒子以面状配置而不是以一列配置。为了避免发生短路，导电粒子单元11u彼此的间隔设为导电粒子直径的1倍以上，根据半导体基板的电极间隔而适当决定。导电粒子单元的直径或最长边的长度的、相对于电极的直径或最长边的长度的比例，若过小则电极中的导电粒子的捕获性差，若过大则担心发生短路，因此下限优选为0.3倍以上，更优选为0.5倍以上，进一步优选为0.7倍以上，而上限优选为3倍以下，更优选为2倍以下。另外，导电粒子单元的直径或最长边的长度如果不足电极的直径或最长边的长度的等倍，则导电粒子单元会收集到电极内，因此导电粒子的挟持状态容易变得良好，如果为等倍以上则导电粒子与电极的对位中的余地会扩大，因此能够谋求缩短多层基板的制造时间。
通过共同使用在一面以适当的间隔配置导电粒子单元11u的各向异性导电性膜，与使用导电粒子的配置按连接的每个半导体基板不同的各向异性导电性膜的情况相比，能够大幅减少多层基板的制造成本。本发明也包括这样的各向异性导电性膜以及使用它的多层基板。
本发明的多层基板能够在以高密度半导体封装等为首的、要求高密度安装的各种半导体的各种用途使用。另外，也可以将多层基板以既定尺寸切断而使用。
实施例
以下，利用实施例来具体地对本发明进行说明。
实施例1～3、比较例1
（1）半导体基板
作为构成多层基板的半导体基板3，准备外形为7mm□、厚度200μm的矩形，且如图6所示，具有铬制电极焊盘的贯通电极4以外围（peripheral）配置（φ30μm、85μm间距、280端子（pin））形成的基板。作为对准标记，在半导体基板形成有200μm□的四边形标记。
（2）各向异性导电性膜的制造
如表1所示，制造了将既定粒径的导电粒子（微粉焊锡粉、三井金属矿业（株））在绝缘粘接剂层随机配置（比较例1、粒子密度17.1个/mm2）、或对应于半导体基板的电极配置而配置的（实施例1～3、85μm间距、280处）各向异性导电性膜。
在该情况下，实施例1、2中，如图6所示，按电极4的每1处配置1个导电粒子11，实施例3中，如图7所示，按电极4的每1处配置3个导电粒子11。
另外，实施例1～3中，通过导电粒子的排列来形成对准标记。在该情况下，使得导电粒子的排列的轮廓与半导体基板的对准标记的轮廓大体一致。
更具体而言，准备厚度2mm的镍板，以使凸部（直径25μm、高度20μm）成为上述电极的配置的方式构图而制作转印母版，以使干燥厚度成为30μm的方式对转印母版涂敷含有苯氧基树脂（YP－50、新日铁住金化学（株））60质量份、丙烯酸酯树脂（M208、东亚合成（株））29质量份、光聚合引发剂（IRGACURE184、BASF JAPAN（株））2质量份的光聚合性树脂组合物，在80℃干燥5分钟后，利用高压水银灯进行1000mJ光照射，从而作成具有凹部的转印模。
另一方面，由苯氧基树脂（YP－50、新日铁住金化学（株））60质量份、环氧树脂（jER828、三菱化学（株））40质量份、及阳离子类固化剂（SI－60L、三新化学工业（株））2质量份调制绝缘粘接剂形成用组合物，将它涂敷到膜厚50μm的PET膜上，以80℃的烤箱干燥5分钟，在PET膜上以5μm形成由绝缘性树脂构成的粘着层。
向具有前述的凹部的转印模填充导电粒子，在其上覆盖上述绝缘性树脂的粘着层，照射紫外线而使绝缘性树脂所包含的固化性树脂固化。然后，从模剥离绝缘性树脂，在60℃、0.5MPa下层叠与粘着层同样地制作的绝缘性树脂层（厚度15μm），制造了各实施例的各向异性导电性膜。
另一方面，随机分散有导电粒子的比较例1的各向异性导电性膜，是通过用自转公转式混合装置（（株）THINKY）来搅拌导电粒子和绝缘性树脂而得到导电粒子的分散物、以20μm形成该分散物的涂膜来制造的。
（3）多层基板的制造
利用（2）中制造的各向异性导电性膜以表1所示的层叠数量叠合（1）中准备的半导体基板，加热加压（180℃、40MPa、20秒）而制造多层基板。
（4）评价
对于所得到的多层基板，如下评价（a）导通电阻、（b）导通可靠性、（c）短路发生率。将这些结果示于表1中。
（a）导通电阻
使用数字万用表（34401A、Agilent Technologies（株））并以4端子法，流过电流1mA而测定多层基板的表面和背面的电极间的导通电阻。将测定的电阻值5Ω以下设为“OK”，超过5Ω的设为“NG”。
（b）导通可靠性
将多层基板置于温度85℃、湿度85％RH的恒温槽500小时后的导通电阻，与（a）同样地测定，将该导通电阻10Ω以下设为“OK”，超过10Ω的设为“NG”。
（c）短路发生率
将层叠的半导体基板一块一块地剥离，观察相邻的电极是否因导电粒子短路，将无短路的情况设为“OK”，哪怕有1个也设为“NG”。
[表1]
Figure 760167DEST_PATH_IMAGE002
根据表1，利用导电粒子随机分散的各向异性导电性膜来连接第1半导体基板与第2半导体基板的比较例1导通电阻或导通可靠性差，但是，将导电粒子对应于电极配置而选择性地配置的实施例1～3中导通电阻、导通可靠性、短路发生率全都良好。
此外，实施例3中，由于使得在贯通电极4内配置有3个导电粒子11，所以能够在各向异性导电性膜与半导体基板的对位上取得余地。
实施例4～11
实施例4～7中，除了在实施例1中，作为导电粒子使用表2所示的平均粒径的金/镍包覆树脂粒子（MICRO PEARL、积水化学工业（株）），并且如表2所示那样变更每个电极的导电粒子的个数、导电粒子对于电极的配置、导电粒子间的最接近距离，不是利用导电粒子的排列形成对准标记而直接将导电粒子和电极进行对位并将膜粘合以外，重复实施例1的操作从而制造各向异性导电性膜，并制造利用了各向异性导电性膜的多层基板，评价多层基板。其结果，实施例4～7的任一个中导通电阻、导通可靠性、及短路发生率都良好。此外，在实施例5、7、9中，即便没有与对准标记对应的导电粒子的排列，由于在电极的外周部也存在导电粒子，所以也能扩大膜的粘合工序中位置偏移的容许范围。
另外，实施例8～11中，将构成半导体基板的外围配置的电极（85μm间距、280端子（pin））的各个电极4的外形从φ30μm的圆形变更为30μm×50μm的矩形（电极的排列方向为30μm），并重复与实施例4～7同样的操作。其结果，实施例8～11的任一个中导通电阻、导通可靠性、及短路发生率都良好。
[表2]
Figure 483273DEST_PATH_IMAGE003
参考例1
除了使实施例1中导电粒子为平均粒径10μm的镍包覆树脂粒子（MICRO PEARL、积水化学工业（株））、使导电粒子的配置为导电粒子间距离10μm的4方格子（导电粒子的个数密度：2500个/mm2）以外，重复与实施例1同样的操作而制造各向异性导电性膜，并制造利用了各向异性导电性膜的多层基板，评价多层基板。其结果，任一种实施例的导通电阻、导通可靠性、及短路发生率都良好。
参考例2
除了使实施例1中导电粒子为平均粒径4μm的镍包覆树脂粒子（MICROPEARLAUL704、积水化学工业（株））、使导电粒子的配置为导电粒子间距离4μm的4方格子（导电粒子的个数密度：16000个/mm2）以外，重复与实施例1同样的操作从而制造各向异性导电性膜，并制造利用了各向异性导电性膜的多层基板，评价多层基板。其结果，任一种实施例的导通电阻、导通可靠性、及短路发生率都良好。
标号说明
1A、1B、1C、1D多层基板；2布线基板；3、3A、3B、3C半导体基板；4、4A、4B、4C、4x贯通电极；5焊锡球；6散热器；10A、10B、10D各向异性导电性膜；11、11x导电粒子；11u导电粒子单元；12绝缘粘接剂或绝缘粘接剂层；L导电粒子间的距离。

Claims (13)

1.一种多层基板，层叠了具有贯通电极的半导体基板，其中，
在多层基板的俯视观察中，导电粒子选择性地存在于贯通电极所对置的位置，该导电粒子除了选择性地配置于该对置的所述贯通电极之间的导电粒子（11）之外，还包括对该对置的贯通电极的连接无贡献的导电粒子（11x），
具有对置的贯通电极通过导电粒子连接、形成有该贯通电极的半导体基板彼此通过绝缘粘接剂粘接的连接构造。
2.如权利要求1所述的多层基板，是层叠具有贯通电极的第1半导体基板和具有贯通电极的第2半导体基板的多层基板，
具有第1半导体基板的贯通电极和第2半导体基板的贯通电极通过选择性地配置在它们之间的导电粒子连接的连接构造。
3.如权利要求2所述的多层基板，其中，
具有贯通电极的第3半导体基板层叠在第2半导体基板，
具有这样的连接构造：
与第1半导体基板的贯通电极连接的第2半导体基板的贯通电极，与第3半导体基板的贯通电极对置，并通过选择性地配置在它们之间的导电粒子连接，
第2半导体基板与第3半导体基板通过绝缘粘接剂粘接。
4.如权利要求1或2所述的多层基板，其中，在第1半导体基板与第2半导体基板之间，不被对置的贯通电极捕获的导电粒子的数量为存在于第1半导体基板与第2半导体基板之间的导电粒子的总数的5％以下。
5.如权利要求1或2所述的多层基板，其中，在多层基板的最外层具有散热器，散热器与由导电粒子连接从而在多层基板的层叠方向上相连的贯通电极连接。
6.一种多层基板的制造方法，使形成在半导体基板的贯通电极彼此对置并接合，其中，在具有贯通电极的半导体基板彼此之间夹住对应于贯通电极所对置的部分在多层基板的俯视观察中的位置而在绝缘粘接剂层选择性地配置导电粒子的各向异性导电性膜，对该各向异性导电性膜进行加热加压，从而各向异性导电性连接这些半导体基板，
该导电粒子除了选择性地配置于该对置的所述贯通电极之间的导电粒子（11）之外，还包括对该对置的贯通电极的连接无贡献的导电粒子（11x）。
7.如权利要求6所述的多层基板的制造方法，是对具有贯通电极的第1半导体基板和具有贯通电极的第2半导体基板，使它们的贯通电极彼此对置而接合的多层基板的制造方法，在第1半导体基板与第2半导体基板之间夹住导电粒子对应于贯通电极的配置而选择性地配置在绝缘粘接剂层的各向异性导电性膜，对该各向异性导电性膜进行加热加压，从而各向异性导电性连接第1半导体基板与第2半导体基板。
8.如权利要求6或7所述的多层基板的制造方法，其中，将具有贯通电极的第3半导体基板层叠在第2半导体基板，在与第1半导体基板的贯通电极各向异性导电性连接的第2半导体基板的贯通电极和第3半导体基板的贯通电极之间，夹住导电粒子对应于贯通电极的配置而选择性地配置在绝缘粘接剂层的各向异性导电性膜，对该各向异性导电性膜进行加热加压，从而各向异性导电性连接第2半导体基板与第3半导体基板。
9.一种各向异性导电性膜，包含绝缘粘接剂层和配置在该绝缘粘接剂层的导电粒子，其中，导电粒子对应于以各向异性导电性膜连接的对置的贯通电极的配置而选择性地配置在绝缘粘接剂层，
该导电粒子除了选择性地配置于该对置的贯通电极之间的导电粒子（11）之外，还包括对该对置的贯通电极的连接无贡献的导电粒子（11x）。
10.如权利要求9所述的各向异性导电性膜，其中，导电粒子为金属包覆树脂粒子。
11.一种各向异性导电性膜，包含绝缘粘接剂层和配置在该绝缘粘接剂层的2个以上的导电粒子接近的导电粒子单元，其中，导电粒子单元对应于以各向异性导电性膜连接的对置的贯通电极的配置而选择性地配置在绝缘粘接剂层，
该导电粒子单元除了选择性地配置于该对置的贯通电极之间的导电粒子单元之外，还包括对该对置的贯通电极的连接无贡献的导电粒子单元。
12.如权利要求11所述的各向异性导电性膜，其中，在所述导电粒子单元中，任意的导电粒子和与该导电粒子最接近的导电粒子的距离为导电粒子直径的0.2～0.5倍。
13.如权利要求11或12所述的各向异性导电性膜，其中，导电粒子为金属包覆树脂粒子。
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US20180026012A1 (en) 2018-01-25
WO2016114318A1 (ja) 2016-07-21
TW202107672A (zh) 2021-02-16
TW202312423A (zh) 2023-03-16
TW201639115A (zh) 2016-11-01
KR20170093171A (ko) 2017-08-14
JP7207382B2 (ja) 2023-01-18
CN107112314A (zh) 2017-08-29
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JP2020202409A (ja) 2020-12-17
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