JP4827851B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 251
- 238000004519 manufacturing process Methods 0.000 title claims description 30
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- 229920005989 resin Polymers 0.000 claims description 124
- 238000007789 sealing Methods 0.000 claims description 99
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- 229910000679 solder Inorganic materials 0.000 description 14
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 11
- 229910052802 copper Inorganic materials 0.000 description 11
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 229910045601 alloy Inorganic materials 0.000 description 5
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
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Description
図1(A)は、実施形態1に係る半導体装置10の概略構成を示す斜視図である。図1(B)は、図1(A)のA−A’線上の断面構造を示す断面図である。半導体装置10は、基板20と、表面をフェイスダウンした状態で基板20にフリップチップ実装された半導体チップ30と、半導体チップ30の周囲を封止する封止樹脂層40とを備える。本実施形態の半導体装置10は、基板20の裏面に複数のハンダボール50がアレイ状に配設されたBGA(Ball Grid Array)型の半導体パッケージ構造を有する。
図3は、実施形態1の半導体装置の製造方法を概略を示すフロー図である。まず、多層配線構造を有する基板を形成し(S10)、この基板の上に半導体チップを実装する(S20)。続いて、半導体チップを封止樹脂で封止する(S30)。最後に、ハンダボール、キャパシタなどを基板の裏面に実装する(S40)。
図4から図8は、実施形態1の半導体装置10の基板20の形成方法を示す工程断面図である。
図9は、実施形態1の半導体装置10の半導体チップ30の実装方法を示す工程断面図である。
図10および図11は、実施形態1の半導体装置10の封止樹脂層40の形成方法を示す工程図である。
図12(A)は、実施形態2に係る半導体装置10aの断面構造を示す。実施形態2に係る半導体装置10aの説明において、実施形態1に係る半導体装置10と同様な構成については適宜省略し、実施形態1に係る半導体装置10と異なる構成について説明する。本実施形態の半導体装置10aでは、半導体チップ30の近傍の封止樹脂層40に溝41が形成されている。これにより、半導体チップ30の裏面にTIMを介してヒートスプレッダ等を接合する際に、ヒートスプレッダ等に所定の圧力を掛けることにより半導体チップ30の裏面とヒートスプレッダ等との間から流れ出す余分なTIMを溝41に溜めることができ、余分なTIMが望ましくない部分にまで流れ出すことを阻止することができる。なお、溝41は半導体チップ30の周囲にひとつながりの状態で形成されていなくてよい。たとえば、半導体チップ30の各辺に沿って4本の溝41が設けられていてもよい。
図13(A)は、実施形態3に係る半導体装置11の概略構成を示す斜視図である。また、図13(B)は、図13(A)のA−A’線上の断面構造を示す断面図である。実施形態3に係る半導体装置11の説明において、実施形態1に係る半導体装置10と同様な構成については適宜省略し、実施形態1に係る半導体装置10と異なる構成について説明する。
図15は、実施形態4に係る半導体装置の断面構造を示す断面図である。実施形態4に係る半導体装置12の説明において、実施形態3に係る半導体装置11と同様な構成については適宜省略し、実施形態3に係る半導体装置11と異なる構成について説明する。
Claims (4)
- 基板と
前記基板に表面をフェイスダウンした状態で実装された半導体チップと、
前記半導体チップを封止する封止樹脂層と、
を備え、
前記半導体チップの裏面が前記封止樹脂から露出し、かつ前記封止樹脂層の主表面に対して凸になっており、
前記半導体チップの周囲に前記半導体チップの裏面と面一となるような前記封止樹脂層の領域があり、当該領域を囲むように前記封止樹脂層の主表面に凸状の段差が設けられているとともに、前記領域と前記段差との間に溝が形成されていることを特徴とする半導体装置。 - 前記溝の底部が前記封止樹脂層の主表面と面一である請求項1に記載の半導体装置。
- 前記段差の上面が前記半導体チップの裏面より低い請求項1または2に記載の半導体装置。
- 配線パターンが設けられた基板に表面をフェイスダウンした半導体チップをフリップチップ実装する工程と、
樹脂成型面を有する上型、および前記上型に設けられた貫通穴を型開閉方向に移動可能な可動型と基板が載置された下型とを押圧した状態で封止樹脂を充填する工程と、
を備え、
前記可動型は、前記半導体チップの裏面と接するチップ接触面と、前記チップ接触面の外側近傍に設けられた溝成型用の溝成型部と、溝成型部の外側近傍に設けられた段差形成部を有することを特徴とする半導体装置の製造方法。
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JP2007546384A JP4827851B2 (ja) | 2005-11-22 | 2006-10-30 | 半導体装置および半導体装置の製造方法 |
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PCT/JP2006/321672 WO2007060812A1 (ja) | 2005-11-22 | 2006-10-30 | 半導体装置および半導体装置の製造方法 |
JP2007546384A JP4827851B2 (ja) | 2005-11-22 | 2006-10-30 | 半導体装置および半導体装置の製造方法 |
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JP (1) | JP4827851B2 (ja) |
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JP2008192833A (ja) * | 2007-02-05 | 2008-08-21 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
JP5261072B2 (ja) * | 2008-08-21 | 2013-08-14 | Towa株式会社 | フリップチップ型の半導体チップの樹脂成形方法 |
EP2365479B1 (en) | 2010-03-08 | 2013-01-16 | GE Lighting Solutions, LLC | Rail and clip mounting for led modules for fluorescent application replacement |
SG184786A1 (en) * | 2011-04-13 | 2012-11-29 | Asahi Engineering K K | Method for manufacturing semiconductor device, resin sealing apparatus, and semiconductor device |
CN102347290A (zh) * | 2011-09-30 | 2012-02-08 | 常熟市广大电器有限公司 | 一种散热性能优良的芯片封装结构 |
US8524538B2 (en) | 2011-12-15 | 2013-09-03 | Stats Chippac Ltd. | Integrated circuit packaging system with film assistance mold and method of manufacture thereof |
US8962392B2 (en) * | 2012-03-13 | 2015-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Underfill curing method using carrier |
JP2015053469A (ja) * | 2013-08-07 | 2015-03-19 | 日東電工株式会社 | 半導体パッケージの製造方法 |
JP2015053468A (ja) * | 2013-08-07 | 2015-03-19 | 日東電工株式会社 | 半導体パッケージの製造方法 |
US9608403B2 (en) | 2014-11-03 | 2017-03-28 | International Business Machines Corporation | Dual bond pad structure for photonics |
TWI566339B (zh) * | 2014-11-11 | 2017-01-11 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
WO2016114318A1 (ja) * | 2015-01-13 | 2016-07-21 | デクセリアルズ株式会社 | 多層基板 |
US11374136B2 (en) * | 2019-09-27 | 2022-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and forming method thereof |
US11798857B2 (en) * | 2019-09-27 | 2023-10-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Composition for sacrificial film, package, manufacturing method of package |
FR3109466B1 (fr) * | 2020-04-16 | 2024-05-17 | St Microelectronics Grenoble 2 | Dispositif de support d’une puce électronique et procédé de fabrication correspondant |
CN116417353B (zh) * | 2023-04-07 | 2023-11-03 | 江苏中科智芯集成科技有限公司 | 一种半导体封装结构的制备方法 |
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JP2002009096A (ja) * | 2000-06-20 | 2002-01-11 | Apic Yamada Corp | 樹脂封止方法及び樹脂封止装置 |
JP2002026194A (ja) * | 2000-07-11 | 2002-01-25 | Rohm Co Ltd | 電子部品のパッケージ構造 |
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US6011301A (en) * | 1998-06-09 | 2000-01-04 | Stmicroelectronics, Inc. | Stress reduction for flip chip package |
JP2001308258A (ja) | 2000-04-26 | 2001-11-02 | Sony Corp | 半導体パッケージ及びその製造方法 |
US7273769B1 (en) * | 2000-08-16 | 2007-09-25 | Micron Technology, Inc. | Method and apparatus for removing encapsulating material from a packaged microelectronic device |
DE10109327A1 (de) * | 2001-02-27 | 2002-09-12 | Infineon Technologies Ag | Halbleiterchip und Herstellungsverfahren für ein Gehäuse |
US20040262781A1 (en) * | 2003-06-27 | 2004-12-30 | Semiconductor Components Industries, Llc | Method for forming an encapsulated device and structure |
US7064452B2 (en) * | 2003-11-04 | 2006-06-20 | Tai-Saw Technology Co., Ltd. | Package structure with a retarding structure and method of making same |
US7476955B2 (en) * | 2004-01-06 | 2009-01-13 | Micron Technology, Inc. | Die package having an adhesive flow restriction area |
JP4407489B2 (ja) * | 2004-11-19 | 2010-02-03 | 株式会社デンソー | 半導体装置の製造方法ならびに半導体装置の製造装置 |
JP4422094B2 (ja) * | 2005-12-12 | 2010-02-24 | 三菱電機株式会社 | 半導体装置 |
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JP2002009096A (ja) * | 2000-06-20 | 2002-01-11 | Apic Yamada Corp | 樹脂封止方法及び樹脂封止装置 |
JP2002026194A (ja) * | 2000-07-11 | 2002-01-25 | Rohm Co Ltd | 電子部品のパッケージ構造 |
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JPWO2007060812A1 (ja) | 2009-05-07 |
US20090302450A1 (en) | 2009-12-10 |
TWI379388B (ja) | 2012-12-11 |
US7880317B2 (en) | 2011-02-01 |
WO2007060812A1 (ja) | 2007-05-31 |
TW200735307A (en) | 2007-09-16 |
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