KR100934090B1 - 도전성 인터커넥트들을 갖는 반도체 컴포넌트들을 제조하기위한 후면 처리 방법 및 시스템 - Google Patents
도전성 인터커넥트들을 갖는 반도체 컴포넌트들을 제조하기위한 후면 처리 방법 및 시스템 Download PDFInfo
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- KR100934090B1 KR100934090B1 KR1020077026928A KR20077026928A KR100934090B1 KR 100934090 B1 KR100934090 B1 KR 100934090B1 KR 1020077026928 A KR1020077026928 A KR 1020077026928A KR 20077026928 A KR20077026928 A KR 20077026928A KR 100934090 B1 KR100934090 B1 KR 100934090B1
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- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53187—Multiple station assembly apparatus
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/532—Conductor
- Y10T29/53209—Terminal or connector
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- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (147)
- 반도체 컴포넌트를 제조하는 방법으로서,제1 면, 제2 면, 및 상기 제1 면 상의 기판 컨택트(substrate contact)를 갖는 기판을 제공하는 단계와,상기 제2 면에서부터 상기 기판 컨택트까지 개구(opening)를 형성하는 단계와,본딩 캐필러리(bonding capillary)를 이용하여 상기 개구에서 와이어(wire)를 포함하는 도전성 인터커넥트(conductive interconnect)를 상기 기판 컨택트에 본딩(bonding)하는 단계를 포함하는 방법.
- 제1항에 있어서,상기 본딩 단계 전에 상기 기판을 상기 제2 면에서부터 씨닝(thinning)하는 단계를 더 포함하는 방법.
- 제1항에 있어서,상기 도전성 인터커넥트는 상기 제2 면으로부터 선택된 길이만큼 돌출하는 방법.
- 제1항에 있어서,상기 기판은 복수의 기판 컨택트를 포함하고, 상기 개구는 상기 기판 컨택트들을 둘러싸는 방법.
- 반도체 컴포넌트를 제조하는 방법으로서,제1 면, 제2 면, 내면(inner surface)을 갖는 상기 제1 면 상의 제1 컨택트, 및 상기 제2 면 상의 제2 컨택트를 갖는 반도체 기판을 제공하는 단계와,상기 반도체 기판에서 상기 제2 면에서부터 상기 제1 컨택트의 상기 내면까지 기판 개구를 형성하는 단계와,상기 제1 컨택트의 상기 내면과 상기 제2 컨택트에 도전성 인터커넥트를 본딩하는 단계를 포함하는 방법.
- 제5항에 있어서,상기 도전성 인터커넥트는 와이어를 포함하고, 상기 본딩 단계는 본딩 캐필러리를 이용하여 행하는 방법.
- 제5항에 있어서,상기 도전성 인터커넥트는 플렉스 회로 도전체를 포함하고, 상기 본딩 단계는 테이프 자동화 본딩 툴을 이용하여 행하는 방법.
- 제5항에 있어서,상기 도전성 인터커넥트는 폴리머 기판 상의 터미널 컨택트(terminal contact)와 전기적으로 도통하는 폴리머 기판 상의 플렉스 회로 도전체를 포함하는 방법.
- 반도체 컴포넌트를 제조하는 방법으로서,와이어를 와이어 본딩하도록 구성된 본딩 캐필러리를 제공하는 단계와,회로면, 후면, 집적 회로, 및 내면을 갖고 상기 집적 회로와 전기적으로 도통하는 상기 회로면 상의 기판 컨택트를 갖는 반도체 기판을 제공하는 단계와,상기 반도체 기판에서 상기 후면에서부터 상기 기판 컨택트의 상기 내면까지 개구를 형성하는 단계와,상기 개구에서 상기 본딩 캐필러리를 이용하여 상기 와이어 및 상기 와이어와 상기 내면 사이의 본딩된(bonded) 커넥션을 포함하는 도전성 인터커넥트를 형성하는 단계를 포함하는 방법.
- 제9항에 있어서,상기 개구를 형성하는 단계는 상기 회로면을 보호하면서 상기 후면에서부터 상기 기판 컨택트를 종료점으로 하여 상기 기판을 에칭하는 단계를 포함하는 방법.
- 제9항에 있어서,상기 본딩된 커넥션과 상기 와이어의 적어도 일부를 봉입하는(encapsulating) 유전체 봉입제를 상기 후면 상에 형성하는 단계를 더 포함하는 방법.
- 제9항에 있어서,상기 와이어와 상기 후면 상의 후면 컨택트 사이에 제2 본딩된 커넥션을 형성하는 단계를 더 포함하는 방법.
- 제9항에 있어서,상기 와이어와 전기적으로 도통하는 도전체와, 상기 도전체와 전기적으로 도통하는 터미널 컨택트를 상기 후면 상에 형성하는 단계를 더 포함하는 방법.
- 제9항에 있어서,상기 도전성 인터커넥트를 형성하는 단계 전에 상기 내면 상에 본딩가능한(bondable) 금속층을 형성하는 단계를 더 포함하는 방법.
- 제9항에 있어서,상기 반도체 기판을 제공하는 단계는 복수의 반도체 기판을 포함하는 반도체 웨이퍼를 제공하는 단계를 포함하는 방법.
- 제9항에 있어서,지지 기판 상의 도금된(plated) 개구와 상기 와이어 사이에 제2 본딩된 커넥션을 형성하여 상기 반도체 기판을 상기 지지 기판에 부착하는 단계를 더 포함하는 방법.
- 반도체 컴포넌트를 제조하는 방법으로서,폴리머 기판과 상기 폴리머 기판 상의 플렉스 회로 도전체를 포함하는 플렉스 회로를 제공하는 단계와,회로면, 후면, 집적 회로, 및 내면을 갖고 상기 집적 회로와 전기적으로 도통하는 상기 회로면 상의 기판 컨택트를 갖는 반도체 기판을 제공하는 단계와,상기 반도체 기판에서 상기 후면에서부터 상기 기판 컨택트의 상기 내면까지 개구를 형성하는 단계와,써모드(thermode), 열압착(thermocompression) 본딩 툴 또는 열음파(thermosonic) 본딩 툴을 이용하여 상기 플렉스 회로 도전체를 상기 내면에 본딩하는 단계를 포함하는 방법.
- 적층된 반도체 컴포넌트를 제조하는 방법으로서,제1 면, 제2 면, 상기 제1 면 상의 컨택트, 및 상기 제1 면에서부터 상기 제2 면에 달하는 개구를 갖는 제1 반도체 컴포넌트를 제공하는 단계와,상기 컨택트 상의 상기 개구에서 본딩된 커넥션을 갖도록 상기 제1 반도체 컴포넌트 상에 도전성 인터커넥트를 제공하는 단계와,상기 도전성 인터커넥트와 제2 반도체 컴포넌트 상의 제2 기판 컨택트 사이에 제2 본딩된 커넥션을 형성하여 상기 제1 반도체 컴포넌트에 제2 반도체 컴포넌트를 본딩하는 단계와,상기 제1 반도체 컴포넌트와 상기 제2 반도체 컴포넌트 사이에 언더필층(underfill layer)을 형성하는 단계를 포함하는 방법.
- 제18항에 있어서,상기 도전성 인터커넥트는 와이어 본딩된 와이어를 포함하고, 상기 제2 반도체 컴포넌트는 상기 와이어를 수용하도록 구성된 도금된 개구를 포함하는 방법.
- 제18항에 있어서,상기 제1 반도체 컴포넌트는 반도체 다이를 포함하고, 상기 제2 반도체 컴포넌트는 지지 기판을 포함하는 방법.
- 제18항에 있어서,상기 제1 반도체 컴포넌트와 상기 제2 반도체 컴포넌트는 반도체 다이를 포함하는 방법.
- 제18항에 있어서,상기 제1 본딩된 커넥션은 와이어 본드 또는 테이프 자동화 본드를 포함하는 방법.
- 제18항에 있어서,상기 제1 반도체 컴포넌트는 이미지 센서 반도체 컴포넌트를 포함하는 방법.
- 제18항에 있어서,상기 제1 반도체 컴포넌트는 이미지 센서 반도체 컴포넌트를 포함하고, 상기 제2 반도체 컴포넌트는 반도체 다이를 포함하는 방법.
- 반도체 컴포넌트로서,제1 면, 제2 면, 내면을 갖는 상기 제1 면 상의 제1 기판 컨택트, 상기 제1 기판 컨택트와 전기적으로 도통하는 상기 기판 상의 집적 회로, 및 상기 제2 면 상의 제2 기판 컨택트를 갖는 반도체 기판과,상기 제2 면에서부터 상기 제1 기판 컨택트의 상기 내면까지의 기판 개구와,상기 제1 기판 컨택트의 상기 내면 상의 제1 본딩된 커넥션 및 상기 제2 기판 컨택트 상의 제2 본딩된 커넥션을 포함하는 상기 제2 면 상의 도전성 인터커넥트를 포함하고,상기 도전성 인터커넥트는 상기 제2 면에서부터, 상기 제1 면까지의, 또한 상기 집적회로까지의 신호 경로를 제공하도록 구성되는, 반도체 컴포넌트.
- 제25항에 있어서,상기 도전성 인터커넥트는 와이어를 포함하는 반도체 컴포넌트.
- 제25항에 있어서,상기 도전성 인터커넥트는 폴리머 기판 상의 플렉스 회로 도전체를 포함하는 반도체 컴포넌트.
- 제25항에 있어서,상기 도전성 인터커넥트와 전기적으로 도통하는 상기 제2 면 상의 터미널 컨택트를 더 포함하는 반도체 컴포넌트.
- 제25항에 있어서,상기 반도체 기판으로부터 상기 도전성 인터커넥트를 절연하도록 구성된 상기 기판 개구 내의 유전체층을 더 포함하는 반도체 컴포넌트.
- 반도체 컴포넌트로서,제1 면, 제2 면, 상기 제1 면 상의 기판 컨택트, 및 상기 제2 면에서부터 상기 기판 컨택트에 달하는 기판 개구를 갖는 제1 기판과,상기 기판 컨택트 상의 본딩된 커넥션을 포함하는 상기 제1 기판 상의 도전성 인터커넥트와,상기 제1 기판에 부착되고 상기 도전성 인터커넥트에 본딩되는 컨택트를 갖는 제2 기판과,상기 제1 기판과 상기 제2 기판 사이의 유전체 언더필층을 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 와이어 본딩된 와이어를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 TAB 본딩된 플렉스 회로 도전체들을 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 상기 컨택트에 본딩되는 금속 또는 폴리머 범프를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 상기 컨택트에 본딩되는 스터드 범프를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 상기 컨택트에 본딩되는 도전성 폴리머를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 제2 기판은 상기 도전성 인터커넥트에 본딩되는 제2 도전성 인터커넥트를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 제1 기판은 이미지 센서 반도체 컴포넌트를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 기판 개구는 상기 도전성 인터커넥트를 형성하기 위해서 상기 기판 컨택트에의 액세스를 제공하도록 구성되는 반도체 컴포넌트.
- 제30항에 있어서,상기 도전성 인터커넥트는 와이어 본딩된 와이어를 포함하고, 상기 컨택트는 상기 와이어를 수용하도록 구성된 도금된 개구를 포함하는 반도체 컴포넌트.
- 제30항에 있어서,상기 제2 기판은 상기 컨택트와 전기적으로 도통하는 터미널 컨택트를 포함하는 반도체 컴포넌트.
- 반도체 컴포넌트를 제조하는 시스템으로서,제1 면, 제2 면, 집적회로, 내면을 가지고 상기 집적회로와 전기적으로 도통하는 상기 제1 면 상의 기판 컨택트, 및 상기 제2 면에서부터 상기 내면에 달하는 기판 개구를 갖는 반도체 기판과,상기 제2 면에서부터, 상기 제1 면까지의, 또한 상기 집적회로까지의 신호 경로를 제공하도록, 와이어를 포함하는 도전성 인터커넥트를 상기 제2 면으로부터 상기 기판 컨택트의 상기 내면에 본딩하도록 구성된 와이어 본딩 캐필러리를 포함하는 본딩 시스템을 포함하는 반도체 컴포넌트 제조 시스템.
- 제41항에 있어서,상기 제2 면으로부터 상기 반도체 기판을 에칭하도록 구성된 에칭 시스템을 더 포함하는 반도체 컴포넌트 제조 시스템.
- 제41항에 있어서,상기 반도체 기판을 상기 제2 면으로부터 씨닝하도록 구성된 씨닝 시스템을 더 포함하는 반도체 컴포넌트 제조 시스템.
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Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/133,085 US7393770B2 (en) | 2005-05-19 | 2005-05-19 | Backside method for fabricating semiconductor components with conductive interconnects |
US11/133,085 | 2005-05-19 | ||
PCT/US2006/017036 WO2006124295A2 (en) | 2005-05-19 | 2006-05-04 | Backside method and system for fabricating semiconductor components with conductive interconnects |
Publications (2)
Publication Number | Publication Date |
---|---|
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KR100934090B1 true KR100934090B1 (ko) | 2009-12-24 |
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Application Number | Title | Priority Date | Filing Date |
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Country Status (6)
Country | Link |
---|---|
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EP (1) | EP1889285B1 (ko) |
JP (1) | JP2008546174A (ko) |
KR (1) | KR100934090B1 (ko) |
TW (1) | TWI308782B (ko) |
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Families Citing this family (103)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7371676B2 (en) * | 2005-04-08 | 2008-05-13 | Micron Technology, Inc. | Method for fabricating semiconductor components with through wire interconnects |
US7393770B2 (en) | 2005-05-19 | 2008-07-01 | Micron Technology, Inc. | Backside method for fabricating semiconductor components with conductive interconnects |
US7589406B2 (en) * | 2005-06-27 | 2009-09-15 | Micron Technology, Inc. | Stacked semiconductor component |
US7615476B2 (en) * | 2005-06-30 | 2009-11-10 | Intel Corporation | Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages |
SG130061A1 (en) * | 2005-08-24 | 2007-03-20 | Micron Technology Inc | Microelectronic devices and microelectronic support devices, and associated assemblies and methods |
US8153464B2 (en) * | 2005-10-18 | 2012-04-10 | International Rectifier Corporation | Wafer singulation process |
US7307348B2 (en) | 2005-12-07 | 2007-12-11 | Micron Technology, Inc. | Semiconductor components having through wire interconnects (TWI) |
US7659612B2 (en) * | 2006-04-24 | 2010-02-09 | Micron Technology, Inc. | Semiconductor components having encapsulated through wire interconnects (TWI) |
US7538413B2 (en) | 2006-12-28 | 2009-05-26 | Micron Technology, Inc. | Semiconductor components having through interconnects |
US7928582B2 (en) * | 2007-03-09 | 2011-04-19 | Micron Technology, Inc. | Microelectronic workpieces and methods for manufacturing microelectronic devices using such workpieces |
US9000579B2 (en) * | 2007-03-30 | 2015-04-07 | Stats Chippac Ltd. | Integrated circuit package system with bonding in via |
SG148056A1 (en) | 2007-05-17 | 2008-12-31 | Micron Technology Inc | Integrated circuit packages, methods of forming integrated circuit packages, and methods of assembling intgrated circuit packages |
US7982137B2 (en) * | 2007-06-27 | 2011-07-19 | Hamilton Sundstrand Corporation | Circuit board with an attached die and intermediate interposer |
US7705440B2 (en) * | 2007-09-07 | 2010-04-27 | Freescale Semiconductor, Inc. | Substrate having through-wafer vias and method of forming |
JP4950012B2 (ja) * | 2007-11-29 | 2012-06-13 | 力成科技股▲分▼有限公司 | シリコンスルーホールを有する半導体チップ装置及びその製造方法 |
US8018065B2 (en) * | 2008-02-28 | 2011-09-13 | Atmel Corporation | Wafer-level integrated circuit package with top and bottom side electrical connections |
US20090243051A1 (en) * | 2008-03-28 | 2009-10-01 | Micron Technology, Inc. | Integrated conductive shield for microelectronic device assemblies and associated methods |
EP2263078B1 (en) * | 2008-03-31 | 2015-05-13 | Nxp B.V. | A sensor chip and a method of manufacturing the same |
DE102008054077B4 (de) * | 2008-10-31 | 2021-04-01 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren und Vorrichtung zur Herstellung von Bonddrähten auf der Grundlage mikroelektronischer Herstellungstechniken |
US8362601B2 (en) * | 2008-12-04 | 2013-01-29 | Stats Chippac Ltd | Wire-on-lead package system having leadfingers positioned between paddle extensions and method of manufacture thereof |
US8168458B2 (en) * | 2008-12-08 | 2012-05-01 | Stats Chippac, Ltd. | Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices |
US8357998B2 (en) * | 2009-02-09 | 2013-01-22 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
US7816181B1 (en) * | 2009-06-30 | 2010-10-19 | Sandisk Corporation | Method of under-filling semiconductor die in a die stack and semiconductor device formed thereby |
FR2954588B1 (fr) * | 2009-12-23 | 2014-07-25 | Commissariat Energie Atomique | Procede d'assemblage d'au moins une puce avec un element filaire, puce electronique a element de liaison deformable, procede de fabrication d'une pluralite de puces, et assemblage d'au moins une puce avec un element filaire |
US20110192462A1 (en) * | 2010-01-03 | 2011-08-11 | Alchimer, S.A. | Solar cells |
US20110162701A1 (en) * | 2010-01-03 | 2011-07-07 | Claudio Truzzi | Photovoltaic Cells |
TWI429043B (zh) | 2010-04-26 | 2014-03-01 | Advance Materials Corp | 電路板結構、封裝結構與製作電路板的方法 |
US8742603B2 (en) | 2010-05-20 | 2014-06-03 | Qualcomm Incorporated | Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC) |
US8866267B2 (en) * | 2010-05-28 | 2014-10-21 | Alpha & Omega Semiconductor, Inc. | Semiconductor device with substrate-side exposed device-side electrode and method of fabrication |
US8987878B2 (en) | 2010-10-29 | 2015-03-24 | Alpha And Omega Semiconductor Incorporated | Substrateless power device packages |
KR20120026380A (ko) * | 2010-09-09 | 2012-03-19 | 주식회사 하이닉스반도체 | 반도체 칩, 이를 포함하는 적층 칩 구조의 반도체 패키지 및 그 제조방법 |
US8210424B2 (en) | 2010-09-16 | 2012-07-03 | Hewlett-Packard Development Company, L.P. | Soldering entities to a monolithic metallic sheet |
CN102403242B (zh) * | 2010-09-17 | 2013-06-26 | 中芯国际集成电路制造(上海)有限公司 | 一种在重新粘合过程中防止待测芯片损伤的方法 |
CN103119698B (zh) * | 2010-09-30 | 2016-05-18 | 富士电机株式会社 | 半导体装置的制造方法 |
TWI441292B (zh) * | 2011-03-02 | 2014-06-11 | 矽品精密工業股份有限公司 | 半導體結構及其製法 |
CN102832244B (zh) * | 2011-06-13 | 2015-08-26 | 万国半导体股份有限公司 | 带有衬底端裸露的器件端电极的半导体器件及其制备方法 |
US8461676B2 (en) | 2011-09-09 | 2013-06-11 | Qualcomm Incorporated | Soldering relief method and semiconductor device employing same |
JP2013232756A (ja) * | 2012-04-27 | 2013-11-14 | Sony Corp | 光学モジュール |
US8890274B2 (en) * | 2012-07-11 | 2014-11-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure for CIS flip-chip bonding and methods for forming the same |
US8907485B2 (en) | 2012-08-24 | 2014-12-09 | Freescale Semiconductor, Inc. | Copper ball bond features and structure |
US9123690B1 (en) | 2012-10-18 | 2015-09-01 | University Of South Florida | Systems and methods for forming contact definitions |
US8847412B2 (en) | 2012-11-09 | 2014-09-30 | Invensas Corporation | Microelectronic assembly with thermally and electrically conductive underfill |
KR101431918B1 (ko) | 2012-12-31 | 2014-08-19 | 삼성전기주식회사 | 인쇄회로기판 및 인쇄회로기판의 표면처리방법 |
US9214337B2 (en) | 2013-03-06 | 2015-12-15 | Rf Micro Devices, Inc. | Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same |
US20140306324A1 (en) * | 2013-03-06 | 2014-10-16 | Rf Micro Devices, Inc. | Semiconductor device with a polymer substrate and methods of manufacturing the same |
US9583414B2 (en) | 2013-10-31 | 2017-02-28 | Qorvo Us, Inc. | Silicon-on-plastic semiconductor device and method of making the same |
US9812350B2 (en) | 2013-03-06 | 2017-11-07 | Qorvo Us, Inc. | Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer |
US9257763B2 (en) | 2013-07-02 | 2016-02-09 | Gyrus Acmi, Inc. | Hybrid interconnect |
US9510739B2 (en) | 2013-07-12 | 2016-12-06 | Gyrus Acmi, Inc. | Endoscope small imaging system |
US20150189204A1 (en) * | 2013-12-27 | 2015-07-02 | Optiz, Inc. | Semiconductor Device On Cover Substrate And Method Of Making Same |
US9653442B2 (en) * | 2014-01-17 | 2017-05-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit package and methods of forming same |
US9299736B2 (en) * | 2014-03-28 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding with uniform pattern density |
CN103943516A (zh) * | 2014-04-14 | 2014-07-23 | 宁波芯健半导体有限公司 | 叠层芯片的晶圆级凸块圆片级封装方法 |
EP2996143B1 (en) | 2014-09-12 | 2018-12-26 | Qorvo US, Inc. | Printed circuit module having semiconductor device with a polymer substrate and methods of manufacturing the same |
US10085352B2 (en) | 2014-10-01 | 2018-09-25 | Qorvo Us, Inc. | Method for manufacturing an integrated circuit package |
US9530709B2 (en) | 2014-11-03 | 2016-12-27 | Qorvo Us, Inc. | Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer |
JP6663167B2 (ja) * | 2015-03-18 | 2020-03-11 | 浜松ホトニクス株式会社 | 光検出装置 |
US9613831B2 (en) | 2015-03-25 | 2017-04-04 | Qorvo Us, Inc. | Encapsulated dies with enhanced thermal performance |
US9960145B2 (en) | 2015-03-25 | 2018-05-01 | Qorvo Us, Inc. | Flip chip module with enhanced properties |
US9627224B2 (en) * | 2015-03-30 | 2017-04-18 | Stmicroelectronics, Inc. | Semiconductor device with sloped sidewall and related methods |
US20160343604A1 (en) | 2015-05-22 | 2016-11-24 | Rf Micro Devices, Inc. | Substrate structure with embedded layer for post-processing silicon handle elimination |
US10276495B2 (en) | 2015-09-11 | 2019-04-30 | Qorvo Us, Inc. | Backside semiconductor die trimming |
GB201517273D0 (en) * | 2015-09-30 | 2015-11-11 | Univ Manchester | Resist composition |
US9659848B1 (en) * | 2015-11-18 | 2017-05-23 | Invensas Corporation | Stiffened wires for offset BVA |
US10020405B2 (en) | 2016-01-19 | 2018-07-10 | Qorvo Us, Inc. | Microelectronics package with integrated sensors |
US10062583B2 (en) | 2016-05-09 | 2018-08-28 | Qorvo Us, Inc. | Microelectronics package with inductive element and magnetically enhanced mold compound component |
US10773952B2 (en) | 2016-05-20 | 2020-09-15 | Qorvo Us, Inc. | Wafer-level package with enhanced performance |
US10784149B2 (en) | 2016-05-20 | 2020-09-22 | Qorvo Us, Inc. | Air-cavity module with enhanced device isolation |
US10103080B2 (en) | 2016-06-10 | 2018-10-16 | Qorvo Us, Inc. | Thermally enhanced semiconductor package with thermal additive and process for making the same |
US10079196B2 (en) | 2016-07-18 | 2018-09-18 | Qorvo Us, Inc. | Thermally enhanced semiconductor package having field effect transistors with back-gate feature |
US20180047692A1 (en) * | 2016-08-10 | 2018-02-15 | Amkor Technology, Inc. | Method and System for Packing Optimization of Semiconductor Devices |
SG11201901193UA (en) | 2016-08-12 | 2019-03-28 | Qorvo Us Inc | Wafer-level package with enhanced performance |
CN109844938B (zh) | 2016-08-12 | 2023-07-18 | Qorvo美国公司 | 具有增强性能的晶片级封装 |
US10486965B2 (en) | 2016-08-12 | 2019-11-26 | Qorvo Us, Inc. | Wafer-level package with enhanced performance |
US10109502B2 (en) | 2016-09-12 | 2018-10-23 | Qorvo Us, Inc. | Semiconductor package with reduced parasitic coupling effects and process for making the same |
US9818791B1 (en) * | 2016-10-04 | 2017-11-14 | Omnivision Technologies, Inc. | Stacked image sensor |
US10090339B2 (en) | 2016-10-21 | 2018-10-02 | Qorvo Us, Inc. | Radio frequency (RF) switch |
US10749518B2 (en) | 2016-11-18 | 2020-08-18 | Qorvo Us, Inc. | Stacked field-effect transistor switch |
US10068831B2 (en) | 2016-12-09 | 2018-09-04 | Qorvo Us, Inc. | Thermally enhanced semiconductor package and process for making the same |
EP3355667A1 (de) * | 2017-01-30 | 2018-08-01 | Siemens Aktiengesellschaft | Verfahren zur herstellung einer elektrischen schaltung und elektrische schaltung |
US10490471B2 (en) | 2017-07-06 | 2019-11-26 | Qorvo Us, Inc. | Wafer-level packaging for enhanced performance |
US10600755B2 (en) * | 2017-08-10 | 2020-03-24 | Amkor Technology, Inc. | Method of manufacturing an electronic device and electronic device manufactured thereby |
US20190067232A1 (en) | 2017-08-31 | 2019-02-28 | Micron Technology, Inc. | Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects |
US10784233B2 (en) | 2017-09-05 | 2020-09-22 | Qorvo Us, Inc. | Microelectronics package with self-aligned stacked-die assembly |
US10366972B2 (en) | 2017-09-05 | 2019-07-30 | Qorvo Us, Inc. | Microelectronics package with self-aligned stacked-die assembly |
US11152363B2 (en) | 2018-03-28 | 2021-10-19 | Qorvo Us, Inc. | Bulk CMOS devices with enhanced performance and methods of forming the same utilizing bulk CMOS process |
US12062700B2 (en) | 2018-04-04 | 2024-08-13 | Qorvo Us, Inc. | Gallium-nitride-based module with enhanced electrical performance and process for making the same |
US12046505B2 (en) | 2018-04-20 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation |
US10804246B2 (en) | 2018-06-11 | 2020-10-13 | Qorvo Us, Inc. | Microelectronics package with vertically stacked dies |
US20200006193A1 (en) | 2018-07-02 | 2020-01-02 | Qorvo Us, Inc. | Rf devices with enhanced performance and methods of forming the same |
US10964554B2 (en) | 2018-10-10 | 2021-03-30 | Qorvo Us, Inc. | Wafer-level fan-out package with enhanced performance |
US11069590B2 (en) | 2018-10-10 | 2021-07-20 | Qorvo Us, Inc. | Wafer-level fan-out package with enhanced performance |
US11646242B2 (en) | 2018-11-29 | 2023-05-09 | Qorvo Us, Inc. | Thermally enhanced semiconductor package with at least one heat extractor and process for making the same |
US11387157B2 (en) | 2019-01-23 | 2022-07-12 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
KR20210129656A (ko) | 2019-01-23 | 2021-10-28 | 코르보 유에스, 인크. | Rf 반도체 디바이스 및 이를 형성하는 방법 |
US12046483B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12046570B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12057374B2 (en) | 2019-01-23 | 2024-08-06 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
KR102591697B1 (ko) * | 2019-03-06 | 2023-10-20 | 에스케이하이닉스 주식회사 | 하이브리드 와이어 본딩 구조를 포함한 스택 패키지 |
US12074086B2 (en) | 2019-11-01 | 2024-08-27 | Qorvo Us, Inc. | RF devices with nanotube particles for enhanced performance and methods of forming the same |
US11646289B2 (en) | 2019-12-02 | 2023-05-09 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US11923238B2 (en) | 2019-12-12 | 2024-03-05 | Qorvo Us, Inc. | Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive |
US12062571B2 (en) | 2021-03-05 | 2024-08-13 | Qorvo Us, Inc. | Selective etching process for SiGe and doped epitaxial silicon |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6528984B2 (en) * | 1996-09-13 | 2003-03-04 | Ibm Corporation | Integrated compliant probe for wafer level test and burn-in |
US20030230805A1 (en) | 2002-04-23 | 2003-12-18 | Sanyo Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
Family Cites Families (156)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3761782A (en) * | 1971-05-19 | 1973-09-25 | Signetics Corp | Semiconductor structure, assembly and method |
US4394712A (en) * | 1981-03-18 | 1983-07-19 | General Electric Company | Alignment-enhancing feed-through conductors for stackable silicon-on-sapphire wafers |
US4348253A (en) | 1981-11-12 | 1982-09-07 | Rca Corporation | Method for fabricating via holes in a semiconductor wafer |
DE3406528A1 (de) | 1984-02-23 | 1985-08-29 | Brown, Boveri & Cie Ag, 6800 Mannheim | Leistungshalbleitermodul |
US5917707A (en) | 1993-11-16 | 1999-06-29 | Formfactor, Inc. | Flexible contact structure with an electrically conductive shell |
US5476211A (en) | 1993-11-16 | 1995-12-19 | Form Factor, Inc. | Method of manufacturing electrical contacts, using a sacrificial member |
JPS62293658A (ja) * | 1986-06-12 | 1987-12-21 | Toshiba Corp | 半導体装置 |
US4807021A (en) * | 1986-03-10 | 1989-02-21 | Kabushiki Kaisha Toshiba | Semiconductor device having stacking structure |
US4897708A (en) * | 1986-07-17 | 1990-01-30 | Laser Dynamics, Inc. | Semiconductor wafer array |
US4808273A (en) | 1988-05-10 | 1989-02-28 | Avantek, Inc. | Method of forming completely metallized via holes in semiconductors |
US5229647A (en) * | 1991-03-27 | 1993-07-20 | Micron Technology, Inc. | High density data storage using stacked wafers |
US5519332A (en) | 1991-06-04 | 1996-05-21 | Micron Technology, Inc. | Carrier for testing an unpackaged semiconductor die |
US5824569A (en) * | 1992-07-15 | 1998-10-20 | Micron Technology, Inc. | Semiconductor device having ball-bonded pads |
US5496775A (en) | 1992-07-15 | 1996-03-05 | Micron Semiconductor, Inc. | Semiconductor device having ball-bonded pads |
US5432999A (en) * | 1992-08-20 | 1995-07-18 | Capps; David F. | Integrated circuit lamination process |
US5503285A (en) * | 1993-07-26 | 1996-04-02 | Litton Systems, Inc. | Method for forming an electrostatically force balanced silicon accelerometer |
US5686352A (en) * | 1993-07-26 | 1997-11-11 | Motorola Inc. | Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff |
US5483741A (en) | 1993-09-03 | 1996-01-16 | Micron Technology, Inc. | Method for fabricating a self limiting silicon based interconnect for testing bare semiconductor dice |
US6835898B2 (en) | 1993-11-16 | 2004-12-28 | Formfactor, Inc. | Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures |
US6336269B1 (en) | 1993-11-16 | 2002-01-08 | Benjamin N. Eldridge | Method of fabricating an interconnection element |
US5840199A (en) * | 1994-06-01 | 1998-11-24 | Litton Systems, Inc. | Method for purging a multi-layer sacrificial etched silicon substrate |
US5495667A (en) | 1994-11-07 | 1996-03-05 | Micron Technology, Inc. | Method for forming contact pins for semiconductor dice and interconnects |
EP1408338A3 (en) * | 1994-11-15 | 2007-09-26 | FormFactor, Inc. | Method for making a probe card with multiple contact tips for testing integrated circuits |
JPH08236586A (ja) | 1994-12-29 | 1996-09-13 | Nitto Denko Corp | 半導体装置及びその製造方法 |
US5591649A (en) * | 1995-01-19 | 1997-01-07 | Texas Instruments Incorporated | Process of removing a tape automated bonded semiconductor from bonded leads |
JP3186941B2 (ja) * | 1995-02-07 | 2001-07-11 | シャープ株式会社 | 半導体チップおよびマルチチップ半導体モジュール |
US5814889A (en) | 1995-06-05 | 1998-09-29 | Harris Corporation | Intergrated circuit with coaxial isolation and method |
US6013948A (en) * | 1995-11-27 | 2000-01-11 | Micron Technology, Inc. | Stackable chip scale semiconductor package with mating contacts on opposed surfaces |
US5674785A (en) | 1995-11-27 | 1997-10-07 | Micron Technology, Inc. | Method of producing a single piece package for semiconductor die |
US6002177A (en) | 1995-12-27 | 1999-12-14 | International Business Machines Corporation | High density integrated circuit packaging with chip stacking and via interconnections |
US5809641A (en) | 1996-04-25 | 1998-09-22 | International Business Machines Corporation | Method for printed circuit board repair |
JPH09306955A (ja) * | 1996-05-20 | 1997-11-28 | Toppan Printing Co Ltd | フィルムキャリアおよびその製造方法 |
KR100377033B1 (ko) | 1996-10-29 | 2003-03-26 | 트러시 테크날러지스 엘엘시 | Ic 및 그 제조방법 |
US6498074B2 (en) * | 1996-10-29 | 2002-12-24 | Tru-Si Technologies, Inc. | Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners |
US5866949A (en) | 1996-12-02 | 1999-02-02 | Minnesota Mining And Manufacturing Company | Chip scale ball grid array for integrated circuit packaging |
US5894983A (en) | 1997-01-09 | 1999-04-20 | Harris Corporation | High frequency, low temperature thermosonic ribbon bonding process for system-level applications |
US5925384A (en) | 1997-04-25 | 1999-07-20 | Micron Technology, Inc. | Manual pellet loader for Boschman automolds |
US5793103A (en) | 1997-05-08 | 1998-08-11 | International Business Machines Corporation | Insulated cube with exposed wire lead |
US5950070A (en) * | 1997-05-15 | 1999-09-07 | Kulicke & Soffa Investments | Method of forming a chip scale package, and a tool used in forming the chip scale package |
US5931685A (en) | 1997-06-02 | 1999-08-03 | Micron Technology, Inc. | Interconnect for making temporary electrical connections with bumped semiconductor components |
KR100211421B1 (ko) | 1997-06-18 | 1999-08-02 | 윤종용 | 중앙부가 관통된 플렉서블 회로기판을 사용한 반도체 칩 패키지 |
US6040702A (en) | 1997-07-03 | 2000-03-21 | Micron Technology, Inc. | Carrier and system for testing bumped semiconductor components |
US6097087A (en) * | 1997-10-31 | 2000-08-01 | Micron Technology, Inc. | Semiconductor package including flex circuit, interconnects and dense array external contacts |
US6740960B1 (en) * | 1997-10-31 | 2004-05-25 | Micron Technology, Inc. | Semiconductor package including flex circuit, interconnects and dense array external contacts |
US6620731B1 (en) | 1997-12-18 | 2003-09-16 | Micron Technology, Inc. | Method for fabricating semiconductor components and interconnects with contacts on opposing sides |
US6833613B1 (en) | 1997-12-18 | 2004-12-21 | Micron Technology, Inc. | Stacked semiconductor package having laser machined contacts |
US6107109A (en) | 1997-12-18 | 2000-08-22 | Micron Technology, Inc. | Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate |
US6114240A (en) * | 1997-12-18 | 2000-09-05 | Micron Technology, Inc. | Method for fabricating semiconductor components using focused laser beam |
US6105852A (en) * | 1998-02-05 | 2000-08-22 | International Business Machines Corporation | Etched glass solder bump transfer for flip chip integrated circuit devices |
US6253992B1 (en) * | 1998-03-18 | 2001-07-03 | Tessera, Inc. | Solder ball placement fixtures and methods |
JP3728918B2 (ja) * | 1998-03-25 | 2005-12-21 | セイコーエプソン株式会社 | 基板、基板の製造方法及び突起製造装置 |
US6222276B1 (en) | 1998-04-07 | 2001-04-24 | International Business Machines Corporation | Through-chip conductors for low inductance chip-to-chip integration and off-chip connections |
US6451624B1 (en) * | 1998-06-05 | 2002-09-17 | Micron Technology, Inc. | Stackable semiconductor package having conductive layer and insulating layers and method of fabrication |
US6100175A (en) * | 1998-08-28 | 2000-08-08 | Micron Technology, Inc. | Method and apparatus for aligning and attaching balls to a substrate |
US6268275B1 (en) * | 1998-10-08 | 2001-07-31 | Micron Technology, Inc. | Method of locating conductive spheres utilizing screen and hopper of solder balls |
DE19854743A1 (de) * | 1998-11-27 | 2000-06-08 | Sez Semiconduct Equip Zubehoer | Vorrichtung zum Naßätzen einer Kante einer Halbleiterscheibe |
FR2787241B1 (fr) * | 1998-12-14 | 2003-01-31 | Ela Medical Sa | Composant microelectronique cms enrobe, notamment pour un dispositif medical implantable actif, et son procede de fabrication |
KR100319609B1 (ko) * | 1999-03-09 | 2002-01-05 | 김영환 | 와이어 어래이드 칩 사이즈 패키지 및 그 제조방법 |
JP2000294677A (ja) * | 1999-04-05 | 2000-10-20 | Fujitsu Ltd | 高密度薄膜配線基板及びその製造方法 |
JP2000299334A (ja) | 1999-04-14 | 2000-10-24 | Apic Yamada Corp | 樹脂封止装置 |
DE59900743D1 (de) * | 1999-04-28 | 2002-02-28 | Sez Semiconduct Equip Zubehoer | Vorrichtung und Verfahren zur Flüssigkeitsbehandlung von scheibenförmigen Gegenständen |
DE19919716B4 (de) | 1999-04-30 | 2005-11-03 | Conti Temic Microelectronic Gmbh | Mikroelektronische Baugruppe |
US6617681B1 (en) * | 1999-06-28 | 2003-09-09 | Intel Corporation | Interposer and method of making same |
US6326689B1 (en) * | 1999-07-26 | 2001-12-04 | Stmicroelectronics, Inc. | Backside contact for touchchip |
JP2001044357A (ja) | 1999-07-26 | 2001-02-16 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JP3726579B2 (ja) * | 1999-08-20 | 2005-12-14 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
JP3687435B2 (ja) * | 1999-08-27 | 2005-08-24 | セイコーエプソン株式会社 | 半導体チップおよびその製造方法、半導体装置、コンピュータ、回路基板ならびに電子機器 |
US6316287B1 (en) * | 1999-09-13 | 2001-11-13 | Vishay Intertechnology, Inc. | Chip scale surface mount packages for semiconductor device and process of fabricating the same |
JP3859403B2 (ja) | 1999-09-22 | 2006-12-20 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2001135785A (ja) | 1999-11-08 | 2001-05-18 | Seiko Epson Corp | 半導体チップ、マルチチップパッケージ、半導体装置、および電子機器、並びにこれらの製造方法 |
WO2001043269A2 (en) * | 1999-12-06 | 2001-06-14 | L'air Liquide Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Method and apparatus for making an electrical device |
US6380555B1 (en) | 1999-12-24 | 2002-04-30 | Micron Technology, Inc. | Bumped semiconductor component having test pads, and method and system for testing bumped semiconductor components |
KR100324332B1 (ko) * | 2000-01-04 | 2002-02-16 | 박종섭 | 솔더 조인트 신뢰성을 향상시킨 비지에이 반도체 패키지및 그 제조 방법 |
JP2001308122A (ja) * | 2000-04-18 | 2001-11-02 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
US6638847B1 (en) * | 2000-04-19 | 2003-10-28 | Advanced Interconnect Technology Ltd. | Method of forming lead-free bump interconnections |
JP3292723B2 (ja) | 2000-05-26 | 2002-06-17 | アルス電子株式会社 | 半導体パッケージ及びその製造方法 |
US6717245B1 (en) | 2000-06-02 | 2004-04-06 | Micron Technology, Inc. | Chip scale packages performed by wafer level processing |
JP3879816B2 (ja) | 2000-06-02 | 2007-02-14 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器 |
US6444576B1 (en) * | 2000-06-16 | 2002-09-03 | Chartered Semiconductor Manufacturing, Ltd. | Three dimensional IC package module |
JP3916854B2 (ja) | 2000-06-28 | 2007-05-23 | シャープ株式会社 | 配線基板、半導体装置およびパッケージスタック半導体装置 |
JP3951091B2 (ja) * | 2000-08-04 | 2007-08-01 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
US6520844B2 (en) * | 2000-08-04 | 2003-02-18 | Sharp Kabushiki Kaisha | Method of thinning semiconductor wafer capable of preventing its front from being contaminated and back grinding device for semiconductor wafers |
JP2002076252A (ja) | 2000-08-31 | 2002-03-15 | Nec Kyushu Ltd | 半導体装置 |
US6577013B1 (en) | 2000-09-05 | 2003-06-10 | Amkor Technology, Inc. | Chip size semiconductor packages with stacked dies |
JP2002107382A (ja) * | 2000-09-27 | 2002-04-10 | Asahi Kasei Corp | 半導体装置およびその製造方法、並びに電流センサ |
US7132741B1 (en) | 2000-10-13 | 2006-11-07 | Bridge Semiconductor Corporation | Semiconductor chip assembly with carved bumped terminal |
US6605551B2 (en) | 2000-12-08 | 2003-08-12 | Intel Corporation | Electrocoating process to form a dielectric layer in an organic substrate to reduce loop inductance |
US20020074637A1 (en) * | 2000-12-19 | 2002-06-20 | Intel Corporation | Stacked flip chip assemblies |
US6653170B1 (en) | 2001-02-06 | 2003-11-25 | Charles W. C. Lin | Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit |
JP2002270718A (ja) * | 2001-03-07 | 2002-09-20 | Seiko Epson Corp | 配線基板及びその製造方法、半導体装置及びその製造方法、回路基板並びに電子機器 |
US6601888B2 (en) * | 2001-03-19 | 2003-08-05 | Creo Inc. | Contactless handling of objects |
US6680213B2 (en) | 2001-04-02 | 2004-01-20 | Micron Technology, Inc. | Method and system for fabricating contacts on semiconductor components |
US7108546B2 (en) | 2001-06-20 | 2006-09-19 | Formfactor, Inc. | High density planar electrical interface |
US20030006493A1 (en) * | 2001-07-04 | 2003-01-09 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and manufacturing method thereof |
US20030049925A1 (en) | 2001-09-10 | 2003-03-13 | Layman Paul Arthur | High-density inter-die interconnect structure |
JP4408598B2 (ja) | 2001-09-28 | 2010-02-03 | パナソニック株式会社 | カード型記録媒体 |
JP4014912B2 (ja) * | 2001-09-28 | 2007-11-28 | 株式会社ルネサステクノロジ | 半導体装置 |
US6727115B2 (en) * | 2001-10-31 | 2004-04-27 | Hewlett-Packard Development Company, L.P. | Back-side through-hole interconnection of a die to a substrate |
US6611052B2 (en) * | 2001-11-16 | 2003-08-26 | Micron Technology, Inc. | Wafer level stackable semiconductor package |
CA2363409A1 (en) | 2001-11-20 | 2003-05-20 | Microbonds, Inc. | A wire bonder for ball bonding insulated wire and method of using same |
JP3778079B2 (ja) * | 2001-12-20 | 2006-05-24 | 株式会社日立製作所 | 表示装置 |
KR100447869B1 (ko) | 2001-12-27 | 2004-09-08 | 삼성전자주식회사 | 다핀 적층 반도체 칩 패키지 및 이에 사용되는 리드 프레임 |
US6608370B1 (en) * | 2002-01-28 | 2003-08-19 | Motorola, Inc. | Semiconductor wafer having a thin die and tethers and methods of making the same |
US6908784B1 (en) | 2002-03-06 | 2005-06-21 | Micron Technology, Inc. | Method for fabricating encapsulated semiconductor components |
US6846738B2 (en) | 2002-03-13 | 2005-01-25 | Micron Technology, Inc. | High permeability composite films to reduce noise in high speed interconnects |
US6712261B2 (en) | 2002-03-20 | 2004-03-30 | International Business Machines Corporation | Solid conductive element insertion apparatus |
US6848177B2 (en) * | 2002-03-28 | 2005-02-01 | Intel Corporation | Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme |
US7340181B1 (en) * | 2002-05-13 | 2008-03-04 | National Semiconductor Corporation | Electrical die contact structure and fabrication method |
SG111069A1 (en) | 2002-06-18 | 2005-05-30 | Micron Technology Inc | Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods |
US7399683B2 (en) * | 2002-06-18 | 2008-07-15 | Sanyo Electric Co., Ltd. | Manufacturing method of semiconductor device |
US6998334B2 (en) * | 2002-07-08 | 2006-02-14 | Micron Technology, Inc. | Semiconductor devices with permanent polymer stencil and method for manufacturing the same |
US6803303B1 (en) | 2002-07-11 | 2004-10-12 | Micron Technology, Inc. | Method of fabricating semiconductor component having encapsulated, bonded, interconnect contacts |
US6903442B2 (en) | 2002-08-29 | 2005-06-07 | Micron Technology, Inc. | Semiconductor component having backside pin contacts |
US6885107B2 (en) * | 2002-08-29 | 2005-04-26 | Micron Technology, Inc. | Flip-chip image sensor packages and methods of fabrication |
JP2004128063A (ja) | 2002-09-30 | 2004-04-22 | Toshiba Corp | 半導体装置及びその製造方法 |
SG111972A1 (en) | 2002-10-17 | 2005-06-29 | Agency Science Tech & Res | Wafer-level package for micro-electro-mechanical systems |
JP3908146B2 (ja) | 2002-10-28 | 2007-04-25 | シャープ株式会社 | 半導体装置及び積層型半導体装置 |
US6936913B2 (en) * | 2002-12-11 | 2005-08-30 | Northrop Grumman Corporation | High performance vias for vertical IC packaging |
US6756681B1 (en) * | 2002-12-23 | 2004-06-29 | Nokia Corporation | Radio frequency integrated circuit having increased substrate resistance enabling three dimensional interconnection with feedthroughs |
WO2004064159A1 (ja) * | 2003-01-15 | 2004-07-29 | Fujitsu Limited | 半導体装置及び三次元実装半導体装置、並びに半導体装置の製造方法 |
US6824074B2 (en) * | 2003-02-18 | 2004-11-30 | Spraying Systems Co. | Air assisted spray nozzle assembly for spraying viscous liquids |
JP4544876B2 (ja) * | 2003-02-25 | 2010-09-15 | 三洋電機株式会社 | 半導体装置の製造方法 |
US6982565B2 (en) | 2003-03-06 | 2006-01-03 | Micron Technology, Inc. | Test system and test method with interconnect having semiconductor spring contacts |
US6841883B1 (en) * | 2003-03-31 | 2005-01-11 | Micron Technology, Inc. | Multi-dice chip scale semiconductor components and wafer level methods of fabrication |
TWI229890B (en) * | 2003-04-24 | 2005-03-21 | Sanyo Electric Co | Semiconductor device and method of manufacturing same |
JP3646720B2 (ja) * | 2003-06-19 | 2005-05-11 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
TWI299551B (en) | 2003-06-25 | 2008-08-01 | Via Tech Inc | Quad flat no-lead type chip carrier |
KR101078621B1 (ko) * | 2003-07-03 | 2011-11-01 | 테쎄라 테크놀로지스 아일랜드 리미티드 | 집적회로 디바이스를 패키징하기 위한 방법 및 장치 |
US7042080B2 (en) * | 2003-07-14 | 2006-05-09 | Micron Technology, Inc. | Semiconductor interconnect having compliant conductive contacts |
US7180149B2 (en) * | 2003-08-28 | 2007-02-20 | Fujikura Ltd. | Semiconductor package with through-hole |
US7224056B2 (en) * | 2003-09-26 | 2007-05-29 | Tessera, Inc. | Back-face and edge interconnects for lidded package |
DE10356885B4 (de) * | 2003-12-03 | 2005-11-03 | Schott Ag | Verfahren zum Gehäusen von Bauelementen und gehäustes Bauelement |
JP4271590B2 (ja) * | 2004-01-20 | 2009-06-03 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
JP4093186B2 (ja) | 2004-01-27 | 2008-06-04 | カシオ計算機株式会社 | 半導体装置の製造方法 |
US7129114B2 (en) * | 2004-03-10 | 2006-10-31 | Micron Technology, Inc. | Methods relating to singulating semiconductor wafers and wafer scale assemblies |
US20050205951A1 (en) * | 2004-03-18 | 2005-09-22 | Honeywell Internatioanl, Inc. | Flip chip bonded micro-electromechanical system (MEMS) device |
US20050263571A1 (en) * | 2004-05-30 | 2005-12-01 | Luc Belanger | Injection molded continuously solidified solder method and apparatus |
US7498647B2 (en) * | 2004-06-10 | 2009-03-03 | Micron Technology, Inc. | Packaged microelectronic imagers and methods of packaging microelectronic imagers |
SG145547A1 (en) | 2004-07-23 | 2008-09-29 | Micron Technology Inc | Microelectronic component assemblies with recessed wire bonds and methods of making same |
US7105918B2 (en) * | 2004-07-29 | 2006-09-12 | Micron Technology, Inc. | Interposer with flexible solder pad elements and methods of manufacturing the same |
JP2006074736A (ja) | 2004-08-02 | 2006-03-16 | Seiko Epson Corp | 圧電発振器およびその製造方法 |
KR100604049B1 (ko) * | 2004-09-01 | 2006-07-24 | 동부일렉트로닉스 주식회사 | 반도체 칩 패키지 및 그 제조방법 |
TWI234261B (en) * | 2004-09-10 | 2005-06-11 | Touch Micro System Tech | Method of forming wafer backside interconnects |
JP2006147911A (ja) | 2004-11-22 | 2006-06-08 | Renesas Technology Corp | 半導体装置、半導体装置の製造方法、および電子装置 |
JP4528100B2 (ja) * | 2004-11-25 | 2010-08-18 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
US7238999B2 (en) * | 2005-01-21 | 2007-07-03 | Honeywell International Inc. | High performance MEMS packaging architecture |
US20060170076A1 (en) * | 2005-02-02 | 2006-08-03 | Lsi Logic Corporation | Apparatus, system, and method for reducing integrated circuit peeling |
JP2006253330A (ja) | 2005-03-09 | 2006-09-21 | Sharp Corp | 半導体装置およびその製造方法 |
US7371676B2 (en) * | 2005-04-08 | 2008-05-13 | Micron Technology, Inc. | Method for fabricating semiconductor components with through wire interconnects |
US7393770B2 (en) | 2005-05-19 | 2008-07-01 | Micron Technology, Inc. | Backside method for fabricating semiconductor components with conductive interconnects |
US7589406B2 (en) | 2005-06-27 | 2009-09-15 | Micron Technology, Inc. | Stacked semiconductor component |
JP2007036104A (ja) * | 2005-07-29 | 2007-02-08 | Nec Electronics Corp | 半導体装置およびその製造方法 |
US7307348B2 (en) | 2005-12-07 | 2007-12-11 | Micron Technology, Inc. | Semiconductor components having through wire interconnects (TWI) |
JP2009523574A (ja) * | 2006-01-18 | 2009-06-25 | ザ ジェネラル ホスピタル コーポレイション | 1つ又は複数の内視鏡顕微鏡検査法を使用してデータを生成するシステム及び方法 |
US7659612B2 (en) | 2006-04-24 | 2010-02-09 | Micron Technology, Inc. | Semiconductor components having encapsulated through wire interconnects (TWI) |
KR100895813B1 (ko) * | 2007-06-20 | 2009-05-06 | 주식회사 하이닉스반도체 | 반도체 패키지의 제조 방법 |
-
2005
- 2005-05-19 US US11/133,085 patent/US7393770B2/en active Active
-
2006
- 2006-05-04 JP JP2008512322A patent/JP2008546174A/ja active Pending
- 2006-05-04 KR KR1020077026928A patent/KR100934090B1/ko active IP Right Grant
- 2006-05-04 WO PCT/US2006/017036 patent/WO2006124295A2/en active Search and Examination
- 2006-05-04 EP EP06752168.2A patent/EP1889285B1/en active Active
- 2006-05-09 TW TW095116361A patent/TWI308782B/zh active
-
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- 2008-05-03 US US12/114,761 patent/US7768096B2/en active Active
- 2008-05-03 US US12/114,757 patent/US7935991B2/en active Active
- 2008-05-09 US US12/117,919 patent/US7727872B2/en active Active
-
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- 2010-02-10 US US12/703,520 patent/US7951702B2/en active Active
-
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- 2011-03-31 US US13/076,505 patent/US8546931B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6528984B2 (en) * | 1996-09-13 | 2003-03-04 | Ibm Corporation | Integrated compliant probe for wafer level test and burn-in |
US20030230805A1 (en) | 2002-04-23 | 2003-12-18 | Sanyo Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
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KR20070122239A (ko) | 2007-12-28 |
US7768096B2 (en) | 2010-08-03 |
US20080203539A1 (en) | 2008-08-28 |
US7727872B2 (en) | 2010-06-01 |
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