JP4093186B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4093186B2 JP4093186B2 JP2004018536A JP2004018536A JP4093186B2 JP 4093186 B2 JP4093186 B2 JP 4093186B2 JP 2004018536 A JP2004018536 A JP 2004018536A JP 2004018536 A JP2004018536 A JP 2004018536A JP 4093186 B2 JP4093186 B2 JP 4093186B2
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- layer
- semiconductor structure
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- wiring
- forming
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Description
図1はこの発明の第1実施形態としての半導体装置の断面図を示す。この半導体装置は平面方形状のベース板(ベース部材)1を備えている。ベース板1は、通常、プリプレグ材と言われるもので、例えば、ガラス繊維やアラミド繊維等からなる基材にエポキシ系樹脂等の熱硬化性樹脂を含浸させたものからなっている。
図17はこの発明の第2実施形態としての半導体装置の断面図を示す。この半導体装置において、図1に示す場合と異なる点は、下層下地金属層25を含む下層配線26をベース板1の下面に設けられた銅等からなる金属31の下面全体に設け、プリプレグ材1からなるベース板1の厚さを図1の示す場合よりもある程度薄くした点である。
なお、図1では、第1の上層絶縁膜14上に設ける上層配線を2層とし、ベース板1下に設ける下層配線を1層としているが、これに限らず、第1の上層絶縁膜14上に設ける上層配線を1層または3層以上とし、また、ベース板1下に設ける下層配線を2層以上としてもよい。また、最下層の下層配線を覆う最下層絶縁膜下にチップ部品等の電子部品を最下層の下層配線の接続パッド部に接続させて搭載するようにしてもよい。
2 半導体構成体
3 シリコン基板
4 接続パッド
10 配線
11 柱状電極
12 封止膜
13 絶縁層
14 第1の上層絶縁膜
17 第1の上層配線
18 第2の上層絶縁膜
21 第2の上層配線
22 最上層絶縁膜
24 半田ボール
26 下層配線
27 下層絶縁膜
28 貫通孔
29 上下導通部
Claims (5)
- 少なくとも半硬化状態の熱硬化性樹脂を含む材料からなるベース部材形成用部材上に、各々が半導体基板、および該半導体基板上に設けられた複数の外部接続用電極および該外部接続用電極の上面と面一な上面を有し前記外部接続用電極間に設けられた封止膜を有する複数の半導体構成体を相互に離間させて配置し、他の部材の材料を介在することなく、前記ベース部材形成用部材の材料に仮固着する工程と、前記ベース部材形成用部材中の熱硬化性樹脂を硬化させてベース部材を形成するとともに、該ベース部材上に前記半導体構成体を固着させ、且つ、前記半導体構成体の周囲における前記ベース部材上に絶縁層を形成する工程と、前記半導体構成体および前記絶縁層上に少なくとも1層の上層配線を前記半導体構成体の外部接続用電極に接続させて形成する工程と、前記半導体構成体間における前記絶縁層および前記ベース部材を切断して、前記半導体構成体が少なくとも1つ含まれる半導体装置を複数個得る工程と、を有し、前記半導体構成体を仮固着する工程は、前記半導体構成体を予め加熱しておき、加熱加圧により仮固着する工程であることを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記ベース部材および前記絶縁層を形成する工程は、前記半導体構成体の周囲における前記ベース部材形成用部材上に少なくとも熱硬化性樹脂を含む材料からなる絶縁層形成用層を形成し、加熱加圧板を用いて加熱加圧することにより、前記ベース部材形成用部材中の熱硬化性樹脂を硬化させてベース部材を形成するとともに、該ベース部材上に前記半導体構成体を固着させ、且つ、前記半導体構成体の周囲における前記ベース部材上に絶縁層を形成する工程であることを特徴とする半導体装置の製造方法。
- 請求項2に記載の発明において、前記ベース部材および前記絶縁層を形成する工程は、前記ベース部材形成用部材下に金属を配置し、加熱加圧により、前記ベース部材下に前記金属を固着させる工程を含むことを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記ベース部材形成用部材はプリプレグ材であることを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記半導体構成体は、前記外部接続用電極としての柱状電極を有するものであることを特徴とする半導体装置の製造方法。
Priority Applications (6)
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JP2004018536A JP4093186B2 (ja) | 2004-01-27 | 2004-01-27 | 半導体装置の製造方法 |
US11/037,423 US7112469B2 (en) | 2004-01-27 | 2005-01-18 | Method of fabricating a semiconductor package utilizing a thermosetting resin base member |
TW094102223A TWI266394B (en) | 2004-01-27 | 2005-01-26 | Semiconductor device and method of fabricating the same |
KR1020050006929A KR100595890B1 (ko) | 2004-01-27 | 2005-01-26 | 반도체장치 및 그 제조방법 |
CNB2005100058732A CN100383965C (zh) | 2004-01-27 | 2005-01-27 | 半导体器件及其制造方法 |
US11/457,360 US7550843B2 (en) | 2004-01-27 | 2006-07-13 | Semiconductor device including a base member and a semiconductor constructing body directly fixed to thermosetting resin of the base member |
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JP (1) | JP4093186B2 (ja) |
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2004
- 2004-01-27 JP JP2004018536A patent/JP4093186B2/ja not_active Expired - Lifetime
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- 2005-01-26 KR KR1020050006929A patent/KR100595890B1/ko not_active IP Right Cessation
- 2005-01-26 TW TW094102223A patent/TWI266394B/zh not_active IP Right Cessation
- 2005-01-27 CN CNB2005100058732A patent/CN100383965C/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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CN1649139A (zh) | 2005-08-03 |
US20060244136A1 (en) | 2006-11-02 |
KR20050077271A (ko) | 2005-08-01 |
US7112469B2 (en) | 2006-09-26 |
US20050161803A1 (en) | 2005-07-28 |
JP2005216936A (ja) | 2005-08-11 |
KR100595890B1 (ko) | 2006-06-30 |
US7550843B2 (en) | 2009-06-23 |
TW200531237A (en) | 2005-09-16 |
CN100383965C (zh) | 2008-04-23 |
TWI266394B (en) | 2006-11-11 |
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