JP4771510B2 - 半導体層の製造方法及び基板の製造方法 - Google Patents

半導体層の製造方法及び基板の製造方法 Download PDF

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JP4771510B2
JP4771510B2 JP2004185237A JP2004185237A JP4771510B2 JP 4771510 B2 JP4771510 B2 JP 4771510B2 JP 2004185237 A JP2004185237 A JP 2004185237A JP 2004185237 A JP2004185237 A JP 2004185237A JP 4771510 B2 JP4771510 B2 JP 4771510B2
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layer
separation
substrate
semiconductor layer
semiconductor
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Expired - Fee Related
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JP2004185237A
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Japanese (ja)
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JP2006012986A5 (enExample
JP2006012986A (ja
Inventor
芳信 関口
隆夫 米原
誠 古藤
昌宏 奥田
哲也 嶋田
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Canon Inc
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Canon Inc
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Priority to JP2004185237A priority Critical patent/JP4771510B2/ja
Priority to US10/566,170 priority patent/US7399693B2/en
Priority to PCT/JP2005/011388 priority patent/WO2006001285A1/en
Priority to TW094120284A priority patent/TWI304599B/zh
Publication of JP2006012986A publication Critical patent/JP2006012986A/ja
Publication of JP2006012986A5 publication Critical patent/JP2006012986A5/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/32Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
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    • H10H20/018Bonding of wafers

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  • Engineering & Computer Science (AREA)
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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2004185237A 2004-06-23 2004-06-23 半導体層の製造方法及び基板の製造方法 Expired - Fee Related JP4771510B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004185237A JP4771510B2 (ja) 2004-06-23 2004-06-23 半導体層の製造方法及び基板の製造方法
US10/566,170 US7399693B2 (en) 2004-06-23 2005-06-15 Semiconductor film manufacturing method and substrate manufacturing method
PCT/JP2005/011388 WO2006001285A1 (en) 2004-06-23 2005-06-15 Semiconductor film manufacturing method and substrate manufacturing method
TW094120284A TWI304599B (en) 2004-06-23 2005-06-17 Semiconductor film manufacturing method and substrate manufacturing method

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Application Number Priority Date Filing Date Title
JP2004185237A JP4771510B2 (ja) 2004-06-23 2004-06-23 半導体層の製造方法及び基板の製造方法

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JP2006012986A JP2006012986A (ja) 2006-01-12
JP2006012986A5 JP2006012986A5 (enExample) 2007-08-09
JP4771510B2 true JP4771510B2 (ja) 2011-09-14

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JP (1) JP4771510B2 (enExample)
TW (1) TWI304599B (enExample)
WO (1) WO2006001285A1 (enExample)

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