JP3984020B2 - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP3984020B2
JP3984020B2 JP2001324141A JP2001324141A JP3984020B2 JP 3984020 B2 JP3984020 B2 JP 3984020B2 JP 2001324141 A JP2001324141 A JP 2001324141A JP 2001324141 A JP2001324141 A JP 2001324141A JP 3984020 B2 JP3984020 B2 JP 3984020B2
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JP
Japan
Prior art keywords
gate electrode
floating gate
conductors
insulator
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001324141A
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English (en)
Japanese (ja)
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JP2002203919A (ja
JP2002203919A5 (enExample
Inventor
誠一 森
充宏 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001324141A priority Critical patent/JP3984020B2/ja
Priority to US09/984,599 priority patent/US6713834B2/en
Priority to KR10-2001-0066992A priority patent/KR100483416B1/ko
Publication of JP2002203919A publication Critical patent/JP2002203919A/ja
Priority to US10/728,818 priority patent/US6806132B2/en
Priority to US10/869,392 priority patent/US7061069B2/en
Priority to US10/868,927 priority patent/US20040229422A1/en
Publication of JP2002203919A5 publication Critical patent/JP2002203919A5/ja
Priority to US11/373,982 priority patent/US7420259B2/en
Application granted granted Critical
Publication of JP3984020B2 publication Critical patent/JP3984020B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6894Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having one gate at least partly in a trench
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2001324141A 2000-10-30 2001-10-22 不揮発性半導体記憶装置 Expired - Fee Related JP3984020B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2001324141A JP3984020B2 (ja) 2000-10-30 2001-10-22 不揮発性半導体記憶装置
KR10-2001-0066992A KR100483416B1 (ko) 2000-10-30 2001-10-30 반도체 장치 및 그 제조 방법
US09/984,599 US6713834B2 (en) 2000-10-30 2001-10-30 Semiconductor device having two-layered charge storage electrode
US10/728,818 US6806132B2 (en) 2000-10-30 2003-12-08 Semiconductor device having two-layered charge storage electrode
US10/869,392 US7061069B2 (en) 2000-10-30 2004-06-17 Semiconductor device having two-layered charge storage electrode
US10/868,927 US20040229422A1 (en) 2000-10-30 2004-06-17 Semiconductor device having two-layered charge storage electrode
US11/373,982 US7420259B2 (en) 2000-10-30 2006-03-14 Semiconductor device having two-layered charge storage electrode

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000331407 2000-10-30
JP2000-331407 2000-10-30
JP2001324141A JP3984020B2 (ja) 2000-10-30 2001-10-22 不揮発性半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2002203919A JP2002203919A (ja) 2002-07-19
JP2002203919A5 JP2002203919A5 (enExample) 2004-07-29
JP3984020B2 true JP3984020B2 (ja) 2007-09-26

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JP2001324141A Expired - Fee Related JP3984020B2 (ja) 2000-10-30 2001-10-22 不揮発性半導体記憶装置

Country Status (3)

Country Link
US (5) US6713834B2 (enExample)
JP (1) JP3984020B2 (enExample)
KR (1) KR100483416B1 (enExample)

Families Citing this family (107)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002176114A (ja) * 2000-09-26 2002-06-21 Toshiba Corp 半導体装置及びその製造方法
JP2002217318A (ja) * 2001-01-19 2002-08-02 Sony Corp 不揮発性半導体記憶素子及びその製造方法
US6762092B2 (en) 2001-08-08 2004-07-13 Sandisk Corporation Scalable self-aligned dual floating gate memory cell array and methods of forming the array
US6781189B2 (en) * 2002-01-22 2004-08-24 Micron Technology, Inc. Floating gate transistor with STI
KR101110191B1 (ko) 2002-06-19 2012-02-15 쌘디스크 코포레이션 스케일 낸드용 인접셀들 사이의 크로스 커플링을 실드하기위한 딥 워드라인 트렌치
US6894930B2 (en) * 2002-06-19 2005-05-17 Sandisk Corporation Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND
US6703272B2 (en) * 2002-06-21 2004-03-09 Micron Technology, Inc. Methods of forming spaced conductive regions, and methods of forming capacitor constructions
JP4412903B2 (ja) * 2002-06-24 2010-02-10 株式会社ルネサステクノロジ 半導体装置
JP2004055803A (ja) * 2002-07-19 2004-02-19 Renesas Technology Corp 半導体装置
KR20040011016A (ko) * 2002-07-26 2004-02-05 동부전자 주식회사 알에프 반도체소자 제조방법
TW544786B (en) * 2002-07-29 2003-08-01 Nanya Technology Corp Floating gate and method therefor
KR100448911B1 (ko) * 2002-09-04 2004-09-16 삼성전자주식회사 더미 패턴을 갖는 비휘발성 기억소자
US6908817B2 (en) * 2002-10-09 2005-06-21 Sandisk Corporation Flash memory array with increased coupling between floating and control gates
KR100537276B1 (ko) * 2002-11-18 2005-12-19 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR20050085361A (ko) * 2002-12-06 2005-08-29 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 플로팅 게이트 유형의 반도체 디바이스 및 제조 방법과그러한 반도체 디바이스를 포함하는 비휘발성 메모리
KR100880340B1 (ko) 2002-12-20 2009-01-28 주식회사 하이닉스반도체 플래쉬 메모리 소자의 제조 방법
KR100526463B1 (ko) * 2003-05-07 2005-11-08 매그나칩 반도체 유한회사 반도체 소자의 제조 방법
JP3964828B2 (ja) 2003-05-26 2007-08-22 株式会社東芝 半導体装置
US7105406B2 (en) * 2003-06-20 2006-09-12 Sandisk Corporation Self aligned non-volatile memory cell and process for fabrication
JP2005072380A (ja) * 2003-08-26 2005-03-17 Toshiba Corp 不揮発性半導体記憶装置、その製造方法、電子カード及び電子装置
US6943118B2 (en) * 2003-09-18 2005-09-13 Macronix International Co., Ltd. Method of fabricating flash memory
US7221008B2 (en) 2003-10-06 2007-05-22 Sandisk Corporation Bitline direction shielding to avoid cross coupling between adjacent cells for NAND flash memory
US7202523B2 (en) * 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
US7183153B2 (en) * 2004-03-12 2007-02-27 Sandisk Corporation Method of manufacturing self aligned non-volatile memory cells
KR100589058B1 (ko) * 2004-03-16 2006-06-12 삼성전자주식회사 불휘발성 메모리 장치 및 이를 형성하기 위한 방법
JP2005277171A (ja) * 2004-03-25 2005-10-06 Toshiba Corp 半導体装置およびその製造方法
JP2005332885A (ja) 2004-05-18 2005-12-02 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
US7371638B2 (en) * 2004-05-24 2008-05-13 Samsung Electronics Co., Ltd. Nonvolatile memory cells having high control gate coupling ratios using grooved floating gates and methods of forming same
KR100621628B1 (ko) * 2004-05-31 2006-09-19 삼성전자주식회사 비휘발성 기억 셀 및 그 형성 방법
JP2006012871A (ja) * 2004-06-22 2006-01-12 Nec Electronics Corp 不揮発性半導体記憶装置及びその製造方法
US7388251B2 (en) * 2004-08-11 2008-06-17 Micron Technology, Inc. Non-planar flash memory array with shielded floating gates on silicon mesas
TWI249846B (en) * 2004-08-23 2006-02-21 Winbond Electronics Corp Memory device
US20060043463A1 (en) * 2004-09-01 2006-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Floating gate having enhanced charge retention
US7183161B2 (en) * 2004-09-17 2007-02-27 Freescale Semiconductor, Inc. Programming and erasing structure for a floating gate memory cell and method of making
US7094645B2 (en) * 2004-09-17 2006-08-22 Freescale Semiconductor, Inc. Programming and erasing structure for a floating gate memory cell and method of making
JP2006108310A (ja) * 2004-10-04 2006-04-20 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
US7518179B2 (en) * 2004-10-08 2009-04-14 Freescale Semiconductor, Inc. Virtual ground memory array and method therefor
US7381615B2 (en) 2004-11-23 2008-06-03 Sandisk Corporation Methods for self-aligned trench filling with grown dielectric for high coupling ratio in semiconductor devices
US7402886B2 (en) * 2004-11-23 2008-07-22 Sandisk Corporation Memory with self-aligned trenches for narrow gap isolation regions
US7482223B2 (en) * 2004-12-22 2009-01-27 Sandisk Corporation Multi-thickness dielectric for semiconductor memory
US8384148B2 (en) * 2004-12-22 2013-02-26 Micron Technology, Inc. Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling
EP1675181A1 (en) * 2004-12-22 2006-06-28 STMicroelectronics S.r.l. Methode of making a non-volatile MOS semiconductor memory device
US7840895B2 (en) * 2005-03-07 2010-11-23 Computer Associates Think, Inc. System and method for data manipulation
JP4113199B2 (ja) * 2005-04-05 2008-07-09 株式会社東芝 半導体装置
JP4488947B2 (ja) 2005-04-08 2010-06-23 株式会社東芝 不揮発性半導体記憶装置の製造方法
KR100674971B1 (ko) * 2005-04-27 2007-01-26 삼성전자주식회사 U자형 부유 게이트를 가지는 플래시 메모리 제조방법
US7335939B2 (en) 2005-05-23 2008-02-26 Infineon Technologies Ag Semiconductor memory device and method of production
KR100645067B1 (ko) * 2005-07-04 2006-11-10 삼성전자주식회사 플로팅 게이트를 갖는 비휘발성 기억 소자 및 그 형성 방법
KR100824400B1 (ko) * 2005-07-08 2008-04-22 삼성전자주식회사 비휘발성 기억 소자 및 그 형성 방법
US7619270B2 (en) * 2005-07-25 2009-11-17 Freescale Semiconductor, Inc. Electronic device including discontinuous storage elements
US7112490B1 (en) * 2005-07-25 2006-09-26 Freescale Semiconductor, Inc. Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench
US7642594B2 (en) * 2005-07-25 2010-01-05 Freescale Semiconductor, Inc Electronic device including gate lines, bit lines, or a combination thereof
US7619275B2 (en) * 2005-07-25 2009-11-17 Freescale Semiconductor, Inc. Process for forming an electronic device including discontinuous storage elements
US7582929B2 (en) * 2005-07-25 2009-09-01 Freescale Semiconductor, Inc Electronic device including discontinuous storage elements
DE102005038939B4 (de) * 2005-08-17 2015-01-08 Qimonda Ag Halbleiterspeicherbauelement mit oberseitig selbstjustiert angeordneten Wortleitungen und Verfahren zur Herstellung von Halbleiterspeicherbauelementen
KR101088061B1 (ko) 2005-10-24 2011-11-30 삼성전자주식회사 플로팅 게이트를 갖는 비휘발성 기억 소자 및 그 형성 방법
JP2007081189A (ja) * 2005-09-15 2007-03-29 Elpida Memory Inc 半導体記憶装置及びその製造方法
US7541240B2 (en) * 2005-10-18 2009-06-02 Sandisk Corporation Integration process flow for flash devices with low gap fill aspect ratio
JP2007134598A (ja) * 2005-11-11 2007-05-31 Toshiba Corp 半導体装置の製造方法
KR100669346B1 (ko) 2005-11-11 2007-01-16 삼성전자주식회사 플로팅 게이트를 갖는 비휘발성 기억 소자 및 그 형성 방법
JP2007157854A (ja) * 2005-12-01 2007-06-21 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
EP1818989A3 (en) * 2006-02-10 2010-12-01 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor storage device and manufacturing method thereof
EP1835530A3 (en) * 2006-03-17 2009-01-28 Samsung Electronics Co., Ltd. Non-volatile memory device and method of manufacturing the same
KR101488516B1 (ko) * 2006-03-21 2015-02-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 불휘발성 반도체 기억장치
JP2007288175A (ja) * 2006-03-21 2007-11-01 Semiconductor Energy Lab Co Ltd 不揮発性半導体記憶装置
TWI416738B (zh) * 2006-03-21 2013-11-21 Semiconductor Energy Lab 非揮發性半導體記憶體裝置
EP1837917A1 (en) * 2006-03-21 2007-09-26 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
EP1837900A3 (en) * 2006-03-21 2008-10-15 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
US7592224B2 (en) 2006-03-30 2009-09-22 Freescale Semiconductor, Inc Method of fabricating a storage device including decontinuous storage elements within and between trenches
US7786526B2 (en) * 2006-03-31 2010-08-31 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
US7554854B2 (en) * 2006-03-31 2009-06-30 Semiconductor Energy Laboratory Co., Ltd. Method for deleting data from NAND type nonvolatile memory
US8022460B2 (en) * 2006-03-31 2011-09-20 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
JP2007294911A (ja) * 2006-03-31 2007-11-08 Semiconductor Energy Lab Co Ltd 不揮発性半導体記憶装置
EP1840947A3 (en) * 2006-03-31 2008-08-13 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
JP5483659B2 (ja) * 2006-03-31 2014-05-07 株式会社半導体エネルギー研究所 半導体装置
JP2007335750A (ja) * 2006-06-16 2007-12-27 Toshiba Corp 半導体記憶装置
US7977190B2 (en) 2006-06-21 2011-07-12 Micron Technology, Inc. Memory devices having reduced interference between floating gates and methods of fabricating such devices
JP5400378B2 (ja) 2006-06-30 2014-01-29 富士通セミコンダクター株式会社 半導体装置と半導体装置の製造方法
EP2054925A2 (en) * 2006-08-16 2009-05-06 SanDisk Corporation Nonvolatile memories with shaped floating gates
US20080074920A1 (en) * 2006-09-21 2008-03-27 Henry Chien Nonvolatile Memory with Reduced Coupling Between Floating Gates
US7615445B2 (en) * 2006-09-21 2009-11-10 Sandisk Corporation Methods of reducing coupling between floating gates in nonvolatile memory
US8652912B2 (en) * 2006-12-08 2014-02-18 Micron Technology, Inc. Methods of fabricating a transistor gate including cobalt silicide
US7572699B2 (en) * 2007-01-24 2009-08-11 Freescale Semiconductor, Inc Process of forming an electronic device including fins and discontinuous storage elements
US7838922B2 (en) * 2007-01-24 2010-11-23 Freescale Semiconductor, Inc. Electronic device including trenches and discontinuous storage elements
US7651916B2 (en) * 2007-01-24 2010-01-26 Freescale Semiconductor, Inc Electronic device including trenches and discontinuous storage elements and processes of forming and using the same
JP2008218604A (ja) * 2007-03-02 2008-09-18 Nec Electronics Corp 半導体装置
US7745285B2 (en) 2007-03-30 2010-06-29 Sandisk Corporation Methods of forming and operating NAND memory with side-tunneling
KR100885891B1 (ko) * 2007-04-30 2009-02-26 삼성전자주식회사 비휘발성 메모리 소자 및 이의 제조 방법
JP5282372B2 (ja) * 2007-05-11 2013-09-04 ソニー株式会社 表示装置及び電子機器
KR20090047211A (ko) * 2007-11-07 2009-05-12 삼성전자주식회사 도전 패턴의 형성 방법 및 이를 이용한 반도체 소자의 제조방법
KR101402890B1 (ko) * 2007-11-30 2014-06-27 삼성전자주식회사 비휘발성 기억 소자 및 그 형성 방법
JP2009152498A (ja) * 2007-12-21 2009-07-09 Toshiba Corp 不揮発性半導体メモリ
JP2010004020A (ja) * 2008-05-19 2010-01-07 Toshiba Corp 不揮発性半導体記憶装置およびその製造方法
US7935608B2 (en) * 2008-06-02 2011-05-03 Qimonda Ag Storage cell having a T-shaped gate electrode and method for manufacturing the same
JP5522915B2 (ja) 2008-09-30 2014-06-18 ローム株式会社 半導体記憶装置およびその製造方法
US7973353B2 (en) * 2009-02-09 2011-07-05 United Microelectronics Corp. NAND memory cells
KR101096388B1 (ko) * 2009-12-30 2011-12-20 주식회사 하이닉스반도체 불휘발성 메모리 소자 및 이의 제조 방법
JP2012043856A (ja) * 2010-08-16 2012-03-01 Toshiba Corp 半導体装置およびその製造方法
KR20120121722A (ko) * 2011-04-27 2012-11-06 에스케이하이닉스 주식회사 반도체 소자 및 그 형성 방법
CN104752356B (zh) * 2013-12-25 2018-07-06 北京兆易创新科技股份有限公司 一种或非型闪存的浮栅的制作方法
JP5781190B2 (ja) * 2014-04-07 2015-09-16 ローム株式会社 半導体記憶装置
CN106972022B (zh) * 2016-01-11 2019-10-29 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制作方法、电子装置
TWI629749B (zh) * 2016-11-24 2018-07-11 旺宏電子股份有限公司 半導體元件及其製造方法與記憶體的製造方法
CN108717931A (zh) * 2018-05-23 2018-10-30 武汉新芯集成电路制造有限公司 一种改善浮栅缺陷的方法及半导体结构
CN110838490A (zh) * 2018-08-17 2020-02-25 北京兆易创新科技股份有限公司 一种浮栅存储器的制备方法和浮栅存储器
US10886287B2 (en) * 2019-01-14 2021-01-05 Globalfoundries Inc. Multiple-time programmable (MTP) memory device with a wrap-around control gate
US12009435B2 (en) * 2021-09-13 2024-06-11 International Business Machines Corporation Integrated nanosheet field effect transistors and floating gate memory cells

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10335497A (ja) 1997-06-04 1998-12-18 Sony Corp 半導体不揮発性記憶装置およびその製造方法
US6342715B1 (en) * 1997-06-27 2002-01-29 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
JPH11163304A (ja) * 1997-11-28 1999-06-18 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
US5963824A (en) * 1997-07-09 1999-10-05 Advanced Micro Devices, Inc. Method of making a semiconductor device with adjustable threshold voltage
JPH1187543A (ja) 1997-09-10 1999-03-30 Toshiba Corp 不揮発性半導体記憶装置
JPH11186419A (ja) * 1997-12-25 1999-07-09 Toshiba Corp 不揮発性半導体記憶装置
JPH11261038A (ja) 1998-03-11 1999-09-24 Sony Corp 半導体不揮発性記憶装置およびその製造方法
JP4237344B2 (ja) * 1998-09-29 2009-03-11 株式会社東芝 半導体装置及びその製造方法
TW490860B (en) 1998-12-24 2002-06-11 United Microelectronics Corp Manufacturing of flash memory cell
JP3314748B2 (ja) 1999-02-09 2002-08-12 日本電気株式会社 不揮発性半導体記憶装置の製造方法
TW407381B (en) * 1999-03-01 2000-10-01 United Microelectronics Corp Manufacture of the flash memory cell
US6153494A (en) 1999-05-12 2000-11-28 Taiwan Semiconductor Manufacturing Company Method to increase the coupling ratio of word line to floating gate by lateral coupling in stacked-gate flash
US6391722B1 (en) * 2001-07-13 2002-05-21 Vanguard International Semiconductor Corporation Method of making nonvolatile memory having high capacitive coupling ratio

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US6713834B2 (en) 2004-03-30
US20060163637A1 (en) 2006-07-27
US20040080020A1 (en) 2004-04-29
US20040229422A1 (en) 2004-11-18
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US7061069B2 (en) 2006-06-13
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