JP2016508295A - テンプレート画像マッチングを用いたウェーハ上の欠陥検出 - Google Patents
テンプレート画像マッチングを用いたウェーハ上の欠陥検出 Download PDFInfo
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- 238000010894 electron beam technology Methods 0.000 claims abstract description 19
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- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/20—Special algorithmic details
- G06T2207/20004—Adaptive image processing
- G06T2207/20012—Locally adaptive
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- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
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Abstract
Description
Claims (20)
- ウェーハ上の欠陥を検出するためのコンピュータ実行方法であって、
ウェーハ上に形成されるデバイスについての情報を用いて、少なくとも一部の画素が差分特性を有する前記デバイス内の領域に関連付けられたテンプレート画像を生成する工程と、
前記ウェーハのために電子ビーム検査システムの出力を取得する工程と、
前記テンプレート画像及び前記出力のパターンに基づいて前記テンプレート画像を前記出力にマッチングさせる工程と、
前記出力内の前記画素にマッチングする前記テンプレート画像の前記画素に関連付けられる前記領域に基づいて、前記出力内の画素が位置付けられる前記領域を識別する工程と、
前記ウェーハ上の欠陥を検出するために、前記画素が位置付けられる前記領域に基づいて、欠陥検出パラメータを前記出力内の前記画素に適用する工程と、
を含み、
前記生成する工程、前記取得する工程、前記マッチングさせる工程、前記識別する工程、及び前記適用する工程はコンピュータシステムを用いて実行される、
ことを特徴とする方法。 - 前記情報は前記デバイスの設計データを備える、
ことを特徴とする請求項1に記載の方法。 - 前記情報は前記ウェーハ上に形成される前記デバイスの高分解画像を備える、
ことを特徴とする請求項1に記載の方法。 - 前記テンプレート画像内の前記画素は、前記取得する工程の前に関連付けられる前記領域を決定する工程を更に備える、
ことを特徴とする請求項1に記載の方法。 - 前記デバイスの特性、検出したい欠陥、既知の擬似欠陥、又はそれらの組み合わせに基づいて、前記テンプレート画像中の前記画素が関連付けられる前記領域を決定する工程を更に備える、
ことを特徴とする請求項1に記載の方法。 - 前記領域の少なくとも1つは前記デバイスの繰り返しメモリセル構造内の単一のコンタクトだけに対応する、
ことを特徴とする請求項1に記載の方法。 - 前記領域の少なくとも一部は前記デバイスの繰り返しメモリセル構造内の異なるタイプのコンタクトに対応する、
ことを特徴とする請求項1に記載の方法。 - 前記領域の少なくとも1つは前記デバイスの繰り返しメモリセル構造内のコンタクト間の酸化物領域に対応し、且つ前記適用させる工程は前記酸化物領域のためには実行されない、
ことを特徴とする請求項1に記載の方法。 - 前記デバイスに関する前記情報を用いて複数のテンプレート画像を生成する工程を更に備え、前記複数のテンプレート画像のそれぞれは、前記電子ビーム検査システムのための複数の画素サイズ及び光学条件の1つために生成される、
ことを特徴とする請求項1に記載の方法。 - 前記テンプレート画像は前記デバイスのアレイ領域内の1つの単位セルに対応し、且つ前記マッチングさせる工程は前記パターンに基づいて前記テンプレート画像を前記アレイ領域内の1つの単位セルに対応する前記出力の前記画素にマッチングさせる工程並びに前記単位セル及び前記アレイ領域に関する情報に基づいて前記アレイ領域全体のマッチングを広げる工程と、を備える、
ことを特徴とする請求項1に記載の方法。 - 前記テンプレート画像は前記デバイスのアレイ領域内の単位セルに対応し、且つ前記マッチングさせる工程は前記アレイ領域の検査領域内の単位セルの全体の行及び列に対して実行される、
ことを特徴とする請求項1に記載の方法。 - 前記テンプレート画像は前記デバイスのアレイ領域内の単位セルに対応し、且つ前記マッチングさせる工程は前記アレイ領域内の全ての単位セルに対して実行される、
ことを特徴とする請求項1に記載の方法。 - 前記識別する工程は、前記テンプレート画像をマッチングさせる前記出力内の前記画素上の領域分割スキームに重ね合わせる工程を備える、
ことを特徴とする請求項1に記載の方法。 - 前記欠陥検出パラメータは、前記領域の1つ以上において及び前記欠陥検出が実行されるべき前記領域に対して欠陥検出を実行するか否かに関わらず、前記画素が位置する前記領域に依存する閾値を備え、前記閾値は前記出力の画素とレファレンス画素との間の差に適用される、
ことを特徴とする請求項1に記載の方法。 - 前記適用する工程は、前記デバイスのアレイ領域内の複数の単位セルに対応する前記出力の複数の画素を平均化してレファレンス画像を生成する工程と、前記複数の単位セルのうちの1つに対応する前記出力内のテスト画像から前記レファレンス画像を差し引いて差分画像を生成する工程と、前記差分画像内の画素が位置付けられる前記領域に基づいて、前記欠陥検出パラメータを前記差分画像に適用する工程と、を備える、
ことを特徴とする請求項1に記載の方法。 - 前記検出された欠陥を、それらが位置付けられる前記領域に自動的に関連付ける工程を更に備える、
ことを特徴とする請求項1に記載の方法。 - 前記検出された欠陥を、それらが位置付けられる前記領域に基づいて分類する工程を更に備える、
ことを特徴とする請求項1に記載の方法。 - 前記デバイス内の各コンタクトのタイプは前記領域の異なる1つに関連付けられ、前記方法は、前記各コンタクトのタイプで前記検出された欠陥の密度を表示する工程を更に備える、
ことを特徴とする請求項1に記載の方法。 - コンピュータシステムにウェーハ上の欠陥を検出するためのコンピュータ実行方法を実行させるように、格納されたプログラム命令を含む非一時的なコンピュータ可読媒体であって、前記コンピュータ実行方法は、
ウェーハ上に形成されるデバイスについての情報を用いて、少なくとも一部の画素が差分特性を有する前記デバイス内の領域に関連付けられたテンプレート画像を生成する工程と、
前記ウェーハのための電子ビーム検査システムの出力を取得する工程と、
前記テンプレート画像及び前記出力のパターンに基づいて前記テンプレート画像を前記出力にマッチングさせる工程と、
前記出力内の前記画素とマッチングする前記テンプレート画像の前記画素に関連付けられた前記領域に基づいて、前記出力内の画素が位置付けられる前記領域を識別する工程と、
前記ウェーハ上の欠陥を検出するために、前記画素が位置付けられる前記領域に基づいて、欠陥検出パラメータを前記出力内の前記画素に適用する工程と、
を含むことを特徴とするコンピュータ実行方法。 - ウェーハ上の欠陥を検出するように構成されたシステムであって、
ウェーハのための出力を取得するように構成された電子ビーム検査サブシステムと、
コンピュータサブシステムと、
を備え、
前記コンピュータサブシステムは、
ウェーハ上に形成されるデバイスについての情報を用いて、少なくとも一部の画素が差分特性を有する前記デバイス内の領域に関連付けられたテンプレート画像を生成し、
前記テンプレート画像及び前記出力のパターンに基づいて前記テンプレート画像を前記出力にマッチングさせ、
前記出力内の前記画素とマッチングする前記テンプレート画像の前記画素に関連付けられた前記領域に基づいて、前記出力内の画素が位置付けられる前記領域を識別し、
前記ウェーハ上の欠陥を検出するために、前記画素が位置付けられる前記領域に基づいて、欠陥検出パラメータを前記出力内の前記画素に適用する、
ように構成されることを特徴とするシステム。
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US13/737,677 | 2013-01-09 | ||
US13/737,677 US9311698B2 (en) | 2013-01-09 | 2013-01-09 | Detecting defects on a wafer using template image matching |
PCT/US2014/010743 WO2014110178A1 (en) | 2013-01-09 | 2014-01-08 | Detecting defects on a wafer using template image matching |
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JP2016508295A true JP2016508295A (ja) | 2016-03-17 |
JP2016508295A5 JP2016508295A5 (ja) | 2017-02-09 |
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US (1) | US9311698B2 (ja) |
EP (1) | EP2943976A4 (ja) |
JP (1) | JP6230622B2 (ja) |
KR (1) | KR102055968B1 (ja) |
TW (1) | TWI588475B (ja) |
WO (1) | WO2014110178A1 (ja) |
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EP2943976A4 (en) | 2016-09-07 |
TW201447287A (zh) | 2014-12-16 |
KR102055968B1 (ko) | 2019-12-13 |
KR20150103706A (ko) | 2015-09-11 |
EP2943976A1 (en) | 2015-11-18 |
WO2014110178A1 (en) | 2014-07-17 |
TWI588475B (zh) | 2017-06-21 |
US9311698B2 (en) | 2016-04-12 |
US20140193065A1 (en) | 2014-07-10 |
JP6230622B2 (ja) | 2017-11-15 |
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