JP2010518538A5 - - Google Patents

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JP2010518538A5
JP2010518538A5 JP2009548552A JP2009548552A JP2010518538A5 JP 2010518538 A5 JP2010518538 A5 JP 2010518538A5 JP 2009548552 A JP2009548552 A JP 2009548552A JP 2009548552 A JP2009548552 A JP 2009548552A JP 2010518538 A5 JP2010518538 A5 JP 2010518538A5
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memory cell
voltage
source line
precharging
selection device
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JP5279729B2 (ja
JP2010518538A (ja
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Priority claimed from PCT/CA2008/000232 external-priority patent/WO2008095294A1/en
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JP2009548552A 2007-02-07 2008-02-06 ソース側非対称プリチャージプログラム方式 Expired - Fee Related JP5279729B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US88863807P 2007-02-07 2007-02-07
US60/888,638 2007-02-07
PCT/CA2008/000232 WO2008095294A1 (en) 2007-02-07 2008-02-06 Source side asymmetrical precharge programming scheme

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JP2011009708A Division JP5476572B2 (ja) 2007-02-07 2011-01-20 ソース側非対称プリチャージプログラム方式

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JP2010518538A JP2010518538A (ja) 2010-05-27
JP2010518538A5 true JP2010518538A5 (enExample) 2011-03-10
JP5279729B2 JP5279729B2 (ja) 2013-09-04

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JP2011009708A Expired - Fee Related JP5476572B2 (ja) 2007-02-07 2011-01-20 ソース側非対称プリチャージプログラム方式

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US (3) US7952929B2 (enExample)
EP (2) EP2490225A1 (enExample)
JP (2) JP5279729B2 (enExample)
KR (1) KR101444491B1 (enExample)
CN (2) CN103137200A (enExample)
CA (1) CA2672245A1 (enExample)
TW (1) TWI483253B (enExample)
WO (1) WO2008095294A1 (enExample)

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