JP2008147628A5 - - Google Patents

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Publication number
JP2008147628A5
JP2008147628A5 JP2007270800A JP2007270800A JP2008147628A5 JP 2008147628 A5 JP2008147628 A5 JP 2008147628A5 JP 2007270800 A JP2007270800 A JP 2007270800A JP 2007270800 A JP2007270800 A JP 2007270800A JP 2008147628 A5 JP2008147628 A5 JP 2008147628A5
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Japan
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substrate
die
edge
major
semiconductor package
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JP2007270800A
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JP5383024B2 (ja
JP2008147628A (ja
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Priority claimed from US11/608,164 external-priority patent/US7608921B2/en
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JP2007270800A 2006-12-07 2007-10-18 多層半導体パッケージ Active JP5383024B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/608,164 US7608921B2 (en) 2006-12-07 2006-12-07 Multi-layer semiconductor package
US11/608,164 2006-12-07

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012193098A Division JP5620956B2 (ja) 2006-12-07 2012-09-03 半導体パッケージおよびその製造方法

Publications (3)

Publication Number Publication Date
JP2008147628A JP2008147628A (ja) 2008-06-26
JP2008147628A5 true JP2008147628A5 (enExample) 2010-12-02
JP5383024B2 JP5383024B2 (ja) 2014-01-08

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JP2007270800A Active JP5383024B2 (ja) 2006-12-07 2007-10-18 多層半導体パッケージ
JP2012193098A Active JP5620956B2 (ja) 2006-12-07 2012-09-03 半導体パッケージおよびその製造方法

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JP2012193098A Active JP5620956B2 (ja) 2006-12-07 2012-09-03 半導体パッケージおよびその製造方法

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US (2) US7608921B2 (enExample)
JP (2) JP5383024B2 (enExample)
KR (1) KR101517541B1 (enExample)
TW (2) TWI366910B (enExample)

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