1264101 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種覆晶接合技術，特別係有關於一 種熱壓合接合晶片之覆晶封裝方法，以解決習知熱壓合過 程一基板受熱翹曲導致封膠困難之問題。 【先前技術】 覆日日接合（fhp-chip bonding)技術已普遍運用在半導 體晶片之封裝領域中，其係將一凸塊化晶片（bumpedchip) 結合至一基板。而覆晶接合的方法可更進一步區分為銲料 回銲與熱壓合兩者方式，以達到晶片與基板之間電性互 連。其中熱壓合方式即是在壓合時提供加熱熱能與溫度， 使晶片之複數個凸塊能一次結合並電性連接至基板，不須 將已接合好晶片之基板放進迴銲爐進行加熱。 本國專利申請案號〇9212〇518號「堆疊晶片封裝構造 及其製造方法」揭示一種以熱壓合方式達到覆晶接合之技 術’一第一晶片係先黏貼於一基板，將一第二晶片置於該 第一晶片之上方，以熱壓合方式使第二晶片與第一晶片接 合在一起，並以一封膠體包覆第一晶片、第二晶片與基板 之上表面一部分。其中熱壓合方法係可藉由一異方性導電 膠層或是採行超音波熱壓合。由於第一晶片與第二晶片之 間無熱膨服係數之差異’在熱壓合時晶片之間無翹曲變形 之問題，但其型態必須是多晶片的封裝結構。若直接將晶 片熱壓合至一基板’則基板會翹曲導致封膠之困難。 請參閱第1圖，習知利用熱壓合之覆晶封裝製程中， 5 1264101 一例如B T樹脂基板之基板11 0係置於一加熱板14 〇上， ‘ 利用一熱壓合頭1 3 0吸附一晶片1 20使其位於該基板1丄〇 • 之上方並提供熱壓合溫度，同時藉由該加熱板140加熱該 基板11 0 ’以利在熱壓合該晶片1 2 0之複數彳固凸塊1 2 1 (例 ‘ 如金凸塊）銲接至該基板110上的鍍錫連接墊m，以達到 該晶片120與該基板110兩者的電性連接。由於目前之該 加熱板1 4 0係以全面接觸方式加熱該基板1 1 〇，因此該基 板110受到熱應力會有翹曲變形之情事，容易造成後續之 熱壓合及封膠製程失敗。請參閱第2圖，在熱壓合之後， 該基板110仍是翹曲，導致該晶片120與該基板11〇之間 • 隙無法保持一致，例如往中央方向間隔變小。在後續之封 . 膠作業中，一由塗膠針頭150提供之底部填充膠 l6〇(underfill material)係先點塗於該晶片no之側面邊 緣，利用適當加熱與膠流動的毛細作用使其填充於該晶片 120與該基板11 〇之間之間隙，由於該間隙之誤差變化會 • 導致該底部填充膠I60之流動速度不同，會有回包現象， 導致該底部填充膠160之内部生成氣泡161，影響熱壓合 覆晶封裝產品之可靠性（reliability)。 【發明内容】 本發明之主要目的係在於提供一種熱壓合接合晶片 之覆晶封裝方法，在覆晶接合之熱壓合過程中，由位在一 基板下方之一加熱板所提供之加熱溫度係低於由一熱壓 合頭提供予一晶片之加熱溫度，並且該加熱板之一加熱面 係不大於該基板之下表面，並且該加熱板之該加熱面係對 6 1264101 準於該基板之—覆晶接合區下方，以局部加熱該基板，因 此該基板未受熱的部位則能作4該基板之熱應力釋放部 位，防止該基板過度翹曲，以利後續封膠作業之進行。 本發明揭示一種熱廢合接合晶片之覆晶封裝方法，提 供一基板，該基板係具有複數個連接墊，該些連接墊係形 成於-覆晶接合㈣；提供—晶片，該晶片係具有複數個 凸塊；進行一熱壓合步驟，藉由一熱壓合頭加熱該晶片至 一第一加熱溫度，並藉由一加熱板加熱該基板至一第二加 熱溫度，該第二加熱溫度係低於該第一加熱溫度，以使該 曰曰片之該些凸塊接合至該基板之該些連接墊，其中該加熱 板之一加熱面係不大於該基板之下表面，並且該加熱板: 該加熱面係對準於該基板之該覆晶接合區下方，以局部加 熱該基板，防止該基板過度翹曲；最後，進行一封膠步驟， 以密封該些凸塊。 【實施方式】 在本發明之一具體實施例中所例舉之一種熱壓合接 合晶片之覆晶封裝方法係說明如下。 凊參閱第3圖，提供一基板2丨〇，該基板2丨〇係可選 用BT或其它樹脂之一種印刷電路板。該基板21〇係具有 一上表面211與一下表面212,並具有複數個連接墊213。 其中該上表面2 11係定義有一覆晶接合區2丨4，以供晶片 接合。該些連接墊213係形成於該覆晶接合區214内。在 本貫施例中，該基板2 1 〇之該些連接墊2 1 3上係鍍有一錫 層215。並且，提供一晶片22〇，該晶片22〇係具有複數 1264101 個凸塊22卜該些凸塊221係形成於—主動面：^上。其 中該些凸塊221係可為金&塊，可與該錫層215產生共晶 接合。此外，該些金質凸塊22i係可為矩陣排列，以達高 密度排列。 請再參閱第3®，在進行—熱壓合步驟中，—熱壓合 頭230係吸附該晶片220並移動至位於該基板21〇之該覆 晶接合區214之上方。藉由該熱壓合頭23〇加熱該晶片22〇 至第加熱皿度，该第一加熱溫度係可介於3〇〇°C〜500 °C。而該基板210係放置於一加熱板24〇上，通常該加熱 板240係為硬質的高導熱金屬板。並藉由該加熱板24〇加 熱該基板210至一第二加熱溫度，該第二加熱溫度係低於 該第一加熱溫度，其中該第二加熱溫度係可介於5〇它〜丨5〇 c。故使得該晶片220之該些凸塊221能接合至該基板21〇 之该些連接墊2 1 3。此外，該加熱板240係具有一可導熱 接觸名基板2 1 0之加熱面24 1，該加熱面24 1係不大於該 基板210之該下表面212，並且該加熱板24〇之該加熱面 241係對準於該基板21〇之該覆晶接合區214之下方，以 局部加熱該基板210。較佳地，該加熱板240之該加熱面 241係略大於該基板210之該覆晶接合區214，以供局部 加熱該覆晶接合區214即可。在本實施例中，該加熱板240 之尺寸係不大於該晶片22〇。由於，該加熱板240於熱壓 合過程中僅局部加熱該基板2 1 0，因此該基板2 1 0之該下 表面212周緣將形成一外露散熱區216，其係不被該加熱 板240加熱，可作為該基板2丨〇之熱應力釋放部位，以防 1264101 止该基板210過度翹曲。如第4圖所示，於熱壓合之後， 該晶片220之該主動面222與該基板21〇之該上表面2ιι 之間的間隙將可保持一致，以利後續之封膠作業。 之後，進行一封膠步驟。請參閱第4圖，在封膠步驟 中，形成一底部填充膠25〇於該晶片22〇與該基板之 間以氆封该些凸塊221。由於該晶片220與該基板210 之間隙一致，該底部填充膠25〇將容易地流佈於該晶片 與該基板210之間，以密封該些凸i鬼221而不會形成氣 泡，以提昇熱壓合覆晶封裝產品之可靠性。 本發明之保護範圍當視後附之申請專利範圍所界定 者為準’任何熟知此項技藝者，在不脫離本發明之精神和 範圍内所作之任何戀化盥攸 7變化與修改，均屬於本發明之保護範 圍。 【圖式簡單說明】 第 1圖： :在習 知覆 晶 封裴 製 程 中 基板 之截 面 不意 圖 0 第 2圖： :在習 知覆 晶 封裝 製 程 中 圖。 第 3圖 :依據 本發 明 之一 具 體 實 熱 合 製程中封膠時該基板之截面示意 圖 ‘例，在一種覆晶封裝製 曰曰片至一基板之截面示意 第4圖·依據本發明之一呈 體貫施例，在该覆晶封裝製程 中封膠時該基板之截面示意圖。 【主要元件符號說明】 1264101 110基板 111連接墊 120 晶片 121 凸 130 加熱板 140 熱 160 底部填充 膠 161 氣 210 基板 211 上 213 連接墊 214 覆 216 外露散熱 區 220 晶片 221 凸 230 熱壓合頭 240 加 250 底部填充 膠 塊 壓合頭 150 塗膠針頭 泡 表面 212 下表面 晶接合區 215 錫層 塊 222 主動面 熱板 241 加熱面1264101 IX. Description of the Invention: [Technical Field] The present invention relates to a flip chip bonding technique, and more particularly to a flip chip packaging method for a thermocompression bonding wafer to solve a conventional thermal compression bonding process The problem of sealing is caused by heat warping. [Prior Art] Fhp-chip bonding technology has been widely used in the field of semiconductor wafer packaging by bonding a bumped chip to a substrate. The method of flip chip bonding can be further divided into solder reflow and thermocompression to achieve electrical interconnection between the wafer and the substrate. The hot pressing method provides heating heat and temperature during pressing, so that a plurality of bumps of the wafer can be combined and electrically connected to the substrate at one time, and the substrate with the bonded wafer is not required to be placed in the reflow furnace for heating. . National Patent Application No. 9212〇518, “Stacked Chip Package Structure and Method of Manufacturing the Same” discloses a technique for achieving flip chip bonding by thermocompression bonding. A first wafer is first adhered to a substrate, and a second wafer is bonded. The second wafer is bonded to the first wafer by thermocompression bonding on the first wafer, and the first wafer, the second wafer and a portion of the upper surface of the substrate are covered with a gel. The thermal compression bonding method can be performed by an anisotropic conductive adhesive layer or by ultrasonic compression bonding. Since there is no difference in thermal expansion coefficient between the first wafer and the second wafer, there is no problem of warpage between the wafers during thermocompression bonding, but the pattern must be a multi-wafer package structure. If the wafer is directly thermocompression bonded to a substrate, the substrate warps to cause difficulty in sealing. Referring to FIG. 1 , in the flip chip packaging process using thermal compression bonding, 5 1264101, a substrate 10 0 such as a BT resin substrate is placed on a heating plate 14 ,, 'using a thermal compression head 1 3 0 Adsorbing a wafer 1 20 over the substrate 1 and providing a thermocompression temperature while heating the substrate 11 0 ' by the heating plate 140 to facilitate thermocompression bonding of the wafer 1 2 0 A solid bump 1 2 1 (eg, a gold bump) is soldered to the tin-plated connection pad m on the substrate 110 to achieve electrical connection between the wafer 120 and the substrate 110. Since the heating plate 140 currently heats the substrate 1 1 全面 in a full contact manner, the substrate 110 is warped and deformed by thermal stress, which may easily cause subsequent thermal compression and sealing process failure. Referring to Fig. 2, after the thermocompression bonding, the substrate 110 is still warped, so that the gap between the wafer 120 and the substrate 11 is not uniform, for example, the spacing in the center direction becomes smaller. In the subsequent sealing operation, an underfill material provided by the rubberizing needle 150 is first applied to the side edge of the wafer no, and is filled by capillary action of appropriate heating and gel flow. In the gap between the wafer 120 and the substrate 11 ,, the error of the gap may cause the flow velocity of the underfill I60 to be different, and there is a back-packing phenomenon, which causes bubbles to be generated inside the underfill 160. , affecting the reliability of the thermocompression flip chip packaged product. SUMMARY OF THE INVENTION The main object of the present invention is to provide a flip chip packaging method for thermocompression bonding wafers, in the thermal lamination process of flip chip bonding, the heating temperature provided by a heating plate located under a substrate Lower than the heating temperature provided by a thermocompression bonding head to a wafer, and one heating surface of the heating plate is not larger than the lower surface of the substrate, and the heating surface of the heating plate is aligned with the substrate. Under the flip-chip bonding region, the substrate is locally heated, so that the unheated portion of the substrate can be used as the thermal stress releasing portion of the substrate, thereby preventing the substrate from excessively warping, so as to facilitate the subsequent sealing operation. The invention discloses a flip chip packaging method for thermally dissipating bonded wafers, and provides a substrate having a plurality of connection pads formed on a flip chip bonding (4); providing a wafer having a plurality of a bump; performing a thermal compression step of heating the wafer to a first heating temperature by a thermocompression bonding head and heating the substrate to a second heating temperature by a heating plate, the second heating temperature system Lower than the first heating temperature, so that the bumps of the die are bonded to the connection pads of the substrate, wherein one heating surface of the heating plate is not larger than the lower surface of the substrate, and the heating plate The heating surface is aligned under the flip-chip bonding region of the substrate to locally heat the substrate to prevent excessive warpage of the substrate. Finally, a bonding step is performed to seal the bumps. [Embodiment] A flip chip packaging method of a thermocompression bonding wafer exemplified in one embodiment of the present invention is explained below. Referring to Fig. 3, a substrate 2 is provided which is a printed circuit board of BT or other resin. The substrate 21 has an upper surface 211 and a lower surface 212 and has a plurality of connection pads 213. Wherein the upper surface 2 11 defines a flip-chip bonding region 2 丨 4 for wafer bonding. The connection pads 213 are formed in the flip chip bonding region 214. In the present embodiment, the connection pads 2 1 3 of the substrate 2 1 are plated with a tin layer 215 . Further, a wafer 22 is provided, the wafer 22 having a plurality of 1264101 bumps 22 formed on the active surface. The bumps 221 may be gold & blocks that can be eutectic bonded to the tin layer 215. In addition, the gold bumps 22i may be arranged in a matrix to be arranged at a high density. Referring again to the third embodiment, in the performing the thermocompression bonding step, the thermocompression bonding head 230 adsorbs the wafer 220 and moves over the crystalline bonding region 214 of the substrate 21A. The wafer 22 is heated to a heating degree by the thermocompression bonding head 23, and the first heating temperature may be between 3 ° C and 500 ° C. The substrate 210 is placed on a heating plate 24, which is usually a rigid high thermal conductivity metal plate. And heating the substrate 210 to a second heating temperature by the heating plate 24, wherein the second heating temperature is lower than the first heating temperature, wherein the second heating temperature is between 5 〇 and 丨5〇 c. Therefore, the bumps 221 of the wafer 220 can be bonded to the connection pads 2 1 3 of the substrate 21 . In addition, the heating plate 240 has a heating surface 24 1 that can thermally contact the name substrate 210, the heating surface 24 1 is not larger than the lower surface 212 of the substrate 210, and the heating surface 24 is heated. The 241 is aligned below the flip chip junction region 214 of the substrate 21 to locally heat the substrate 210. Preferably, the heating surface 241 of the heating plate 240 is slightly larger than the flip chip bonding region 214 of the substrate 210 for locally heating the flip chip bonding region 214. In the present embodiment, the size of the heating plate 240 is not greater than the size of the wafer 22〇. Because the heating plate 240 only locally heats the substrate 210 during the thermocompression process, the periphery of the lower surface 212 of the substrate 210 will form an exposed heat dissipation region 216, which is not heated by the heating plate 240. It can be used as the thermal stress relief portion of the substrate 2 to prevent the substrate 210 from excessive warping. As shown in FIG. 4, after the thermal pressing, the gap between the active surface 222 of the wafer 220 and the upper surface 2 ι of the substrate 21 can be kept consistent to facilitate subsequent sealing operations. After that, a glue step is performed. Referring to FIG. 4, in the sealing step, an underfill 25 is formed between the wafer 22 and the substrate to seal the bumps 221. Since the gap between the wafer 220 and the substrate 210 is uniform, the underfill 25 〇 will be easily flowed between the wafer and the substrate 210 to seal the convex 221 without forming bubbles to enhance the hot pressing. The reliability of the flip chip packaged product. The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications of the affiliation that are made without departing from the spirit and scope of the invention are The scope of protection of the present invention. [Simple description of the diagram] Figure 1: The cross-section of the substrate in the conventional flip-chip sealing process is not intended. Figure 2: Figure 2: In the conventional flip-chip packaging process. FIG. 3 is a cross-sectional view showing a cross-sectional view of a substrate in a flip-chip package according to an embodiment of the present invention. FIG. 4 is a cross-sectional view of a flip-chip package to a substrate. FIG. A cross-sectional view of the substrate during the flip-chip encapsulation process. [Main component symbol description] 1264101 110 substrate 111 connection pad 120 wafer 121 convex 130 heating plate 140 heat 160 underfill 161 gas 210 substrate 211 upper 213 connection pad 214 cover 216 exposed heat sink 220 wafer 221 convex 230 hot press head 240 Add 250 bottom filling block press head 150 glue needle head surface 212 lower surface crystal joint area 215 tin layer block 222 active surface hot plate 241 heating surface