JP2002031883A5 - - Google Patents

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Publication number
JP2002031883A5
JP2002031883A5 JP2000215092A JP2000215092A JP2002031883A5 JP 2002031883 A5 JP2002031883 A5 JP 2002031883A5 JP 2000215092 A JP2000215092 A JP 2000215092A JP 2000215092 A JP2000215092 A JP 2000215092A JP 2002031883 A5 JP2002031883 A5 JP 2002031883A5
Authority
JP
Japan
Prior art keywords
wiring
integrated circuit
hole pattern
circuit device
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000215092A
Other languages
English (en)
Japanese (ja)
Other versions
JP3983960B2 (ja
JP2002031883A (ja
Filing date
Publication date
Priority claimed from JP2000215092A external-priority patent/JP3983960B2/ja
Priority to JP2000215092A priority Critical patent/JP3983960B2/ja
Application filed filed Critical
Priority to TW090116490A priority patent/TW558756B/zh
Priority to KR1020010042259A priority patent/KR100698989B1/ko
Priority to US09/904,591 priority patent/US6403413B2/en
Publication of JP2002031883A publication Critical patent/JP2002031883A/ja
Priority to US10/142,063 priority patent/US6750496B2/en
Publication of JP2002031883A5 publication Critical patent/JP2002031883A5/ja
Publication of JP3983960B2 publication Critical patent/JP3983960B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2000215092A 2000-07-14 2000-07-14 半導体集積回路装置の製造方法および半導体集積回路装置 Expired - Fee Related JP3983960B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000215092A JP3983960B2 (ja) 2000-07-14 2000-07-14 半導体集積回路装置の製造方法および半導体集積回路装置
TW090116490A TW558756B (en) 2000-07-14 2001-07-05 Method for manufacturing semiconductor integrated circuit device and semiconductor integrated circuit device
KR1020010042259A KR100698989B1 (ko) 2000-07-14 2001-07-13 반도체 집적 회로 장치의 제조 방법 및 반도체 집적 회로장치
US09/904,591 US6403413B2 (en) 2000-07-14 2001-07-16 Manufacturing method of semiconductor integrated circuit device having a capacitor
US10/142,063 US6750496B2 (en) 2000-07-14 2002-05-10 Manufacturing method of semiconductor integrated circuit device, and semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000215092A JP3983960B2 (ja) 2000-07-14 2000-07-14 半導体集積回路装置の製造方法および半導体集積回路装置

Publications (3)

Publication Number Publication Date
JP2002031883A JP2002031883A (ja) 2002-01-31
JP2002031883A5 true JP2002031883A5 (enExample) 2005-02-03
JP3983960B2 JP3983960B2 (ja) 2007-09-26

Family

ID=18710571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000215092A Expired - Fee Related JP3983960B2 (ja) 2000-07-14 2000-07-14 半導体集積回路装置の製造方法および半導体集積回路装置

Country Status (4)

Country Link
US (2) US6403413B2 (enExample)
JP (1) JP3983960B2 (enExample)
KR (1) KR100698989B1 (enExample)
TW (1) TW558756B (enExample)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100438782B1 (ko) * 2001-12-29 2004-07-05 삼성전자주식회사 반도체 소자의 실린더형 커패시터 제조방법
US7233887B2 (en) * 2002-01-18 2007-06-19 Smith Bruce W Method of photomask correction and its optimization using localized frequency analysis
JP2003273245A (ja) * 2002-03-15 2003-09-26 Hitachi Ltd 半導体記憶装置
US6649945B1 (en) 2002-10-18 2003-11-18 Kabushiki Kaisha Toshiba Wiring layout to weaken an electric field generated between the lines exposed to a high voltage
KR100505656B1 (ko) * 2002-12-10 2005-08-04 삼성전자주식회사 스토리지 전극과의 접촉 면적을 보다 확보하기 위해서비트 라인 방향으로 확장된 콘택체를 포함하는 반도체소자 제조 방법
TWI250558B (en) * 2003-10-23 2006-03-01 Hynix Semiconductor Inc Method for fabricating semiconductor device with fine patterns
US7430731B2 (en) * 2003-12-31 2008-09-30 University Of Southern California Method for electrochemically fabricating three-dimensional structures including pseudo-rasterization of data
KR100656497B1 (ko) * 2004-02-09 2006-12-11 삼성에스디아이 주식회사 유기전계발광표시장치 및 그의 제조방법
US7126182B2 (en) * 2004-08-13 2006-10-24 Micron Technology, Inc. Memory circuitry
JP4936659B2 (ja) * 2004-12-27 2012-05-23 株式会社東芝 半導体装置の製造方法
JP5030131B2 (ja) * 2004-12-28 2012-09-19 エスケーハイニックス株式会社 ナンドフラッシュメモリ素子
KR100577542B1 (ko) * 2005-03-11 2006-05-10 삼성전자주식회사 매몰콘택 플러그를 갖는 반도체소자의 제조방법
JP4750525B2 (ja) * 2005-10-14 2011-08-17 キヤノン株式会社 露光方法及びデバイス製造方法
KR100706817B1 (ko) 2006-03-13 2007-04-12 삼성전자주식회사 비휘발성 메모리 장치 및 그 형성 방법
KR100722769B1 (ko) * 2006-05-19 2007-05-30 삼성전자주식회사 상변화 메모리 장치 및 이의 형성 방법
US8201128B2 (en) * 2006-06-16 2012-06-12 Cadence Design Systems, Inc. Method and apparatus for approximating diagonal lines in placement
JP2008042085A (ja) * 2006-08-09 2008-02-21 Matsushita Electric Ind Co Ltd 半導体記憶装置およびその製造方法
JP4352068B2 (ja) * 2006-09-08 2009-10-28 株式会社東芝 露光方法及び半導体装置の製造方法
US7742324B2 (en) * 2008-02-19 2010-06-22 Micron Technology, Inc. Systems and devices including local data lines and methods of using, making, and operating the same
US8866254B2 (en) 2008-02-19 2014-10-21 Micron Technology, Inc. Devices including fin transistors robust to gate shorts and methods of making the same
US9190494B2 (en) * 2008-02-19 2015-11-17 Micron Technology, Inc. Systems and devices including fin field-effect transistors each having U-shaped semiconductor fin
JP4635085B2 (ja) 2008-03-03 2011-02-16 株式会社東芝 半導体装置の製造方法
JP4834784B2 (ja) * 2008-03-03 2011-12-14 株式会社東芝 半導体装置の製造方法
US7915659B2 (en) 2008-03-06 2011-03-29 Micron Technology, Inc. Devices with cavity-defined gates and methods of making the same
US8546876B2 (en) 2008-03-20 2013-10-01 Micron Technology, Inc. Systems and devices including multi-transistor cells and methods of using, making, and operating the same
US7808042B2 (en) * 2008-03-20 2010-10-05 Micron Technology, Inc. Systems and devices including multi-gate transistors and methods of using, making, and operating the same
US7898857B2 (en) 2008-03-20 2011-03-01 Micron Technology, Inc. Memory structure having volatile and non-volatile memory portions
US7969776B2 (en) * 2008-04-03 2011-06-28 Micron Technology, Inc. Data cells with drivers and methods of making and operating the same
KR101442175B1 (ko) * 2008-05-23 2014-09-18 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 메모리 셀 어레이의 배치방법
US8076229B2 (en) * 2008-05-30 2011-12-13 Micron Technology, Inc. Methods of forming data cells and connections to data cells
US8148776B2 (en) 2008-09-15 2012-04-03 Micron Technology, Inc. Transistor with a passive gate
KR20100055731A (ko) * 2008-11-18 2010-05-27 삼성전자주식회사 레티클 및 반도체 소자의 형성 방법
JP2010161173A (ja) * 2009-01-07 2010-07-22 Renesas Electronics Corp 半導体記憶装置
JP2011159739A (ja) 2010-01-29 2011-08-18 Elpida Memory Inc 半導体装置および半導体装置の製造方法
US8294511B2 (en) 2010-11-19 2012-10-23 Micron Technology, Inc. Vertically stacked fin transistors and methods of fabricating and operating the same
US8461038B2 (en) * 2011-03-02 2013-06-11 Texas Instruments Incorporated Two-track cross-connects in double-patterned metal layers using a forbidden zone
US8575020B2 (en) * 2011-03-02 2013-11-05 Texas Instruments Incorporated Pattern-split decomposition strategy for double-patterned lithography process
US8372743B2 (en) * 2011-03-02 2013-02-12 Texas Instruments Incorporated Hybrid pitch-split pattern-split lithography process
JP2013254815A (ja) * 2012-06-06 2013-12-19 Ps4 Luxco S A R L 半導体装置およびその製造方法
TWI545696B (zh) 2013-09-10 2016-08-11 東芝股份有限公司 Semiconductor memory device and manufacturing method thereof
KR102248436B1 (ko) * 2014-05-23 2021-05-07 삼성전자주식회사 반도체 소자의 제조방법
DE102015114405A1 (de) * 2015-08-28 2017-03-02 Infineon Technologies Dresden Gmbh Halbleitervorrichtung mit sich durch eine zwischenschicht erstreckenden kontaktstrukturen und herstellungsverfahren
US10177226B2 (en) * 2016-11-03 2019-01-08 International Business Machines Corporation Preventing threshold voltage variability in stacked nanosheets
US11164938B2 (en) * 2019-03-26 2021-11-02 Micromaterials Llc DRAM capacitor module
CN112490245B (zh) * 2019-09-12 2024-06-04 华邦电子股份有限公司 存储器元件及其制造方法
US11114380B2 (en) * 2019-09-16 2021-09-07 Winbond Electronics Corp. Manufacturing method of memory device
CN112366203B (zh) * 2020-10-23 2023-01-03 福建省晋华集成电路有限公司 图案布局以及其形成方法
JP2022122792A (ja) * 2021-02-10 2022-08-23 キオクシア株式会社 半導体記憶装置
JP2022127907A (ja) * 2021-02-22 2022-09-01 キオクシア株式会社 半導体装置およびその製造方法
US11686571B2 (en) 2021-09-02 2023-06-27 Applied Materials Israel Ltd. Local shape deviation in a semiconductor specimen
US11887977B2 (en) 2022-03-24 2024-01-30 Fujian Jinhua Integrated Circuit Co., Ltd. Semiconductor device and method of fabricating the same
KR20230156573A (ko) * 2022-05-06 2023-11-14 삼성전자주식회사 반도체 메모리 장치 및 이의 제조 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH073862B2 (ja) * 1983-07-27 1995-01-18 株式会社日立製作所 半導体記憶装置
JP3179520B2 (ja) 1991-07-11 2001-06-25 株式会社日立製作所 半導体装置の製造方法
US6043562A (en) * 1996-01-26 2000-03-28 Micron Technology, Inc. Digit line architecture for dynamic memory
JPH10284700A (ja) 1997-04-10 1998-10-23 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
TW408433B (en) * 1997-06-30 2000-10-11 Hitachi Ltd Method for fabricating semiconductor integrated circuit
US6027969A (en) * 1998-06-04 2000-02-22 Taiwan Semiconductor Manufacturing Company Capacitor structure for a dynamic random access memory cell
JP3718058B2 (ja) * 1998-06-17 2005-11-16 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US6303272B1 (en) * 1998-11-13 2001-10-16 International Business Machines Corporation Process for self-alignment of sub-critical contacts to wiring
JP2000323570A (ja) * 1999-05-11 2000-11-24 Fujitsu Ltd 半導体装置及びその製造方法
US6184081B1 (en) * 1999-10-08 2001-02-06 Vanguard International Semiconductor Corporation Method of fabricating a capacitor under bit line DRAM structure using contact hole liners

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