EP1006589A3 - MOS-Dünnfilmtransistor und Herstellungsverfahren - Google Patents

MOS-Dünnfilmtransistor und Herstellungsverfahren Download PDF

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Publication number
EP1006589A3
EP1006589A3 EP99124230A EP99124230A EP1006589A3 EP 1006589 A3 EP1006589 A3 EP 1006589A3 EP 99124230 A EP99124230 A EP 99124230A EP 99124230 A EP99124230 A EP 99124230A EP 1006589 A3 EP1006589 A3 EP 1006589A3
Authority
EP
European Patent Office
Prior art keywords
gate electrode
thin film
film transistor
fabricating same
mos thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP99124230A
Other languages
English (en)
French (fr)
Other versions
EP1006589B1 (de
EP1006589A2 (de
Inventor
Shunpei Yamazaki
Hisashi Ohtani
Hideomi Suzawa
Toru Takayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to EP20100179105 priority Critical patent/EP2264771A3/de
Publication of EP1006589A2 publication Critical patent/EP1006589A2/de
Publication of EP1006589A3 publication Critical patent/EP1006589A3/de
Application granted granted Critical
Publication of EP1006589B1 publication Critical patent/EP1006589B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78627—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G02F1/136245—Active matrix addressed cells having more than one switching element per pixel having complementary transistors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/105—Materials and properties semiconductor single crystal Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L2029/7863—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Nonlinear Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
EP99124230A 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren Expired - Lifetime EP1006589B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP20100179105 EP2264771A3 (de) 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP34474698 1998-12-03
JP34474698 1998-12-03

Related Child Applications (2)

Application Number Title Priority Date Filing Date
EP20100179105 Division EP2264771A3 (de) 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren
EP10179105.1 Division-Into 2010-09-24

Publications (3)

Publication Number Publication Date
EP1006589A2 EP1006589A2 (de) 2000-06-07
EP1006589A3 true EP1006589A3 (de) 2000-09-27
EP1006589B1 EP1006589B1 (de) 2012-04-11

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
EP20100179105 Withdrawn EP2264771A3 (de) 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren
EP99124230A Expired - Lifetime EP1006589B1 (de) 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP20100179105 Withdrawn EP2264771A3 (de) 1998-12-03 1999-12-03 MOS-Dünnfilmtransistor und Herstellungsverfahren

Country Status (2)

Country Link
US (2) US7235810B1 (de)
EP (2) EP2264771A3 (de)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7652294B2 (en) 2000-03-08 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7656491B2 (en) 2000-03-16 2010-02-02 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US7705354B2 (en) 2000-03-06 2010-04-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and method for fabricating the same
US7714329B2 (en) 2001-03-06 2010-05-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having thin film transistor
US7714975B1 (en) 2000-03-17 2010-05-11 Semiconductor Energy Laboratory Co., Ltd Liquid crystal display device and manfacturing method thereof
US7902550B2 (en) 2000-05-09 2011-03-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6277679B1 (en) 1998-11-25 2001-08-21 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing thin film transistor
US6524895B2 (en) 1998-12-25 2003-02-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US6346730B1 (en) * 1999-04-06 2002-02-12 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device having a pixel TFT formed in a display region and a drive circuit formed in the periphery of the display region on the same substrate
EP2256808A2 (de) * 1999-04-30 2010-12-01 Semiconductor Energy Laboratory Co, Ltd. Halbleiterbauelement und dessen Herstellungsverfahren
EP1058310A3 (de) * 1999-06-02 2009-11-18 Sel Semiconductor Energy Laboratory Co., Ltd. Halbleiterbauelement und deren Herstellungsverfahren
TW495854B (en) 2000-03-06 2002-07-21 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
JP4700160B2 (ja) 2000-03-13 2011-06-15 株式会社半導体エネルギー研究所 半導体装置
JP4118485B2 (ja) 2000-03-13 2008-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7525165B2 (en) * 2000-04-17 2009-04-28 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and manufacturing method thereof
TWI286338B (en) 2000-05-12 2007-09-01 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
US6613620B2 (en) * 2000-07-31 2003-09-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
JP4954366B2 (ja) 2000-11-28 2012-06-13 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3522216B2 (ja) 2000-12-19 2004-04-26 シャープ株式会社 薄膜トランジスタおよびその製造方法ならびに液晶表示装置
US7569849B2 (en) 2001-02-16 2009-08-04 Ignis Innovation Inc. Pixel driver circuit and pixel circuit having the pixel driver circuit
SG160191A1 (en) 2001-02-28 2010-04-29 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
US7112844B2 (en) 2001-04-19 2006-09-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP4831885B2 (ja) 2001-04-27 2011-12-07 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3961240B2 (ja) 2001-06-28 2007-08-22 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4115158B2 (ja) 2002-04-24 2008-07-09 シャープ株式会社 半導体装置およびその製造方法
CA2419704A1 (en) 2003-02-24 2004-08-24 Ignis Innovation Inc. Method of manufacturing a pixel with organic light-emitting diode
CA2443206A1 (en) 2003-09-23 2005-03-23 Ignis Innovation Inc. Amoled display backplanes - pixel driver circuits, array architecture, and external compensation
US7374983B2 (en) 2004-04-08 2008-05-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
CA2472671A1 (en) 2004-06-29 2005-12-29 Ignis Innovation Inc. Voltage-programming scheme for current-driven amoled displays
CA2490858A1 (en) 2004-12-07 2006-06-07 Ignis Innovation Inc. Driving method for compensated voltage-programming of amoled displays
CA2495726A1 (en) 2005-01-28 2006-07-28 Ignis Innovation Inc. Locally referenced voltage programmed pixel for amoled displays
US7588970B2 (en) * 2005-06-10 2009-09-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR100731745B1 (ko) * 2005-06-22 2007-06-22 삼성에스디아이 주식회사 유기전계발광표시장치 및 그 제조방법
KR101150142B1 (ko) * 2006-04-06 2012-06-11 어플라이드 머티어리얼스, 인코포레이티드 대형 기판 상에 아연 산화물 투명 전도성 산화물의 반응성 스퍼터링
US20070235320A1 (en) * 2006-04-06 2007-10-11 Applied Materials, Inc. Reactive sputtering chamber with gas distribution tubes
EP2008264B1 (de) 2006-04-19 2016-11-16 Ignis Innovation Inc. Stabiles ansteuerverfahren für aktivmatrix-displays
US7655542B2 (en) * 2006-06-23 2010-02-02 Applied Materials, Inc. Methods and apparatus for depositing a microcrystalline silicon film for photovoltaic device
US7674662B2 (en) 2006-07-19 2010-03-09 Applied Materials, Inc. Process for making thin film field effect transistors using zinc oxide
KR101316634B1 (ko) * 2006-09-29 2013-10-15 삼성디스플레이 주식회사 금속 배선의 제조 방법 및 표시 기판의 제조 방법
US20080223440A1 (en) * 2007-01-18 2008-09-18 Shuran Sheng Multi-junction solar cells and methods and apparatuses for forming the same
US8203071B2 (en) * 2007-01-18 2012-06-19 Applied Materials, Inc. Multi-junction solar cells and methods and apparatuses for forming the same
US20080173350A1 (en) * 2007-01-18 2008-07-24 Applied Materials, Inc. Multi-junction solar cells and methods and apparatuses for forming the same
US7582515B2 (en) * 2007-01-18 2009-09-01 Applied Materials, Inc. Multi-junction solar cells and methods and apparatuses for forming the same
US20080245414A1 (en) * 2007-04-09 2008-10-09 Shuran Sheng Methods for forming a photovoltaic device with low contact resistance
US7927713B2 (en) 2007-04-27 2011-04-19 Applied Materials, Inc. Thin film semiconductor material produced through reactive sputtering of zinc target using nitrogen gases
US7875486B2 (en) * 2007-07-10 2011-01-25 Applied Materials, Inc. Solar cells and methods and apparatuses for forming the same including I-layer and N-layer chamber cleaning
US7994508B2 (en) * 2007-08-02 2011-08-09 Applied Materials, Inc. Thin film transistors using thin film semiconductor materials
US20090104733A1 (en) * 2007-10-22 2009-04-23 Yong Kee Chae Microcrystalline silicon deposition for thin film solar applications
US20090130827A1 (en) * 2007-11-02 2009-05-21 Soo Young Choi Intrinsic amorphous silicon layer
EP2215652A4 (de) * 2007-11-02 2011-10-05 Applied Materials Inc Plasmabehandlung zwischen abscheidungsprozessen
US20090189233A1 (en) * 2008-01-25 2009-07-30 Taiwan Semiconductor Manufacturing Co., Ltd. Cmos image sensor and method for manufacturing same
US8980066B2 (en) * 2008-03-14 2015-03-17 Applied Materials, Inc. Thin film metal oxynitride semiconductors
WO2009117438A2 (en) * 2008-03-20 2009-09-24 Applied Materials, Inc. Process to make metal oxide thin film transistor array with etch stopping layer
US7879698B2 (en) * 2008-03-24 2011-02-01 Applied Materials, Inc. Integrated process system and process sequence for production of thin film transistor arrays using doped or compounded metal oxide semiconductor
KR100958640B1 (ko) * 2008-06-09 2010-05-20 삼성모바일디스플레이주식회사 커패시터와 박막 트랜지스터를 갖는 기판, 이를 구비한평판 디스플레이 장치 및 상기 커패시터와 박막트랜지스터를 갖는 기판의 제조방법
US8258511B2 (en) * 2008-07-02 2012-09-04 Applied Materials, Inc. Thin film transistors using multiple active channel layers
US8895842B2 (en) * 2008-08-29 2014-11-25 Applied Materials, Inc. High quality TCO-silicon interface contact structure for high efficiency thin film silicon solar cells
JP5478166B2 (ja) * 2008-09-11 2014-04-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
WO2011011301A2 (en) * 2009-07-23 2011-01-27 Applied Materials, Inc. A mixed silicon phase film for high efficiency thin film silicon solar cells
US7988470B2 (en) 2009-09-24 2011-08-02 Applied Materials, Inc. Methods of fabricating metal oxide or metal oxynitride TFTs using wet process for source-drain metal etch
US8840763B2 (en) * 2009-09-28 2014-09-23 Applied Materials, Inc. Methods for stable process in a reactive sputtering process using zinc or doped zinc target
DE102009045181B4 (de) * 2009-09-30 2020-07-09 Infineon Technologies Ag Leistungshalbleitermodul
WO2011046664A2 (en) * 2009-10-15 2011-04-21 Applied Materials, Inc. A barrier layer disposed between a substrate and a transparent conductive oxide layer for thin film silicon solar cells
ES2366727B1 (es) * 2009-10-16 2012-09-12 Universidad Complutense De Madrid Método para la fabricación de estructuras de puerta de transistores mosfet mediante técnicas de plasma sin utilizar gases contaminantes.
KR101801959B1 (ko) 2009-10-21 2017-11-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 액정 표시 장치 및 그 액정 표시 장치를 구비하는 전자기기
US8497828B2 (en) 2009-11-12 2013-07-30 Ignis Innovation Inc. Sharing switch TFTS in pixel circuits
US8395156B2 (en) * 2009-11-24 2013-03-12 Semiconductor Energy Laboratory Co., Ltd. Display device
US20110126875A1 (en) * 2009-12-01 2011-06-02 Hien-Minh Huu Le Conductive contact layer formed on a transparent conductive layer by a reactive sputter deposition
KR102008754B1 (ko) 2010-01-24 2019-08-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치와 이의 제조 방법
CN109272933A (zh) 2011-05-17 2019-01-25 伊格尼斯创新公司 操作显示器的方法
US9606607B2 (en) 2011-05-17 2017-03-28 Ignis Innovation Inc. Systems and methods for display systems with dynamic power control
US8901579B2 (en) 2011-08-03 2014-12-02 Ignis Innovation Inc. Organic light emitting diode and method of manufacturing
US9070775B2 (en) 2011-08-03 2015-06-30 Ignis Innovations Inc. Thin film transistor
US9385169B2 (en) 2011-11-29 2016-07-05 Ignis Innovation Inc. Multi-functional active matrix organic light-emitting diode display
US10089924B2 (en) 2011-11-29 2018-10-02 Ignis Innovation Inc. Structural and low-frequency non-uniformity compensation
US20130207111A1 (en) 2012-02-09 2013-08-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display device including semiconductor device, electronic device including semiconductor device, and method for manufacturing semiconductor device
US20140151095A1 (en) * 2012-12-05 2014-06-05 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
US9721505B2 (en) 2013-03-08 2017-08-01 Ignis Innovation Inc. Pixel circuits for AMOLED displays
US9952698B2 (en) 2013-03-15 2018-04-24 Ignis Innovation Inc. Dynamic adjustment of touch resolutions on an AMOLED display
KR102046997B1 (ko) * 2013-04-04 2019-11-21 삼성디스플레이 주식회사 박막 트랜지스터 및 유기 발광 표시 장치
JP6436333B2 (ja) * 2013-08-06 2018-12-12 Ｔｉａｎｍａ Ｊａｐａｎ株式会社 表示装置
US9502653B2 (en) 2013-12-25 2016-11-22 Ignis Innovation Inc. Electrode contacts
US10997901B2 (en) 2014-02-28 2021-05-04 Ignis Innovation Inc. Display system
US10176752B2 (en) 2014-03-24 2019-01-08 Ignis Innovation Inc. Integrated gate driver
CA2872563A1 (en) 2014-11-28 2016-05-28 Ignis Innovation Inc. High pixel density array architecture
CA2898282A1 (en) 2015-07-24 2017-01-24 Ignis Innovation Inc. Hybrid calibration of current sources for current biased voltage progra mmed (cbvp) displays
US10373554B2 (en) 2015-07-24 2019-08-06 Ignis Innovation Inc. Pixels and reference circuits and timing techniques
US10657895B2 (en) 2015-07-24 2020-05-19 Ignis Innovation Inc. Pixels and reference circuits and timing techniques
JP6851166B2 (ja) * 2015-10-12 2021-03-31 株式会社半導体エネルギー研究所 半導体装置の作製方法
CA2909813A1 (en) 2015-10-26 2017-04-26 Ignis Innovation Inc High ppi pattern orientation
US10263114B2 (en) 2016-03-04 2019-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, method for manufacturing the same, or display device including the same
DE102017222059A1 (de) 2016-12-06 2018-06-07 Ignis Innovation Inc. Pixelschaltungen zur Minderung von Hysterese
US10714018B2 (en) 2017-05-17 2020-07-14 Ignis Innovation Inc. System and method for loading image correction data for displays
US11025899B2 (en) 2017-08-11 2021-06-01 Ignis Innovation Inc. Optical correction systems and methods for correcting non-uniformity of emissive display devices
US10971078B2 (en) 2018-02-12 2021-04-06 Ignis Innovation Inc. Pixel measurement through data line
CN110600488A (zh) * 2019-10-12 2019-12-20 京东方科技集团股份有限公司 一种氧化物薄膜晶体管及其驱动方法、显示装置
CN113972236A (zh) * 2020-07-23 2022-01-25 合肥鑫晟光电科技有限公司 显示基板及其制备方法、显示装置

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0451968A1 (de) * 1990-04-11 1991-10-16 THE GENERAL ELECTRIC COMPANY, p.l.c. Herstellungsprozess für Dünnschichttransistor
JPH0637314A (ja) * 1992-07-16 1994-02-10 Sharp Corp 薄膜トランジスタ及びその製造方法
JPH0851207A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JPH08110530A (ja) * 1994-10-07 1996-04-30 Semiconductor Energy Lab Co Ltd アクティブマトリクス型表示装置
US5532175A (en) * 1995-04-17 1996-07-02 Motorola, Inc. Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate
US5543947A (en) * 1991-05-21 1996-08-06 Semiconductor Energy Laboratory Co., Ltd. Method of driving an LCD employing an active matrix with short pulses for gray scale
US5543340A (en) * 1993-12-28 1996-08-06 Samsung Electronics Co., Ltd. Method for manufacturing offset polysilicon thin-film transistor
US5581092A (en) * 1993-09-07 1996-12-03 Semiconductor Energy Laboratory Co., Ltd. Gate insulated semiconductor device
EP0803911A2 (de) * 1996-04-25 1997-10-29 Sharp Kabushiki Kaisha Kanalstruktur eines Feldeffekttransistors und eines CMOS-Elements
US5686328A (en) * 1993-07-14 1997-11-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and process for fabricating the same
JPH10144929A (ja) * 1996-11-12 1998-05-29 Semiconductor Energy Lab Co Ltd アクティブマトリクス型表示装置およびその作製方法
US5767930A (en) * 1994-05-20 1998-06-16 Mitsubishi Denki Kabushiki Kaisha Active-matrix liquid crystal display and fabrication method thereof

Family Cites Families (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4394182A (en) * 1981-10-14 1983-07-19 Rockwell International Corporation Microelectronic shadow masking process for reducing punchthrough
US4835740A (en) * 1986-12-26 1989-05-30 Kabushiki Kaisha Toshiba Floating gate type semiconductor memory device
US5032883A (en) 1987-09-09 1991-07-16 Casio Computer Co., Ltd. Thin film transistor and method of manufacturing the same
US4963504A (en) * 1987-11-23 1990-10-16 Xerox Corporation Method for fabricating double implanted LDD transistor self-aligned with gate
US4907048A (en) * 1987-11-23 1990-03-06 Xerox Corporation Double implanted LDD transistor self-aligned with gate
JP2653099B2 (ja) 1988-05-17 1997-09-10 セイコーエプソン株式会社 アクティブマトリクスパネル，投写型表示装置及びビューファインダー
GB8909011D0 (en) 1989-04-20 1989-06-07 Friend Richard H Electroluminescent devices
JPH0448640A (ja) 1990-06-14 1992-02-18 Oki Electric Ind Co Ltd Ｍｏｓトランジスタの製造方法
US5108935A (en) 1990-11-16 1992-04-28 Texas Instruments Incorporated Reduction of hot carrier effects in semiconductor devices by controlled scattering via the intentional introduction of impurities
JPH04369271A (ja) 1991-06-17 1992-12-22 Casio Comput Co Ltd 薄膜トランジスタ
US5241203A (en) 1991-07-10 1993-08-31 International Business Machines Corporation Inverse T-gate FET transistor with lightly doped source and drain region
US5120668A (en) * 1991-07-10 1992-06-09 Ibm Corporation Method of forming an inverse T-gate FET transistor
US5182619A (en) * 1991-09-03 1993-01-26 Motorola, Inc. Semiconductor device having an MOS transistor with overlapped and elevated source and drain
JP2731056B2 (ja) 1991-10-09 1998-03-25 シャープ株式会社 薄膜トランジスタの製造方法
JP2650543B2 (ja) 1991-11-25 1997-09-03 カシオ計算機株式会社 マトリクス回路駆動装置
US5276347A (en) * 1991-12-18 1994-01-04 Sgs-Thomson Microelectronics, Inc. Gate overlapping LDD structure
JP3191061B2 (ja) * 1992-01-31 2001-07-23 キヤノン株式会社 半導体装置及び液晶表示装置
JP2814161B2 (ja) 1992-04-28 1998-10-22 株式会社半導体エネルギー研究所 アクティブマトリクス表示装置およびその駆動方法
JPH06148685A (ja) 1992-11-13 1994-05-27 Toshiba Corp 液晶表示装置
JP3587537B2 (ja) 1992-12-09 2004-11-10 株式会社半導体エネルギー研究所 半導体装置
JP3437863B2 (ja) 1993-01-18 2003-08-18 株式会社半導体エネルギー研究所 Ｍｉｓ型半導体装置の作製方法
US5583067A (en) 1993-01-22 1996-12-10 Intel Corporation Inverse T-gate semiconductor device with self-aligned punchthrough stops and method of fabrication
US5821622A (en) 1993-03-12 1998-10-13 Kabushiki Kaisha Toshiba Liquid crystal display device
US5501989A (en) 1993-03-22 1996-03-26 Semiconductor Energy Laboratory Co., Ltd. Method of making semiconductor device/circuit having at least partially crystallized semiconductor layer
JP3250632B2 (ja) 1993-05-14 2002-01-28 石川島播磨重工業株式会社 大型鉄鋼構造物の組立方法
US5594569A (en) 1993-07-22 1997-01-14 Semiconductor Energy Laboratory Co., Ltd. Liquid-crystal electro-optical apparatus and method of manufacturing the same
JP2814049B2 (ja) 1993-08-27 1998-10-22 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US5567966A (en) * 1993-09-29 1996-10-22 Texas Instruments Incorporated Local thinning of channel region for ultra-thin film SOI MOSFET with elevated source/drain
US6777763B1 (en) 1993-10-01 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for fabricating the same
US5719065A (en) 1993-10-01 1998-02-17 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device with removable spacers
JPH07335904A (ja) 1994-06-14 1995-12-22 Semiconductor Energy Lab Co Ltd 薄膜半導体集積回路
JPH07135323A (ja) 1993-10-20 1995-05-23 Semiconductor Energy Lab Co Ltd 薄膜状半導体集積回路およびその作製方法
TW264575B (de) 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
JP3431033B2 (ja) 1993-10-29 2003-07-28 株式会社半導体エネルギー研究所 半導体作製方法
US5923962A (en) 1993-10-29 1999-07-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
JPH07131030A (ja) 1993-11-05 1995-05-19 Sony Corp 表示用薄膜半導体装置及びその製造方法
US7081938B1 (en) 1993-12-03 2006-07-25 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
US5393682A (en) 1993-12-13 1995-02-28 Taiwan Semiconductor Manufacturing Company Method of making tapered poly profile for TFT device manufacturing
JP3086579B2 (ja) 1993-12-28 2000-09-11 シャープ株式会社 薄膜トランジスタの製造方法
JP3398453B2 (ja) 1994-02-24 2003-04-21 株式会社東芝 薄膜トランジスタの製造方法
US5482871A (en) * 1994-04-15 1996-01-09 Texas Instruments Incorporated Method for forming a mesa-isolated SOI transistor having a split-process polysilicon gate
JPH07302912A (ja) 1994-04-29 1995-11-14 Semiconductor Energy Lab Co Ltd 半導体装置
JP3464287B2 (ja) 1994-09-05 2003-11-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5942768A (en) 1994-10-07 1999-08-24 Semionductor Energy Laboratory Co., Ltd. Semiconductor device having improved crystal orientation
JP3370806B2 (ja) 1994-11-25 2003-01-27 株式会社半導体エネルギー研究所 Ｍｉｓ型半導体装置の作製方法
JPH08274336A (ja) 1995-03-30 1996-10-18 Toshiba Corp 多結晶半導体薄膜トランジスタ及びその製造方法
US5994721A (en) 1995-06-06 1999-11-30 Ois Optical Imaging Systems, Inc. High aperture LCD with insulating color filters overlapping bus lines on active substrate
KR0164079B1 (ko) * 1995-06-30 1998-12-01 김주용 반도체 소자 및 그 제조방법
KR100359795B1 (ko) 1995-08-22 2003-01-14 엘지.필립스 엘시디 주식회사 액정표시장치및그제조방법
TW309633B (de) 1995-12-14 1997-07-01 Handotai Energy Kenkyusho Kk
JP3645379B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5637519A (en) 1996-03-21 1997-06-10 Industrial Technology Research Institute Method of fabricating a lightly doped drain thin-film transistor
US5585295A (en) 1996-03-29 1996-12-17 Vanguard International Semiconductor Corporation Method for forming inverse-T gate lightly-doped drain (ITLDD) device
JP3593212B2 (ja) 1996-04-27 2004-11-24 株式会社半導体エネルギー研究所 表示装置
JPH09298304A (ja) 1996-05-08 1997-11-18 Semiconductor Energy Lab Co Ltd 液晶表示装置の製造方法および半導体装置の製造方法
US5858867A (en) 1996-05-20 1999-01-12 Mosel Vitelic, Inc. Method of making an inverse-T tungsten gate
JP4307574B2 (ja) 1996-09-03 2009-08-05 株式会社半導体エネルギー研究所 アクティブマトリクス表示装置
JP3645377B2 (ja) 1996-10-24 2005-05-11 株式会社半導体エネルギー研究所 集積回路の作製方法
JP3597331B2 (ja) 1996-10-24 2004-12-08 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3856889B2 (ja) 1997-02-06 2006-12-13 株式会社半導体エネルギー研究所 反射型表示装置および電子デバイス
JP3765902B2 (ja) 1997-02-19 2006-04-12 株式会社半導体エネルギー研究所 半導体装置の作製方法および電子デバイスの作製方法
JP3032801B2 (ja) 1997-03-03 2000-04-17 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3503427B2 (ja) 1997-06-19 2004-03-08 ソニー株式会社 薄膜トランジスタの製造方法
JPH1154268A (ja) 1997-08-08 1999-02-26 Sanyo Electric Co Ltd 有機エレクトロルミネッセンスディスプレイ装置
US6011274A (en) 1997-10-20 2000-01-04 Ois Optical Imaging Systems, Inc. X-ray imager or LCD with bus lines overlapped by pixel electrodes and dual insulating layers therebetween
TWI226470B (en) 1998-01-19 2005-01-11 Hitachi Ltd LCD device
US6288413B1 (en) 1998-04-03 2001-09-11 Kabushiki Kaisha Toshiba Thin film transistor and method for producing same
JP2000111952A (ja) 1998-10-07 2000-04-21 Sony Corp 電気光学装置、電気光学装置用の駆動基板、及びこれらの製造方法
US6274887B1 (en) 1998-11-02 2001-08-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method therefor
US6617644B1 (en) 1998-11-09 2003-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
KR100327696B1 (ko) 1998-11-16 2002-03-09 니시무로 타이죠 액정표시장치 및 착색층 부재
US6909114B1 (en) 1998-11-17 2005-06-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having LDD regions
US6501098B2 (en) 1998-11-25 2002-12-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device
US6365917B1 (en) 1998-11-25 2002-04-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP3901893B2 (ja) 1998-11-25 2007-04-04 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US6277679B1 (en) 1998-11-25 2001-08-21 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing thin film transistor
JP2000174282A (ja) 1998-12-03 2000-06-23 Semiconductor Energy Lab Co Ltd 半導体装置
US6469317B1 (en) 1998-12-18 2002-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US6259138B1 (en) 1998-12-18 2001-07-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having multilayered gate electrode and impurity regions overlapping therewith
JP4641582B2 (ja) 1998-12-18 2011-03-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6524895B2 (en) 1998-12-25 2003-02-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
JP4869464B2 (ja) 1998-12-25 2012-02-08 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
EP1020839A3 (de) 1999-01-08 2002-11-27 Sel Semiconductor Energy Laboratory Co., Ltd. Halbleiteranzeigeeinrichtung und Steuerschaltung dafür
US6573195B1 (en) 1999-01-26 2003-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device by performing a heat-treatment in a hydrogen atmosphere
GB2354882B (en) 1999-03-10 2004-06-02 Matsushita Electric Ind Co Ltd Thin film transistor panel and their manufacturing method
US6306694B1 (en) 1999-03-12 2001-10-23 Semiconductor Energy Laboratory Co., Ltd. Process of fabricating a semiconductor device
US6281552B1 (en) 1999-03-23 2001-08-28 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having ldd regions
US6399988B1 (en) 1999-03-26 2002-06-04 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor having lightly doped regions
US6346730B1 (en) 1999-04-06 2002-02-12 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device having a pixel TFT formed in a display region and a drive circuit formed in the periphery of the display region on the same substrate
US6362507B1 (en) 1999-04-20 2002-03-26 Semiconductor Energy Laboratory Co., Ltd. Electro-optical devices in which pixel section and the driver circuit are disposed over the same substrate
JP4307635B2 (ja) 1999-06-22 2009-08-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
TW556357B (en) 1999-06-28 2003-10-01 Semiconductor Energy Lab Method of manufacturing an electro-optical device
TW441133B (en) 2000-02-25 2001-06-16 Hannstar Display Corp Manufacturing method of thin-film transistor with three photomask processes
JP4416901B2 (ja) 2000-03-14 2010-02-17 株式会社半導体エネルギー研究所 レベルシフタ
TW493282B (en) 2000-04-17 2002-07-01 Semiconductor Energy Lab Self-luminous device and electric machine using the same
US7525165B2 (en) 2000-04-17 2009-04-28 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and manufacturing method thereof
US6706544B2 (en) 2000-04-19 2004-03-16 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and fabricating method thereof
JP4165629B2 (ja) 2000-04-26 2008-10-15 モトローラ・インコーポレイテッド 受信信号電力および受信干渉電力を測定する電力測定装置
KR100513290B1 (ko) 2003-06-30 2005-09-09 삼성전자주식회사 멀티미디어 컨텐츠와 세그먼트 메타데이터간의 시간 동기화를 위한 시스템 및 방법

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0451968A1 (de) * 1990-04-11 1991-10-16 THE GENERAL ELECTRIC COMPANY, p.l.c. Herstellungsprozess für Dünnschichttransistor
US5543947A (en) * 1991-05-21 1996-08-06 Semiconductor Energy Laboratory Co., Ltd. Method of driving an LCD employing an active matrix with short pulses for gray scale
JPH0637314A (ja) * 1992-07-16 1994-02-10 Sharp Corp 薄膜トランジスタ及びその製造方法
US5686328A (en) * 1993-07-14 1997-11-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and process for fabricating the same
US5581092A (en) * 1993-09-07 1996-12-03 Semiconductor Energy Laboratory Co., Ltd. Gate insulated semiconductor device
US5543340A (en) * 1993-12-28 1996-08-06 Samsung Electronics Co., Ltd. Method for manufacturing offset polysilicon thin-film transistor
US5767930A (en) * 1994-05-20 1998-06-16 Mitsubishi Denki Kabushiki Kaisha Active-matrix liquid crystal display and fabrication method thereof
JPH0851207A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JPH08110530A (ja) * 1994-10-07 1996-04-30 Semiconductor Energy Lab Co Ltd アクティブマトリクス型表示装置
US5532175A (en) * 1995-04-17 1996-07-02 Motorola, Inc. Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate
EP0803911A2 (de) * 1996-04-25 1997-10-29 Sharp Kabushiki Kaisha Kanalstruktur eines Feldeffekttransistors und eines CMOS-Elements
JPH10144929A (ja) * 1996-11-12 1998-05-29 Semiconductor Energy Lab Co Ltd アクティブマトリクス型表示装置およびその作製方法

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
CHOI K -Y ET AL: "GATE-OVERLAPPED LIGHTLY DOPED DRAIN POLY-SI THIN-FILM TRANSISTORS FOR LARGE AREA-AMLCD", IEEE TRANSACTIONS ON ELECTRON DEVICES,US,IEEE INC. NEW YORK, vol. 45, no. 6, 1 June 1998 (1998-06-01), pages 1272 - 1279, XP000754178, ISSN: 0018-9383 *
HWANG J M ET AL: "HIGH PERFORMANCE SUBMICRON SOI/CMOS WITH AN ELEVATED SOURCE/DRAIN STRUCTURE", PROCEEDINGS OF THE ANNUAL SOS/SOI TECHNOLOGY CONFERENCE. (FROM 1991 PROCEEDINGS OF THE INTERNATIONAL SOI CONFERENCE.) SILICON-ON-INSULATOR TECHNOLOGY AND DEVICES,US,NEW YORK, IEEE, vol. CONF. 19, 5 October 1993 (1993-10-05), pages 132 - 133, XP000470411, ISBN: 0-7803-1346-1 *
HWANG J -M ET AL: "NOVEL POLYSILICON/TIN STACKED-GATE STRUCTURE FOR FULLY-DEPLETED SOI/CMOS", INTERNATIONAL ELECTRON DEVICES MEETING (IEDM),US,NEW YORK, IEEE, 1992, pages 345 - 348, XP000687444, ISBN: 0-7803-0818-2 *
PATENT ABSTRACTS OF JAPAN vol. 018, no. 255 (E - 1548) 16 May 1994 (1994-05-16) *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 06 28 June 1996 (1996-06-28) *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 08 30 August 1996 (1996-08-30) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 10 31 August 1998 (1998-08-31) *
TETSU TANAKA ET AL: "ULTRAFAST OPERATION OF VTH-ADJUSTED P+-N+ DOUBLE-GATE SOI MOSFET'S", IEEE ELECTRON DEVICE LETTERS,US,IEEE INC. NEW YORK, vol. 15, no. 10, 1 October 1994 (1994-10-01), pages 386 - 388, XP000483212, ISSN: 0741-3106 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7705354B2 (en) 2000-03-06 2010-04-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and method for fabricating the same
US7973312B2 (en) 2000-03-06 2011-07-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US7652294B2 (en) 2000-03-08 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7728334B2 (en) 2000-03-08 2010-06-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7656491B2 (en) 2000-03-16 2010-02-02 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US7990508B2 (en) 2000-03-16 2011-08-02 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US7714975B1 (en) 2000-03-17 2010-05-11 Semiconductor Energy Laboratory Co., Ltd Liquid crystal display device and manfacturing method thereof
US7902550B2 (en) 2000-05-09 2011-03-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7714329B2 (en) 2001-03-06 2010-05-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having thin film transistor
US7875886B2 (en) 2001-03-06 2011-01-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a thin film transistor
US8053781B2 (en) 2001-03-06 2011-11-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having thin film transistor

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US7776712B2 (en) 2010-08-17
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EP2264771A3 (de) 2015-04-29
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