DE69034023T2 - Verfahren zur Herstellung einer Halbleiteranordnung mit einer leitfähigen Schicht - Google Patents

Verfahren zur Herstellung einer Halbleiteranordnung mit einer leitfähigen Schicht

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Publication number
DE69034023T2
DE69034023T2 DE69034023T DE69034023T DE69034023T2 DE 69034023 T2 DE69034023 T2 DE 69034023T2 DE 69034023 T DE69034023 T DE 69034023T DE 69034023 T DE69034023 T DE 69034023T DE 69034023 T2 DE69034023 T2 DE 69034023T2
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DE
Germany
Prior art keywords
film
producing
semiconductor device
conductive layer
material layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69034023T
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English (en)
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DE69034023D1 (de
Inventor
Tadahiro Ohmi
Mamoru Miyawaki
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Canon Inc
Original Assignee
Canon Inc
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Publication date
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69034023D1 publication Critical patent/DE69034023D1/de
Publication of DE69034023T2 publication Critical patent/DE69034023T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
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    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/951—Lift-off

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69034023T 1989-09-09 1990-09-07 Verfahren zur Herstellung einer Halbleiteranordnung mit einer leitfähigen Schicht Expired - Lifetime DE69034023T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1233929A JP2746289B2 (ja) 1989-09-09 1989-09-09 素子の作製方法並びに半導体素子およびその作製方法
PCT/JP1990/001149 WO1991003841A1 (en) 1989-09-09 1990-09-07 Element, method of fabricating the same, semiconductor element and method of fabricating the same

Publications (2)

Publication Number Publication Date
DE69034023D1 DE69034023D1 (de) 2003-01-16
DE69034023T2 true DE69034023T2 (de) 2003-04-30

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EP (1) EP0463165B1 (de)
JP (1) JP2746289B2 (de)
AT (1) ATE229231T1 (de)
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WO (1) WO1991003841A1 (de)

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EP0463165B1 (de) 2002-12-04
EP0463165A1 (de) 1992-01-02
EP0463165A4 (en) 1992-03-11
ATE229231T1 (de) 2002-12-15
US5541444A (en) 1996-07-30
US5854097A (en) 1998-12-29
JPH0397231A (ja) 1991-04-23
DE69034023D1 (de) 2003-01-16
WO1991003841A1 (en) 1991-03-21
JP2746289B2 (ja) 1998-05-06

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