DE60040812D1 - Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter Bauelement - Google Patents
Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter BauelementInfo
- Publication number
- DE60040812D1 DE60040812D1 DE60040812T DE60040812T DE60040812D1 DE 60040812 D1 DE60040812 D1 DE 60040812D1 DE 60040812 T DE60040812 T DE 60040812T DE 60040812 T DE60040812 T DE 60040812T DE 60040812 D1 DE60040812 D1 DE 60040812D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- bipolar transistor
- misfet semiconductor
- misfet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
- H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6814799 | 1999-03-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60040812D1 true DE60040812D1 (de) | 2008-12-24 |
Family
ID=13365348
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60040812T Expired - Lifetime DE60040812D1 (de) | 1999-03-15 | 2000-03-14 | Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter Bauelement |
Country Status (6)
Country | Link |
---|---|
US (2) | US6455364B1 (de) |
EP (2) | EP1037284A3 (de) |
KR (1) | KR100630110B1 (de) |
CN (1) | CN1215569C (de) |
DE (1) | DE60040812D1 (de) |
TW (1) | TW460978B (de) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1020900B1 (de) * | 1999-01-14 | 2009-08-05 | Panasonic Corporation | Halbleiterbauelement und Verfahren zu dessen Herstellung |
DE60040812D1 (de) * | 1999-03-15 | 2008-12-24 | Matsushita Electric Ind Co Ltd | Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter Bauelement |
JP3528756B2 (ja) * | 2000-05-12 | 2004-05-24 | 松下電器産業株式会社 | 半導体装置 |
JP2002252233A (ja) * | 2001-02-22 | 2002-09-06 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
FR2822292B1 (fr) * | 2001-03-14 | 2003-07-18 | St Microelectronics Sa | Procede de fabrication d'un transistor bipolaire de type double polysilicium a base a heterojonction et transistor correspondant |
JP3501284B2 (ja) * | 2001-03-30 | 2004-03-02 | 富士通カンタムデバイス株式会社 | 半導体装置の製造方法 |
US6660607B2 (en) * | 2001-03-30 | 2003-12-09 | International Business Machines Corporation | Method for fabricating heterojunction bipolar transistors |
SE0103036D0 (sv) * | 2001-05-04 | 2001-09-13 | Ericsson Telefon Ab L M | Semiconductor process and integrated circuit |
ATE535010T1 (de) | 2001-07-12 | 2011-12-15 | Univ Mississippi State | Verfahren zur herstllung selbstausgerichteten transistortopologien in siliziumkarbid durch verwendung selektiver epitaxie |
DE10134089A1 (de) * | 2001-07-13 | 2003-01-30 | Infineon Technologies Ag | Verfahren zur Herstellung eines Bipolartransistors mit Polysiliziumemitter |
JP4402953B2 (ja) | 2001-09-18 | 2010-01-20 | パナソニック株式会社 | 半導体装置の製造方法 |
FR2835652B1 (fr) | 2002-02-04 | 2005-04-15 | St Microelectronics Sa | Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant |
US7521733B2 (en) * | 2002-05-14 | 2009-04-21 | Infineon Technologies Ag | Method for manufacturing an integrated circuit and integrated circuit with a bipolar transistor and a hetero bipolar transistor |
TW573372B (en) * | 2002-11-06 | 2004-01-21 | Super Nova Optoelectronics Cor | GaN-based III-V group compound semiconductor light-emitting diode and the manufacturing method thereof |
US6699765B1 (en) * | 2002-08-29 | 2004-03-02 | Micrel, Inc. | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer |
JP4122197B2 (ja) * | 2002-08-30 | 2008-07-23 | 富士通株式会社 | 半導体装置の製造方法 |
KR20040038511A (ko) * | 2002-11-01 | 2004-05-08 | 한국전자통신연구원 | 자기정렬형 이종접합 쌍극자 트랜지스터 및 그의 제조 방법 |
DE10318422B4 (de) * | 2003-04-23 | 2006-08-10 | Infineon Technologies Ag | Hochfrequenz-Bipolartransistor mit Silizidregion und Verfahren zur Herstellung desselben |
US6982433B2 (en) | 2003-06-12 | 2006-01-03 | Intel Corporation | Gate-induced strain for MOS performance improvement |
US6974733B2 (en) * | 2003-06-16 | 2005-12-13 | Intel Corporation | Double-gate transistor with enhanced carrier mobility |
US7138668B2 (en) * | 2003-07-30 | 2006-11-21 | Nissan Motor Co., Ltd. | Heterojunction diode with reduced leakage current |
US7910448B2 (en) * | 2004-01-23 | 2011-03-22 | Nxp B.V. | Method for fabricating a mono-crystalline emitter |
DE102004017166B4 (de) * | 2004-04-01 | 2007-10-11 | Atmel Germany Gmbh | Verfahren zur Herstellung von Bipolar-Transistoren |
DE102004053394B4 (de) | 2004-11-05 | 2010-08-19 | Atmel Automotive Gmbh | Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung |
JP2006186235A (ja) * | 2004-12-28 | 2006-07-13 | Renesas Technology Corp | 半導体装置及びその製造方法 |
US7314799B2 (en) * | 2005-12-05 | 2008-01-01 | Semisouth Laboratories, Inc. | Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making |
CN101326621B (zh) * | 2005-12-13 | 2010-06-16 | Nxp股份有限公司 | 在结处具有绝缘层的场效应晶体管结构 |
US8026146B2 (en) * | 2006-08-31 | 2011-09-27 | Nxp B.V. | Method of manufacturing a bipolar transistor |
US7892910B2 (en) | 2007-02-28 | 2011-02-22 | International Business Machines Corporation | Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration |
US7598539B2 (en) * | 2007-06-01 | 2009-10-06 | Infineon Technologies Ag | Heterojunction bipolar transistor and method for making same |
SG183740A1 (en) | 2009-02-20 | 2012-09-27 | Semiconductor Energy Lab | Semiconductor device and manufacturing method of the same |
US8129234B2 (en) * | 2009-09-09 | 2012-03-06 | International Business Machines Corporation | Method of forming bipolar transistor integrated with metal gate CMOS devices |
EP2315238B1 (de) * | 2009-10-26 | 2012-06-20 | Nxp B.V. | Bipolarer Heteroübergangstransistor |
CN102117749B (zh) * | 2009-12-31 | 2012-07-11 | 上海华虹Nec电子有限公司 | 双极晶体管的集电区和集电区埋层的制造工艺方法 |
CN102402125A (zh) * | 2010-09-16 | 2012-04-04 | 上海华虹Nec电子有限公司 | 用于制造锗硅碳器件中的光刻标记结构及其制备方法 |
US20120313146A1 (en) * | 2011-06-08 | 2012-12-13 | International Business Machines Corporation | Transistor and method of forming the transistor so as to have reduced base resistance |
KR101682320B1 (ko) * | 2012-10-31 | 2016-12-05 | 샤프 가부시키가이샤 | 일렉트로루미네센스 기판 및 그 제조 방법, 일렉트로루미네센스 표시 패널, 일렉트로루미네센스 표시 장치 |
CN104425244B (zh) * | 2013-08-20 | 2017-02-15 | 上海华虹宏力半导体制造有限公司 | 锗硅异质结双极型晶体管制造方法 |
CN108054096B (zh) * | 2017-12-21 | 2020-08-28 | 南京溧水高新创业投资管理有限公司 | 双极晶体管的制作方法 |
JP2020120080A (ja) * | 2019-01-28 | 2020-08-06 | 株式会社村田製作所 | 半導体素子 |
CN111933796B (zh) * | 2020-09-29 | 2020-12-18 | 杭州未名信科科技有限公司 | 一种阻变式存储器及其制造方法 |
Family Cites Families (15)
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JP3282172B2 (ja) * | 1994-07-29 | 2002-05-13 | ソニー株式会社 | BiMOS半導体装置の製造方法 |
US4252582A (en) * | 1980-01-25 | 1981-02-24 | International Business Machines Corporation | Self aligned method for making bipolar transistor having minimum base to emitter contact spacing |
JPS63304657A (ja) | 1987-06-04 | 1988-12-12 | Fujitsu Ltd | 半導体装置の製造方法 |
JPS63318160A (ja) * | 1987-06-19 | 1988-12-27 | Fujitsu Ltd | バイポ−ラトランジスタの製造方法 |
KR890003827B1 (ko) * | 1987-07-25 | 1989-10-05 | 재단법인 한국전자통신연구소 | 고속 고집적 반도체소자(Bicmos)의 제조방법 |
JP2746289B2 (ja) * | 1989-09-09 | 1998-05-06 | 忠弘 大見 | 素子の作製方法並びに半導体素子およびその作製方法 |
JP2740087B2 (ja) * | 1992-08-15 | 1998-04-15 | 株式会社東芝 | 半導体集積回路装置の製造方法 |
DE4301333C2 (de) * | 1993-01-20 | 2003-05-15 | Daimler Chrysler Ag | Verfahren zur Herstellung von Silizium-Germanium-Heterobipolartransistoren |
US5451798A (en) * | 1993-03-18 | 1995-09-19 | Canon Kabushiki Kaisha | Semiconductor device and its fabrication method |
JP2655052B2 (ja) * | 1993-10-07 | 1997-09-17 | 日本電気株式会社 | 半導体装置およびその製造方法 |
FR2756103B1 (fr) * | 1996-11-19 | 1999-05-14 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos et d'un condensateur |
US6121102A (en) * | 1997-03-18 | 2000-09-19 | Telfonaktiebolaget Lm Ericsson | Method of electrical connection through an isolation trench to form trench-isolated bipolar devices |
KR100275962B1 (ko) * | 1998-12-30 | 2001-02-01 | 김영환 | 반도체장치 및 그의 제조방법_ |
DE60040812D1 (de) * | 1999-03-15 | 2008-12-24 | Matsushita Electric Ind Co Ltd | Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter Bauelement |
JP3317942B2 (ja) * | 1999-11-08 | 2002-08-26 | シャープ株式会社 | 半導体装置およびその製造方法 |
-
2000
- 2000-03-14 DE DE60040812T patent/DE60040812D1/de not_active Expired - Lifetime
- 2000-03-14 EP EP00105401A patent/EP1037284A3/de not_active Withdrawn
- 2000-03-14 TW TW089104604A patent/TW460978B/zh not_active IP Right Cessation
- 2000-03-14 EP EP06012402A patent/EP1710842B1/de not_active Expired - Lifetime
- 2000-03-14 CN CNB001029924A patent/CN1215569C/zh not_active Expired - Fee Related
- 2000-03-15 KR KR1020000012953A patent/KR100630110B1/ko not_active IP Right Cessation
- 2000-03-15 US US09/526,686 patent/US6455364B1/en not_active Expired - Lifetime
-
2002
- 2002-08-07 US US10/212,799 patent/US6713790B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1037284A3 (de) | 2002-10-30 |
CN1215569C (zh) | 2005-08-17 |
CN1267916A (zh) | 2000-09-27 |
US6713790B2 (en) | 2004-03-30 |
US6455364B1 (en) | 2002-09-24 |
US20020197809A1 (en) | 2002-12-26 |
EP1710842A1 (de) | 2006-10-11 |
EP1710842B1 (de) | 2008-11-12 |
KR20000076855A (ko) | 2000-12-26 |
TW460978B (en) | 2001-10-21 |
KR100630110B1 (ko) | 2006-09-27 |
EP1037284A2 (de) | 2000-09-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: PANASONIC CORP., KADOMA, OSAKA, JP |
|
8364 | No opposition during term of opposition |