DE60030931D1 - Halbleiteranordnung und Herstellungsverfahren dafür - Google Patents

Halbleiteranordnung und Herstellungsverfahren dafür

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Publication number
DE60030931D1
DE60030931D1 DE60030931T DE60030931T DE60030931D1 DE 60030931 D1 DE60030931 D1 DE 60030931D1 DE 60030931 T DE60030931 T DE 60030931T DE 60030931 T DE60030931 T DE 60030931T DE 60030931 D1 DE60030931 D1 DE 60030931D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
method therefor
therefor
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60030931T
Other languages
English (en)
Other versions
DE60030931T2 (de
Inventor
Kaname Ozawa
Hayato Okuda
Ryuji Nomoto
Yuji Akashi
Katsuro Hiraiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE60030931D1 publication Critical patent/DE60030931D1/de
Application granted granted Critical
Publication of DE60030931T2 publication Critical patent/DE60030931T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
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US6621155B1 (en) 1999-12-23 2003-09-16 Rambus Inc. Integrated circuit device having stacked dies and impedance balanced transmission lines
US6376904B1 (en) * 1999-12-23 2002-04-23 Rambus Inc. Redistributed bond pads in stacked integrated circuit die package
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EP1713122A2 (de) 2006-10-18
EP1094517B1 (de) 2006-09-27
TW445557B (en) 2001-07-11
JP2001118877A (ja) 2001-04-27
KR20010039547A (ko) 2001-05-15
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KR100610170B1 (ko) 2006-08-09
US6215182B1 (en) 2001-04-10

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