DE10196115T1 - Verfahren zum Herstellen eines Halbleiterwafers - Google Patents

Verfahren zum Herstellen eines Halbleiterwafers

Info

Publication number
DE10196115T1
DE10196115T1 DE10196115T DE10196115T DE10196115T1 DE 10196115 T1 DE10196115 T1 DE 10196115T1 DE 10196115 T DE10196115 T DE 10196115T DE 10196115 T DE10196115 T DE 10196115T DE 10196115 T1 DE10196115 T1 DE 10196115T1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor wafer
wafer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10196115T
Other languages
English (en)
Other versions
DE10196115B4 (de
Inventor
Toru Taniguchi
Etsuro Morita
Satoshi Matagawa
Seiji Harada
Isoroku Ono
Mitsuhiro Endo
Fumihiko Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumitomo Mitsubishi Silicon Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2000122272A external-priority patent/JP3494119B2/ja
Priority claimed from JP2000199561A external-priority patent/JP2002025950A/ja
Priority claimed from JP2000255018A external-priority patent/JP2001232561A/ja
Application filed by Sumitomo Mitsubishi Silicon Corp filed Critical Sumitomo Mitsubishi Silicon Corp
Publication of DE10196115T1 publication Critical patent/DE10196115T1/de
Application granted granted Critical
Publication of DE10196115B4 publication Critical patent/DE10196115B4/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/28—Work carriers for double side lapping of plane surfaces
DE10196115T 2000-04-24 2001-04-23 Verfahren zum Polieren eines Halbleiterwafers Expired - Lifetime DE10196115B4 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP2000/122272 2000-04-24
JP2000122272A JP3494119B2 (ja) 2000-04-24 2000-04-24 両面研磨装置を用いた半導体ウェーハの研磨方法
JP2000199561A JP2002025950A (ja) 2000-06-30 2000-06-30 半導体ウェーハの製造方法
JP2000/199561 2000-06-30
JP2000255018A JP2001232561A (ja) 1999-12-16 2000-08-25 両面研磨装置を用いた半導体ウェーハの研磨方法
JP2000/255018 2000-08-25
PCT/JP2001/003509 WO2001082354A1 (fr) 2000-04-24 2001-04-23 Procédé de fabrication d'une plaquette de semi-conducteur

Publications (2)

Publication Number Publication Date
DE10196115T1 true DE10196115T1 (de) 2003-05-08
DE10196115B4 DE10196115B4 (de) 2011-06-16

Family

ID=27343177

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10196115T Expired - Lifetime DE10196115B4 (de) 2000-04-24 2001-04-23 Verfahren zum Polieren eines Halbleiterwafers

Country Status (6)

Country Link
US (2) US7589023B2 (de)
KR (1) KR100737879B1 (de)
CN (1) CN1203530C (de)
DE (1) DE10196115B4 (de)
TW (1) TW507281B (de)
WO (1) WO2001082354A1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10196254B4 (de) * 2000-05-31 2010-12-02 Sumitomo Mitsubishi Silicon Corp. Verfahren zum Polieren von Halbleiterwafern unter Verwendung eines beidseitigen Polierers
DE102009051008B4 (de) * 2009-10-28 2013-05-23 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe

Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10314212B4 (de) * 2002-03-29 2010-06-02 Hoya Corp. Verfahren zur Herstellung eines Maskenrohlings, Verfahren zur Herstellung einer Transfermaske
US7150674B2 (en) * 2002-10-09 2006-12-19 Koyo Machine Industries Co., Ltd. Both-side grinding method and both-side grinding machine for thin disc work
KR100486144B1 (ko) * 2002-12-11 2005-04-29 주식회사 실트론 실리콘웨이퍼의 연마 방법
JP4273943B2 (ja) * 2003-12-01 2009-06-03 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
KR100797734B1 (ko) * 2003-12-05 2008-01-24 가부시키가이샤 섬코 편면 경면 웨이퍼의 제조 방법
JP4854936B2 (ja) * 2004-06-15 2012-01-18 信越半導体株式会社 シリコンウエーハの製造方法及びシリコンウエーハ
US7829152B2 (en) * 2006-10-05 2010-11-09 Lam Research Corporation Electroless plating method and apparatus
JP2006100799A (ja) * 2004-09-06 2006-04-13 Sumco Corp シリコンウェーハの製造方法
JP4448766B2 (ja) * 2004-12-08 2010-04-14 信越化学工業株式会社 研磨方法
JP4727218B2 (ja) * 2004-12-10 2011-07-20 株式会社住友金属ファインテック 両面研磨用キャリア
US20070148917A1 (en) * 2005-12-22 2007-06-28 Sumco Corporation Process for Regeneration of a Layer Transferred Wafer and Regenerated Layer Transferred Wafer
KR100744099B1 (ko) * 2006-04-12 2007-08-01 조선대학교산학협력단 씨엠피장비의 슬러리 공급 노즐
KR100897387B1 (ko) * 2007-07-27 2009-05-14 정천섭 회전판의 편심회전장치
JP5301802B2 (ja) * 2007-09-25 2013-09-25 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 半導体ウェハの製造方法
US8596946B2 (en) * 2008-01-28 2013-12-03 The Richard C. Lydle 2008 Delaware Trust Watercraft dry dock storage systems and methods
JP2009302338A (ja) * 2008-06-13 2009-12-24 Sumco Corp ウェーハの研磨方法および該方法により製造されるウェーハ
JP2009302409A (ja) * 2008-06-16 2009-12-24 Sumco Corp 半導体ウェーハの製造方法
JP5600867B2 (ja) * 2008-06-16 2014-10-08 株式会社Ｓｕｍｃｏ 半導体ウェーハの製造方法
JP2009302410A (ja) * 2008-06-16 2009-12-24 Sumco Corp 半導体ウェーハの製造方法
DE102009015878A1 (de) * 2009-04-01 2010-10-07 Peter Wolters Gmbh Verfahren zum materialabtragenden Bearbeiten von flachen Werkstücken
JP5381304B2 (ja) 2009-05-08 2014-01-08 株式会社Ｓｕｍｃｏ シリコンエピタキシャルウェーハの製造方法
DE102009025242B4 (de) * 2009-06-17 2013-05-23 Siltronic Ag Verfahren zum beidseitigen chemischen Schleifen einer Halbleiterscheibe
DE102009025243B4 (de) * 2009-06-17 2011-11-17 Siltronic Ag Verfahren zur Herstellung und Verfahren zur Bearbeitung einer Halbleiterscheibe aus Silicium
JP2011029355A (ja) * 2009-07-24 2011-02-10 Sumco Corp レーザマーク付き半導体ウェーハの製造方法
JPWO2011083667A1 (ja) * 2010-01-05 2013-05-13 住友電気工業株式会社 化合物半導体ウェハの加工方法及び加工装置
DE102010013519B4 (de) * 2010-03-31 2012-12-27 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe
DE102010013520B4 (de) * 2010-03-31 2013-02-07 Siltronic Ag Verfahren zur beidseitigen Politur einer Halbleiterscheibe
DE102010014874A1 (de) * 2010-04-14 2011-10-20 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102010026352A1 (de) 2010-05-05 2011-11-10 Siltronic Ag Verfahren zur gleichzeitigen beidseitigen Material abtragenden Bearbeitung einer Halbleiterscheibe
DE102010042040A1 (de) * 2010-10-06 2012-04-12 Siltronic Ag Verfahren zum Schleifen einer Halbleiterscheibe
CN102034720B (zh) * 2010-11-05 2013-05-15 南通富士通微电子股份有限公司 芯片封装方法
CN102034721B (zh) 2010-11-05 2013-07-10 南通富士通微电子股份有限公司 芯片封装方法
DE102011003008B4 (de) * 2011-01-21 2018-07-12 Siltronic Ag Führungskäfig und Verfahren zur gleichzeitig beidseitigen Material abtragenden Bearbeitung von Halbleiterscheiben
JP5479390B2 (ja) * 2011-03-07 2014-04-23 信越半導体株式会社 シリコンウェーハの製造方法
JP5789869B2 (ja) * 2011-07-28 2015-10-07 東邦エンジニアリング株式会社 研磨パッド用補助板および研磨パッド用補助板を備えた研磨装置
DE102011082857B4 (de) 2011-09-16 2020-02-20 Siltronic Ag Verfahren zur gleichzeitigen beidseitigen Material abtragenden Bearbeitung wenigstens dreier Werkstücke
US8986071B2 (en) 2011-12-06 2015-03-24 White Drive Products, Inc. Parts carrier assembly for grinding machine
US9427841B2 (en) * 2013-03-15 2016-08-30 Ii-Vi Incorporated Double-sided polishing of hard substrate materials
CN103624665B (zh) * 2013-11-26 2018-05-01 浙江汇锋塑胶科技有限公司 一种蓝宝石触摸面板的两面抛光方法
JP6015683B2 (ja) * 2014-01-29 2016-10-26 信越半導体株式会社 ワークの加工装置およびワークの加工方法
CN103847032B (zh) * 2014-03-20 2016-01-06 德清晶辉光电科技有限公司 一种大直径超薄石英晶片的生产工艺
CN104015122A (zh) * 2014-06-18 2014-09-03 蓝思科技股份有限公司 一种蓝宝石面板的双面铜盘研磨工艺
KR101660900B1 (ko) * 2015-01-16 2016-10-10 주식회사 엘지실트론 웨이퍼 연마 장치 및 이를 이용한 웨이퍼 연마 방법
JP6421640B2 (ja) * 2015-02-25 2018-11-14 株式会社Sumco 半導体ウェーハの枚葉式片面研磨方法および半導体ウェーハの枚葉式片面研磨装置
KR101759875B1 (ko) * 2015-06-24 2017-07-20 주식회사 엘지실트론 웨이퍼 연마장치의 스캔장치 및 스캔시스템
JP6424809B2 (ja) * 2015-12-11 2018-11-21 信越半導体株式会社 ウェーハの両面研磨方法
SG11201806747QA (en) * 2016-02-16 2018-09-27 Shin Etsu Handotai Co Ltd Double-side polishing method and double-side polishing apparatus
JP6974116B2 (ja) * 2017-10-27 2021-12-01 株式会社荏原製作所 基板保持装置並びに基板保持装置を備えた基板処理装置および基板処理方法
CN107717715A (zh) * 2017-11-16 2018-02-23 无锡佳力欣精密机械有限公司 一种铜基止推轴承表面划痕处理工艺与装置
CN107993936A (zh) * 2017-11-30 2018-05-04 北京创昱科技有限公司 衬底加工方法
CN113894635B (zh) * 2021-11-03 2022-06-21 安徽格楠机械有限公司 基于自学习的智能硅基晶圆超精密研磨抛光机
CN117140304B (zh) * 2023-10-30 2024-01-09 新乡市至德精密设备有限公司 一种便于更换磨盘的双面研磨机
CN117798802A (zh) * 2024-03-01 2024-04-02 苏州中航天成电子科技有限公司 一种金属封装外壳用抛光设备

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122087A (en) 1978-03-16 1979-09-21 Nippon Telegr & Teleph Corp <Ntt> Simultaneous working method for both surfaces of wafer
JPS5612734A (en) 1979-07-10 1981-02-07 Nec Corp Wafer polishing method
JPS60197367A (ja) 1984-03-19 1985-10-05 Toshiba Ceramics Co Ltd 鏡面ウエハの製造方法
JPH0725024B2 (ja) 1987-11-11 1995-03-22 長岡精機株式会社 ラップ盤
JPH029571A (ja) 1988-06-28 1990-01-12 Fujitsu Ltd 両面研磨方法
DE3929484A1 (de) * 1989-09-05 1991-03-14 Wacker Chemitronic Verfahren zum zweiseitigen chemomechanischen polieren von halbleiterscheiben, sowie vorrichtung zu seiner durchfuehrung und dadurch erhaeltliche halbleiterscheiben
JPH03188630A (ja) * 1989-12-18 1991-08-16 Sony Corp 半導体基板の製法
JP2866175B2 (ja) * 1990-09-14 1999-03-08 昭和アルミニウム株式会社 ワークの両面等厚研磨加工法
US5514245A (en) * 1992-01-27 1996-05-07 Micron Technology, Inc. Method for chemical planarization (CMP) of a semiconductor wafer to provide a planar surface free of microscratches
JPH06275525A (ja) 1993-03-18 1994-09-30 Shin Etsu Handotai Co Ltd Ｓｏｉ基板及びその製造方法
JP2839822B2 (ja) 1993-08-02 1998-12-16 三菱マテリアルシリコン株式会社 高平坦度ウェーハの製造方法
JPH0911112A (ja) * 1995-06-30 1997-01-14 Komatsu Electron Metals Co Ltd 半導体ウェハの研磨方法
JP3169120B2 (ja) * 1995-07-21 2001-05-21 信越半導体株式会社 半導体鏡面ウェーハの製造方法
US5643405A (en) 1995-07-31 1997-07-01 Motorola, Inc. Method for polishing a semiconductor substrate
US5958794A (en) * 1995-09-22 1999-09-28 Minnesota Mining And Manufacturing Company Method of modifying an exposed surface of a semiconductor wafer
JPH09252100A (ja) * 1996-03-18 1997-09-22 Shin Etsu Handotai Co Ltd 結合ウェーハの製造方法及びこの方法により製造される結合ウェーハ
JPH10135164A (ja) 1996-10-29 1998-05-22 Komatsu Electron Metals Co Ltd 半導体ウェハの製造方法
JPH10135165A (ja) * 1996-10-29 1998-05-22 Komatsu Electron Metals Co Ltd 半導体ウェハの製法
JPH10202511A (ja) * 1997-01-21 1998-08-04 Fujikoshi Mach Corp 両面研磨装置
DE19704546A1 (de) 1997-02-06 1998-08-13 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe
JPH11156699A (ja) * 1997-11-25 1999-06-15 Speedfam Co Ltd 平面研磨用パッド
JPH11233462A (ja) * 1998-02-09 1999-08-27 Naoetsu Electronics Co Ltd 半導体ウエハの両面研磨方法
JPH11254308A (ja) * 1998-03-06 1999-09-21 Fujikoshi Mach Corp 両面研磨装置
JPH11254302A (ja) 1998-03-06 1999-09-21 Fujikoshi Mach Corp 両面研磨装置
US5897426A (en) * 1998-04-24 1999-04-27 Applied Materials, Inc. Chemical mechanical polishing with multiple polishing pads
JP4308344B2 (ja) * 1998-07-24 2009-08-05 不二越機械工業株式会社 両面研磨装置
TW416104B (en) * 1998-08-28 2000-12-21 Kobe Steel Ltd Method for reclaiming wafer substrate and polishing solution composition for reclaiming wafer substrate
JP3528166B2 (ja) 1998-09-10 2004-05-17 三菱住友シリコン株式会社 高平坦度ウェーハの製造方法
JP2000094307A (ja) * 1998-09-18 2000-04-04 Ebara Corp ポリッシング装置
JP3329288B2 (ja) * 1998-11-26 2002-09-30 信越半導体株式会社 半導体ウエーハおよびその製造方法
JP2000216119A (ja) * 1999-01-26 2000-08-04 Mitsubishi Materials Silicon Corp 高平坦度ウェ―ハの加工方法
JP2000260738A (ja) * 1999-03-10 2000-09-22 Hitachi Ltd 半導体基板の研削加工方法ならびに半導体装置および半導体装置の製造方法
DE60025989T2 (de) * 1999-04-09 2006-11-09 Tosoh Corp., Shinnanyo Formschleifprodukt und Benutzung in einer Polierscheibe
US6432823B1 (en) * 1999-11-04 2002-08-13 International Business Machines Corporation Off-concentric polishing system design
US20010039101A1 (en) * 2000-04-13 2001-11-08 Wacker Siltronic Gesellschaft Fur Halbleitermaterialien Ag Method for converting a reclaim wafer into a semiconductor wafer
US6709981B2 (en) * 2000-08-16 2004-03-23 Memc Electronic Materials, Inc. Method and apparatus for processing a semiconductor wafer using novel final polishing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10196254B4 (de) * 2000-05-31 2010-12-02 Sumitomo Mitsubishi Silicon Corp. Verfahren zum Polieren von Halbleiterwafern unter Verwendung eines beidseitigen Polierers
DE102009051008B4 (de) * 2009-10-28 2013-05-23 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
US8685270B2 (en) 2009-10-28 2014-04-01 Siltronic Ag Method for producing a semiconductor wafer

Also Published As

Publication number Publication date
CN1437762A (zh) 2003-08-20
US8283252B2 (en) 2012-10-09
KR100737879B1 (ko) 2007-07-10
US20100009605A1 (en) 2010-01-14
US20030104698A1 (en) 2003-06-05
WO2001082354A1 (fr) 2001-11-01
US7589023B2 (en) 2009-09-15
CN1203530C (zh) 2005-05-25
TW507281B (en) 2002-10-21
KR20030003263A (ko) 2003-01-09
DE10196115B4 (de) 2011-06-16

Similar Documents

Publication Publication Date Title
DE10196115T1 (de) Verfahren zum Herstellen eines Halbleiterwafers
DE60239809D1 (de) Gerät und verfahren zum herstellen einer halbleitervorrichtung und verfahren zum reinigen eines halbleiterherstellungsgerätes
DE69619602D1 (de) Verfahren zum Herstellen eines Halbleiter-Substrats
DE60045636D1 (de) Verfahren zur behandlung eines halbleitersubstrats
DE60238583D1 (de) Herstellungsverfahren eines Halbleiterbauelements
DE60142377D1 (de) Verfahren zum Trockenätzen für Halbleiteranordnung
DE50209782D1 (de) Verfahren zum herstellen einer selbstjustierten struktur auf einem halbleiter-wafer
DE10194791T1 (de) Verfahren zum Bilden von Halbleiterstrukturen
DE60039054D1 (de) Gt-polierkörper, poliervorrichtung, polierverfahren und verfahren zum herstellen einer halbleitervorrichtung (2002/23)
DE50313644D1 (de) Verfahren zum herstellen einer kondensatoranordnung und kondensatoranordnung
DE60132748D1 (de) Herstellungsverfahren für ein Halbleiterbauelement unter Benutzung eines Dummy-Gates
DE112004001619D2 (de) Verfahren zum Herstellen von Halbleiterchips
DE60226286D1 (de) Verfahren zum Herstellen eines Hakenbestandteils
DE60122131D1 (de) Verfahren zum verkleben eines fügeteils
DE69916728D1 (de) Verfahren zur Reinigung eines Halbleitersubstrats
DE59912777D1 (de) Verfahren zum herstellen eines thermoelektrischen wandlers
DE60123532D1 (de) Scheibenkerbungs-Poliermaschine und Verfahren zum Polieren einer Orientierungskerbung einer Halbleiterscheibe
ATE308575T1 (de) Verfahren zum herstellen eines elastomeren
DE50211139D1 (de) Verfahren zum rückseitenschleifen von wafern
DE60045302D1 (de) Verfahren zur Dotierung eines Halbleiterkörpers
DE60143761D1 (de) Herstellungsverfahren für einen siliziumwafer
DE50113179D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE60037188D1 (de) Verfahren zum Betreiben eines Suszeptors für Halbleiterscheiben
DE602004031832D1 (de) Verfahren zum herstellen eines siliziumoxidfilms u
DE60219540D1 (de) Verfahren und Vorrichtung zum Planarisieren einer Halbleiterscheibe

Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8128 New person/name/address of the agent

Representative=s name: HOESSLE PATENTANWAELTE PARTNERSCHAFT, 70173 STUTTG

R018 Grant decision by examination section/examining division
R020 Patent grant now final

Effective date: 20110917

R082 Change of representative

Representative=s name: GLAWE DELFS MOLL PARTNERSCHAFT MBB VON PATENT-, DE

Representative=s name: RAIBLE, DEISSLER, LEHMANN PATENTANWAELTE PARTG, DE

R082 Change of representative

Representative=s name: RAIBLE, DEISSLER, LEHMANN PATENTANWAELTE PARTG, DE

R071 Expiry of right