CN101595562A - 堆叠封装 - Google Patents

堆叠封装 Download PDF

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Publication number
CN101595562A
CN101595562A CNA2007800504745A CN200780050474A CN101595562A CN 101595562 A CN101595562 A CN 101595562A CN A2007800504745 A CNA2007800504745 A CN A2007800504745A CN 200780050474 A CN200780050474 A CN 200780050474A CN 101595562 A CN101595562 A CN 101595562A
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sub
microelectronic element
component
edge
rear surface
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CN101595562B (zh
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B·哈巴
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Adeia Semiconductor Solutions LLC
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Tessera LLC
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Dicing (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

一种微电子组件(34)，包括带有第一后表面(16)的第一微电子元件(12)。该组件进一步包括带有第二后表面(16a)的第二微电子元件(12a)。第二微电子元件(12a)连接于第一微电子元件(12)以形成堆叠封装(34)。第一微电子元件(12)的第一后表面(16)面向第二微电子元件(12a)的第二后表面(16a)。

Description

堆叠封装
相关申请交叉参考
[0001]本国际申请要求2006年12月28日提交的美国申请11/648172的优先权。
技术领域
[0002]本发明通常涉及堆叠微电子封装，尤其涉及以晶片级制造的堆叠微电子封装以及制作此种封装的方法。
背景技术
[0003]半导体芯片是带有触点的扁平体，所述触点设在与芯片自身内部电路相连的前表面上。半导体芯片典型地用衬底封装以形成具有与芯片触点电连接的端子的微电子封装。这种封装接着被连接于测试设备以确定被封装的装置是否符合所要求的性能标准。一旦被测试，封装可能被连接到更大的线路，如，电脑或手机等电子产品内的线路。
[0004]根据与用于形成封装的工艺的适配性来选择用于封装半导体芯片的衬底材料。如，在焊接或其它结合操作中，对衬底施加很强的热。相应地，金属引线架已被使用作为衬底。层叠衬底也用于封装微电子装置。这些可以衬底包括两个或四个玻璃纤维和环氧树酯的交错层，其中，连续的玻璃纤维层可在横切如正交方向上被敷设。可选择地，耐热化合物如双马来酰亚胺-三嗪树脂(BT)可被加入这样的层叠衬底中。
[0005]窄带已被用作衬底来提供更细的微电子封装。这样的窄带典型地以薄片或薄片卷的形式提供。如，通常使用单侧或双侧的聚酰亚胺上覆铜的薄片。聚酰亚胺基薄膜提供了优质的热和化学稳定性以及低介电常数，同时具有高抗拉强度、延展性及挠性的铜已被优选用于柔韧线路和芯片级封装应用中。但是，这样的窄带相对较昂贵，特别是与引线架和层叠衬底相比较而言。
[0006]微电子封装也包括晶片级封装，其提供了一种用于当模具仍然为晶片形式时被制造的半导体部件的封装。该晶片经受许多额外的加工步骤以形成封装结构并且晶片被切成块以释放单个模具，不需要额外的制造步骤。晶片级加工提供了这样的优点：即封装加工成本在晶片上的不同模具间被分割，导致在模具和部件之间形成了较低的价格差异。而且，封装占地面积大致相似于模具的尺寸，结果导致印制电路板(PCB)上最终要与模具连接的区域的高效利用。基于这些特点，以此方式封装的模具通常被称为晶片级芯片级封装(WLCSP)。
[0007]为了节省空间，某些常规设计已在封装内堆叠了多个微电子芯片。这样就使得封装在衬底上占用的表面积小于堆叠内的芯片的总表面积。
[0008]尽管有以上诸多优点，但仍须一种改进的晶片级封装特别是堆叠晶片级封装，其可靠且制造成本低。
发明内容
[0009]本发明涉及一种包括带有第一后表面的第一微电子元件的微电子组件。该组件进一步包括带有第二后表面的第二微电子元件。第二微电子元件连接于第一微电子元件以形成堆叠封装。第一微电子元件的第一后表面面向第二微电子元件的第二后表面。
[0010]此外，该组件包括至少一个桥接元件。第一微电子元件和第二微电子元件每个都带有前表面和多个在前表面处暴露出的触点。所述至少一个桥接元件在第一微电子元件的所述多个触点与第二微电子元件的所述多个触点之间延伸以将二者电连接。
[0011]一方面，第一微电子元件包括从第一微电子元件的前表面延伸到后表面的第一边缘和第二边缘。并且所述至少一个桥接元件设置在第一边缘和第二边缘的外部。还可包括暴露在第一微电子元件和第二微电子元件各自的前表面上的多个轨迹。所述多个轨迹中至少一些从第一微电子元件上的所述多个触点的至少一些延伸到所述至少一个桥接元件，并且所述多个轨迹中的至少一些从第二微电子元件的所述多个触点的至少一些延伸到所述至少一个桥接元件。
[0012]某些实施例中的微电子组件包括一种粘合剂，其将第一微电子元件和第二微电子元件连接起来。另一方面，第一微电子元件包括第一边缘和第二边缘。至少一个桥接元件位于第一边缘和第二边缘之间。此外，第二微电子元件也可带有第一边缘和第二边缘，从而所述至少一个桥接元件位于第二微电子元件的第一边缘和第二边缘之间。
[0013]另一方面，第一微电子元件包括多个从前表面延伸到后表面的通孔，并且所述至少一个桥接元件设置在所述多个通孔中的至少一个内。
[0014]该组件进一步包括带有前表面和后表面的第三微电子元件和带有后表面的第四微电子元件。第三和第四微电子元件连接在一起以使第三微电子元件的后表面面向第四微电子元件的后表面。第三微电子元件也连接在第一、二(the first second)微电子元件上以使第三微电子元件的前表面面向第二微电子元件的前表面。
[0015]本发明还涉及一种组装堆叠微电子组件的方法，该方法包括以下步骤：通过将包括多个微电子元件的第一子组件堆叠到包括多个微电子元件的第二子组件上，形成微电子组件。第一子组件和第二子组件的后表面相互面对。接下来，将在第一子组件前表面处暴露的多个触点与在第二子组件的前表面处暴露的多个触点相连。
[0016]第一子组件和第二子组件每个都包括锯道，它们在形成微电子组件的步骤期间是对齐的。并且此方法可包括穿过第一和第二子组件的锯道来切割形成独立堆叠单元。第一子组件和第二子组件的所述多个微电子元件中至少有一些带有轨迹，轨迹从各个触点延伸到相应的第一子组件和第二子组件的各个锯道，从而在切割步骤后轨迹暴露。
附图说明
[0017]图1A是根据本发明一个实施例的子组件的俯视图；
[0018]图1B是图1A中子组件的横截面图；
[0019]图2是互相连接以形成堆叠组件的多个子组件的横截面图；
[0020]图3是图2中的堆叠组件被切成独立单元后的横截面图；
[0021]图4是图3中的独立单元互相上下堆叠的横截面图；
[0022]图5A是根据本发明一个实施例的子组件的俯视图；
[0023]图5B是图5A中的子组件的横截面图；
[0024]图6是图5B中的子组件在组装后期的横截面图；
[0025]图7是相互连接以形成堆叠组件的多个图6所示子组件的横截面图；
[0026]图8是图7中的堆叠组件已被切成独立单元后的横截面图；并且
[0027]图9是图8中的独立单元互相上下堆叠的横截面图。
具体实施方式
[0028]现在参照图1A和1B，其分别示出了晶片或第一子组件10的俯视图和横截面图。正如图中所示，第一晶片或子组件10的一部分包括多个微电子元件12，每个都一个挨一个排列并且互相邻近。第一子组件优选包括多排的微电子元件12，其沿着X-轴和Y-轴以各列和各行对齐。微电子元件12通过使用常规的半导体工艺技术彼此一体地形成。本发明也适用于再造的晶片。
[0029]每个微电子元件12包括前表面14和相反地面向的后表面16。微电子元件12也包括第一边缘18、第二边缘20、第三边缘19和第四边缘21，所有这些边缘都从微电子元件12的前表面14延伸到后表面16。正如图1A和1B所示，某个微电子元件12的第一边缘18连接于第二且相邻的微电子元件12的第二边缘20上。因此，位于第一子组件10中部的微电子元件12在四个边缘处被相邻微电子元件12划界，如图1A所示。位于晶片的第一末端11、第二末端13、第三末端15或第四末端17处的微电子元件12具有至少一个不被另外的微电子元件阻碍的边缘。
[0030]尽管这些边缘在图中被描述旨在使阐述更清晰，但实际上，这些边缘是不可视的。相反，在这个阶段，相邻的微电子元件12彼此接触的边缘或带是锯道或带，在此晶片能被切割而不损坏各独立微电子元件。举例说明，如图1B所示，微电子元件12’的第二边缘20’邻接微电子元件12”的第一边缘18”且形成了锯道23。相似地，贯穿晶片10，锯道23位于微电子元件12互相邻接的位置处。第一晶片/子组件10包括少至1个或多至如所期望那么多的微电子元件。
[0031]在子组件10内的每个微电子元件12包括暴露在它们的各自前表面16处的多个触点22。此外，触点22连接于从触点22延伸到微电子元件的一条边缘的轨迹24。如，微电子元件12’包括触点22’和轨迹24’，该轨迹从触点22’延伸到微电子元件12’的第一边缘18’。类似地，微电子12”包括触点22”和轨迹24”，轨迹从触点22”延伸到微电子元件12”的第二边缘20”。在一实施例中，轨迹24’和24”实际上是在相邻微电子元件12’、12”的触点22’和22”之间延伸的整体结构。因此，轨迹24’和24”在微电子元件12’和12”的连接点处或在锯道23’处相遇。但是，并不要求轨迹真正地互相接触，相反这些轨迹24简单地朝着微电子元件12的相应末端延伸并且进入锯道的宽度中。
[0032]正如图2所示，为产生一种堆叠组件30，第一子组件10位于第二晶片/子组件10A下方。第二子组件10A与第一子组件10类似地构成，并且因此类似元件将被注明相同的附图标记，除非另外指定。
[0033]如图2所示，第二组件10A是倒置的以使在微电子元件12A的前表面14A处暴露的触点22A朝向与子组件10的触点22相反的相反方向。因此，如图2所示，子组件10A的后表面16A面向子组件10的后表面16。当定位各个子组件10、10A时，微电子元件12与微电子元件12A对齐。每个微电子元件12、12A的各自的第一、第二、第三和第四边缘沿着各自的纵轴对齐。且每个子组件10、10A的各个锯道23、23A也对齐。堆叠组件30由多个微电子元件12、12A组成，这些元件以不同的行和列被定向和对齐。
[0034]为了连接两个子组件10、10a，粘性层32位于后表面16、16A之间且粘附在那里。粘性层32优选由粘合剂、环氧树脂或类似物组成，并且一旦凝固，在两个子组件10、10A之间保持连接以使子组件互相连接且形成堆叠组件30。两个子组件10、10A可使用其他方法进行连接，这些方法不涉及粘合剂的使用，如直接将子组件10的后表面16连接于第二子组件10A的后表面16A。可使用如焊接结合、共熔结合、扩散结合或其它已知的结合方法。
[0035]下一步，堆叠组件30被图中未示出的机械切割工具切割成独立堆叠单元34。此种机械切割工具的实施例可在美国专利6646289和6972480中找到，其公开内容在此并入作为参考。堆叠组件30在与各独立子组件10、10A的锯道23、23A和微电子元件12、12A的各边缘对应的位置处被切割。因为远离触点22、22A的轨迹24、24A末端位于锯道23、23A内，所以堆叠组件30的切割引起了这些末端的暴露。
[0036]每个独立堆叠单元34包括微电子元件12A，其位于微电子元件12上部且被粘性层32与其相连。微电子元件12、12A的各自前表面14、14A朝向相反，与微电子元件的各个触点22、22A的定位方式一样。此外，独立堆叠单元34包括第一侧壁36和第二侧壁38，第一侧壁和第二侧壁在微电子元件12和12A的各自前表面14、14A之间延伸。邻近侧壁36、38的是在切割过程后显露出的轨迹24、24A的末端。
[0037]桥接元件如轨迹桥40形成于侧壁36和38上。轨迹桥40从轨迹40跨过侧壁36或侧壁38延伸到轨迹24A，并且因此使设在独立堆叠单元34的相对表面上的两个轨迹电性互连。轨迹桥延伸到大约微电子元件的边缘和粘性层32的边缘，该粘性层在切割过程后显露。由于有轨迹桥40的作用，触点22与触点22A可电通信。在轨迹桥40形成前，介电层41可设置在微电子元件和粘性层的显露的边缘上，从而在需要时将轨迹桥与微电子元件体电隔离。
[0038]仍然根据图3，成团的传导材料42可被沉积在触点22上以使独立堆叠单元34电连接到衬底如线路板等。该成团的传导材料42可以是焊球或类似材料。
[0039]根据本发明的一方面，独立堆叠单元34和34’互相上下堆叠，使独立堆叠单元34的触点与独立堆叠单元34’的触点电连接，如图4所示。例如，为了电连接独立堆叠单元34、34’，暴露在堆叠单元34的下表面52处的触点50与暴露在堆叠单元34’的顶表面54’处的触点50’对齐。触点50和50’然后可通过使用成团的传导材料56如焊料被电连接或通过使用本领域技术人员已知的其它方法互相连接。
[0040]本发明的一方面，提供包括多个微电子元件112的子组件110，如图5A和5B所示。子组件110与子组件10构成相似且包括许多相同的特征。由于这个原因，除非被指定，类似元件将用相同的附图标记表示。子组件110的微电子元件112包括前表面114和相反地面对的后表面116。
[0041]此外，每个微电子元件112包括在前表面114和后表面116之间延伸的第一边缘118、第二边缘120、第三边缘119、和第四边缘121。位置是第一微电子元件的一边缘邻接第二微电子元件的一边缘形成锯道123。如参考子组件10所描述的，锯道可被穿通切断而不破坏子组件110的独立微电子元件112。尽管为了清晰地描述，图5A到5B中示出了分界线，但实际上相邻微电子元件112之间的清楚分隔不可辨认。每个微电子元件112还包括多个暴露在各自前表面114处的触点122。虽然子组件110被描述为带有四列和三排微电子元件，但微电子元件的数量可少至1个或多至任意所需的数目。
[0042]下一步，参考图6，子组件110经受机械切割工序，其穿过每个微电子元件112钻出通孔130。通孔从每个微电子元件的后表面116延伸到前表面114。且每个通孔130优选与暴露在每个微电子元件112的前表面114上的触点122对齐，以使触点122不仅暴露在前表面114处也暴露在后表面116处。
[0043]在通孔130形成后，其被传导材料131如金属所填充。传导材料131例如可由铜或铜金合金形成。
[0044]如图7所示，可通过将第一子组件110连接于第二子组件110’而组装堆叠组件132。第二子组件110’具有类似于子组件110的构造，并且除非被指定，相同的特征采用相同的附图标记。为了形成堆叠组件132，第二子组件110’被倒置以使第二子组件的微电子元件112’的后表面116’面向微电子元件112的后表面116。当两个子组件对齐时，子组件110的锯道123与第二子组件110’的锯道123’对齐，并且每个子组件的通孔130、130’也对齐。通过将通孔130与通孔130’对齐，微电子元件112的触点122与第二子组件的触点122’对齐，并且每个通孔130、130’的传导材料131、131’互相接近。
[0045]为了将第二子组件110’连接于子组件110，第二传导材料137可被采用。如，成团的第二传导材料137如焊料设置在通孔130内或周围，邻近微电子元件112的后表面116且与通孔内包含的传导材料131相接触。接着子组件110接近第二子组件110’以使第二传导材料137邻近通孔130’并且与第二子组件的传导材料131’接触。如图7所示，这种构造导致触点122通过设置在通孔130、130’内的各种传导材料电连接于触点122’，且因此传导材料131、131’用作触点122、122’之间的电桥。回填物如密封剂材料134或粘结剂可被置于两个子组件110、110’之间以给堆叠组件132提供额外的刚度。
[0046]在可选择的实施例中，虽然图中未示出，子组件110的传导材料131可直接粘附于第二子组件110’的传导材料131’。例如，如果传导材料130、130’是铜，在每个通孔130、130’内的铜被回流且使其与对齐的通孔内的铜接触。一旦固化，在相邻通孔130、130’内的铜不仅形成了子组件之间的连接区域，而且也形成触点122、122’之间的电连接。
[0047]现准备将堆叠组件132切成独立堆叠单元140。为此，先前描述的类似机械工具(在图中未示)被带到接近每个子组件110、110’的锯道123、123’。该机械工具在对应于锯道123、123’的位置处穿过堆叠组件132，因此将堆叠组件切成独立堆叠单元140。当然，如果堆叠组件132由仅包括单个微电子元件的子组件构成，就不需要切割步骤了。成团的焊料142或其它传导材料被设置在暴露的触点122或122’上以使独立堆叠单元140连接于衬底如线路板。
[0048]如果需要，堆叠组件132也可连接于线路板而不必将组件切成独立单元。
[0049]根据本发明的一方面，独立堆叠单元140、140’可相互上下堆叠，同时使独立堆叠单元140的触点电连接于独立堆叠单元140’的触点。例如，为了电连接独立堆叠单元140、140’，暴露在堆叠单元140下表面152处的触点150与暴露在堆叠单元140’的顶表面154’处的触点150’对齐。接着触点150和150’可使用成团的传导材料156如焊料电连接或通过使用本领域技术人员已知的其它方法互相连接。整个组件160可连接于衬底如图9所示的包括传导垫172的线路板170。
[0050]虽然本发明已经参照特定实施例进行了描述，但要了解到这些实施例对本发明的原理和应用来说仅为示例性的。因此要了解，可对示例性的实施例作出改进并且可发明其它装置，这些都不脱离被所附权利要求所界定的本发明的精神和范围。

Claims (19)

1.一种微电子组件，包括：
带有第一后表面的第一微电子元件；
带有第二后表面的第二微电子元件，该第二微电子元件连接于第一微电子元件以形成堆叠封装；其中第一微电子元件的第一后表面面向第二微电子元件的第二后表面；且
至少一个桥接元件，其中第一微电子元件和第二微电子元件每个都具有前表面和暴露于前表面处的多个触点，其中所述至少一个桥接元件在第一微电子元件的所述多个触点与第二微电子元件的所述多个触点之间延伸以将二者电连接。
2.如权利要求1所述的微电子组件，其特征在于，第一微电子元件包括从第一微电子元件的前表面延伸到后表面的第一边缘和第二边缘，其中所述至少一个桥接元件设置在第一边缘和第二边缘的外部。
3.如权利要求2所述的微电子组件，其特征在于，进一步包括暴露在第一微电子元件和第二微电子元件的各个前表面上的多个轨迹，所述多个轨迹中至少一些从第一微电子元件的所述多个触点中的至少一些延伸到所述至少一个桥接元件，并且所述多个轨迹中至少一些从第二微电子元件的所述多个触点中的至少一些延伸到所述至少一个桥接元件。
4.如权利要求3所述的微电子组件，其特征在于，进一步包括将第一微电子元件粘附于第二微电子元件的粘结剂。
5.如权利要求1所述的微电子组件，其特征在于，第一微电子元件包括第一边缘和第二边缘，其中所述至少一个桥接元件位于第一边缘和第二边缘之间。
6.如权利要求5所述的微电子组件，其特征在于，第二微电子元件带有第一边缘和第二边缘，并且其中所述至少一个桥接元件位于第二微电子元件的第一边缘和第二边缘之间。
7.如权利要求6所述的微电子组件，其特征在于，第一微电子元件包括从前表面延伸到后表面的多个通孔，其中所述至少一个桥接元件设置在所述多个通孔的至少一个内。
8.如权利要求1所述的微电子组件，其特征在于，进一步包括带有前表面和后表面的第三微电子元件以及带有后表面的第四微电子元件，其中第三和第四微电子元件被连接以使第三微电子元件的后表面面向第四微电子元件的后表面，第三微电子元件还连接于第一、二微电子元件以使第三微电子元件的前表面面向第二微电子元件的前表面。
9.一种组装堆叠微电子组件的方法，包括如下步骤：
通过将包括多个微电子元件的第一子组件堆叠到包括多个微电子元件的第二子组件上形成微电子组件，其中，第一、第二子组件的后表面互相面对；
将暴露在第一子组件的前表面处的多个触点电连接于暴露在第二子组件的前表面处的多个触点。
10.如权利要求9所述的方法，其特征在于，第一子组件和第二子组件每个都包括锯道，所述锯道在形成微电子组件的步骤中被对齐。
11.如权利要求10所述的方法，其特征在于，进一步包括穿过第一和第二子组件的锯道进行切割以形成独立堆叠单元，其中第一和第二子组件的所述多个微电子元件的至少一些具有从各个触点延伸到相应第一和第二子组件的锯道的轨迹，从而在切割步骤后暴露出轨迹。
12.如权利要求11所述的方法，其特征在于，将第一子组件的所述多个触点电连接于第二子组件的触点的步骤包括在第一和第二子组件的轨迹之间形成桥接元件。
13.如权利要求12所述的方法，其特征在于，所述桥接元件被设置在第一和第二子组件的微电子元件的边缘上。
14.一种组装堆叠封装的方法，包括根据权利要求12的形成第一独立堆叠单元和第二独立堆叠单元的步骤，进一步包括将第一独立堆叠单元的至少一些触点电连接到第二独立堆叠单元的至少一些触点。
15.如权利要求9所述的方法，其特征在于，进一步包括在第一子组件和第二子组件内形成多个通孔，其中多个通孔从第一和第二子组件的后表面延伸到两个所述子组件的前表面，且与第一和第二子组件的所述触点对齐从而将触点暴露于各个子组件的后表面。
16.如权利要求15所述的方法，其特征在于，传导材料被沉积到所述多个轨迹内。
17.如权利要求16所述的方法，其特征在于，在形成微电子组件之前，第一子组件的所述多个通孔内的传导材料与第二组件的所述多个通孔内的传导材料对齐。
18.如权利要求17所述的方法，其特征在于，将第一子组件的所述触点电连接到第二子组件的所述触点的步骤包括将位于第一子组件的所述多个通孔内的传导材料电连接到第二子组件的所述多个通孔内的传导材料。
19.如权利要求18所述的方法，其特征在于，进一步包括在预定位置处切割微电子组件以形成独立堆叠单元。
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