CN1015585B - 半导体器件的自对准电极 - Google Patents

半导体器件的自对准电极

Info

Publication number
CN1015585B
CN1015585B CN89106979A CN89106979A CN1015585B CN 1015585 B CN1015585 B CN 1015585B CN 89106979 A CN89106979 A CN 89106979A CN 89106979 A CN89106979 A CN 89106979A CN 1015585 B CN1015585 B CN 1015585B
Authority
CN
China
Prior art keywords
alignment device
tube core
welding material
lead
jockey
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CN89106979A
Other languages
English (en)
Other versions
CN1041065A (zh
Inventor
马丁·卡尔福斯
罗伯特·A·古什
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Components Industries LLC
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CN1041065A publication Critical patent/CN1041065A/zh
Publication of CN1015585B publication Critical patent/CN1015585B/zh
Expired legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26122Auxiliary members for layer connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/26145Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29116Lead [Pb] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/77Apparatus for connecting with strap connectors
    • H01L2224/7725Means for applying energy, e.g. heating means
    • H01L2224/77272Oven
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312Aligning
    • H01L2224/83143Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/83815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434Bonding interfaces of the connector
    • H01L2224/84345Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0133Ternary Alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)

Abstract

本发明使用一管芯的片状引线框架和框架与半导体管芯焊接区之间的独立连接片,改进了制造功率器件引线的装置和方法。引线框架有一对准槽,用以同连接片一端的对准装量配合,连接装置另一端置于管芯接触区上。在管芯与引线框架、连接装置和接触区、配对的对准装置之间填加焊料。焊料熔化后,管芯和连接片浮于其上,并靠表面张力自行对准,使管芯和连接片分别处于支撑件和焊接区中心,而连接片和框架上的配合对准区彼此吻合。

Description

本发明一般涉及电子器件,尤其涉及为半导体或其他电子芯片提供引线的装置和方法的改进。这里所说的器件指各种应用这里所述的连接装置和引线的集成电路以及各种电子器件,而不限于以半导体为基底的器件。
在电子领域,特别是半导体器件和电路的领域中,通常为主要执行信号处理功能的器件提供重量轻的引线,而为传输大电流的器件提供重引线。细导线的线焊接和金属箔片的接头片焊接技术通常被用在信号处理器件上,这样的导线和箔片一般只能传输微安或毫安级的电流,其典型厚度只有零点几个密耳或几个密耳。它们通常直接焊接到器件的焊接区上。
对于传输较大电流的器件,例如功率二极管和晶体管,或集成电路,往往需要流过从几安培到几十安培或几百安培的电流,所以,焊到这些器件上的引线要粗一些,通常用从几十到几百密耳粗的金属引线,它们往往通过低温焊接(soldering)与器件的焊接区相连接。
当使用这样粗的引线时,引线与管芯或其他电子器件上的焊接区的对准是很困难的,而且要在焊接过程中保持这种对准也不容易。如果引线与管芯上的焊接区没有对准,就会降低生产的成品率和可靠性。
所以,本发明的目的之一就是为制造功率器件提供一种改进了的装置和方法,其中至少有一条引线与引线框和待连接引线的管芯上的焊接区自对准。
本发明的另一个目的是为制造功率器件提供一种改进了的装置和方法,其中,管芯被安装在一个引线框架上,由自对准接触片提供到器件上任一焊接区的连接,该接触片跨接在管芯与引线框架其它部分之间。
本发明还有一个目的是为制造功率器件提供一种改进了的装置和方法,其中引线框和自对准接触片都有在装配过程中使接触片与引线框对准的配合表面。
本发明又一个目的是为制造功率器件提供一种改进了的装置和方法,其中,在装配过程中,自对准接触片部分地在电连接材料(coupling    material)上浮动,以便把它同引线框架连接起来。
本发明再一个目的是为制造功率器件提供一种改进了的装置和方法,其中,在装配过程中,管芯也来回浮动,并且使其相对于接触片和引线框架上安置管芯的部位自对准。
本发明的一个附加目的是为制造功率器件提供一种改进了的装置和方法,其中,自对准是自动实现的。
这里所用的焊料一词指任何导电的粘合材料,这些材料是半固态的或者至少在焊接过程中有时部分为液态的物质,例如:常规金属、金属合金、含环氧树脂的金属、其它导电塑料或类似物。
这里所说的芯片或管芯是指电子元件,例如:二极管、晶体管、闸流管、集成电路、电阻、电容以及具有至少一个焊接区域的其他类 似的元件,但并不局限于上述元件。
通过本发明即可达到上述的以及其它目的,并具有各种优点。本发明包括一个电子芯片、一个引线装置和一个连接装置。电子芯片的第一表面用以同引线装置连接,第二表面上有一用以同连接装置相连接的焊接区;引线装置的第一部分用以装配电子芯片,第二部分包括用以同连接装置对准的第一对准装置;连接装置用以连接引线装置和电子芯片,其中,连接装置具有与焊接区相耦合的第一部分以及带有第二对准装置的第二部分,第二对准装置同第一对准装置相配合,用以使连接装置位于引线装置和焊接区之间,並与之对准。
焊接区和连接装置的第一部分之间用第一种焊料连接,第一和第二对准装置之间用第二种焊料连接,电子芯片和引线装置的第一部分之间用第三种焊料连接。第一种和第二种焊料,最好也包括第三种焊料,应该有一个可控状态,在这一状态中,焊料至少部分是液态的。以便管芯和连接装置能在其上浮动,从而彼此自行对准,同时也与引线装置自对准。
连接装置的第一部分由管芯的焊接区支撑,连接装置的第二部分装配在第一对准装置之上。第一对准装置和第二对准装置在引线装置和连接装置上分别具有配对的凹陷或凸起形状,这种形状应该允许连接装置相对于引线装置作横向的或纵向的移动,或者竖直转动,但不允许连接装置有水平转动。
如上所述的包括一个电子元件在内的器件,一般通过下列步骤获得:提供一个容纳电子元件的支撑件;提供一个具有第一对准装置的引线装置,第一对准装置用以容纳连接装置,该连接装置带有与之相配合的、使得引线装置和连接装置之间相互对准的第二对准装置;提 供一连接装置,其具有与第一对准装置配合的第二对准装置及与电子元件相连接的第一固定装置;在支撑件和电子元件之间添加第一焊接材料;在第一对准装置和第二对准装置之间添加第二焊接材料;在固定装置和电子元件之间添加第三焊接材料;暂时使连接装置在第二和三焊接材料上方浮动;最后,使第二和第三焊接材料凝固。
第一焊接材料可以在第二或第三焊接材料之前提供,或与第二焊接材料同时提供,或者与第二和第三焊接材料同时提供。
要求电子元件能在第一焊接材料上暂时地浮动,同时,连接装置也能在第二、第三焊接材料上暂时地浮动,以便通过控制引线装置和连接装置上的对准装置使电子元件和连接装置彼此对准,并且与支撑件和引线装置对准。
还要求在引线装置上以第一凹陷或凸起形式提供第一对准装置,在连接装置上用与第一对准装置相配合的凸起或凹陷的形式提供第二对准装置。第二对准装置放在第一对准装置之上(其间用第二焊接材料连接),靠重力和表面张力使其保持不动,直到焊接材料凝固。在浮动过程中至少还需要振动支撑件。
引线装置、支撑件和连接装置的设置以及对三种焊接材料及其相对数量的选择应该使得熔化的焊接材料的表面张力能够使连接装置与引线装置对准,使连接装置的固定部分之下的管芯处于中心位置,最终使得管芯和在管芯焊接区之上的连接装置的固定部分处于中心位置,这样,就能使这些部分自动对准。
参见下面的附图及其说明,就能充分了解上述及其它优点,并能更完整地理解本发明的宗旨。
图1是按照现有技术制造的电子器件的俯视图,其中一部分被剖 开。图2是图1所示部位的截面图。
图3是按照本发明制造的电子器件的局部俯视图,图4-5是按图3所示部位的截面图。
图6是按照本发明另一个实施例制造的电子器件局部俯视图,其中部分被剖开。图7是图6所示部位的截面图。
图8是按照本发明再一个实施例制造的电子器件的局部俯视图,其中部分被剖开。图9是图8所示部位的截面图。
图10是一个具有多个单元的电子引线框架的俯视图,示出按照本发明的方法的一个实例。
图1所示是按照现有技术制造的电子器件的局部剖俯视图,图2是元件10的截面图。以一个半导体器件为例,它包括具有管芯焊接区域(相当于本发明的管芯底座)13的管芯支撑件12、电子管芯(例如半导体芯片)16和引线14。在现有技术中,管芯支撑件12和接触引线多以金属制成,铜就是其中一例。
管芯16通过焊接材料19而被固定在管芯支撑件12上。焊接材料26(例如,某种焊料)把管芯16的接触部分22与引线14连接起来。由图中可以看出,在管芯16的上面,围绕着接触部分22有一层绝缘材料18,但这不是必须的。
如果管芯16是半导体功率器件或别的必须通过一安培到数百安培电流的电子元件,管芯支撑件12和引线14通常用比较厚的金属制成,例如,厚度为十到几百个密耳(0.25至几个毫米)的铜或柯伐(Kovartm)或其它金属。这种引线比较硬,在生产中,可能使管芯底座、管芯以及引线的对准成为问题。而且,图1-2所示的现有技术还有一个缺点,那就是焊料26容易溢到绝缘材料18上,这 直接影响了生产的成品率和产品可靠性的提高。
图1-2中所示的现有技术的装置也是很难装配的,因为支撑件12和引线14必须互相交叠把管芯16夹在中间。在这种情况下,管芯16被焊接到管芯底座13上以后,引线14必须从引线框架的其它部分折叠过来或分别提供,这两种操作都需要附加的步骤,并必须谨慎地把引线14适当对准在管芯16和管芯底座13上。
这些以及其它存在于现有技术中的问题都可以通过本发明得到解决。图3所示是本发明第一实施例的俯视图,图4是其截面图,图5是和图4相似的截面图,但它示出的是另一个实施例。
现在说明图3-5。管芯16通过焊接材料20装配到管芯底座13上,其接触区域22被凸起的绝缘材料18包围在中间。焊接材料20可以是导电的,也可以是绝缘的。如果用支撑件12、底座13作为与管芯16相连接的一条引线,那么,通常用导电的焊料作为焊接材料。
提供引线30和50向管芯16延伸,用它们作为管芯的外部连线。为方便起见,对准装置32和52置于引线30和50最靠近管芯16的一端。在图3-5所示的例子中,引线30和50上的对准装置32和52的形状是向下凹陷的,也可以采用别的形状(例如凸起)。在图3-4中,对准装置32基本上是一个半圆柱型的槽或别的二维图形为圆形、其第三维沿与引线30和管芯16连线相垂直的方向延伸的形状。图5中,对准装置52的两维形状是V形槽或类弯折凹陷形,其第三维沿与引线50到管芯16连线相垂直的方向延伸。图中所示的对准装置32、42和52、62是向下凹陷的,也可以是向上凸起的。
图3-5中,连接装置或连接片40、60从引线30、50延伸到管芯16上的接触区域22。连接片或连接装置40和60与引线30和50上的对准装置32和52相连的一端有对准装置42和62,另一端是连接到管芯接触区域焊接区22上的固定装置46和66。对准装置42和62的形状与对准装置32和52相吻合。由图3可以看出,对准装置32、52和42、62的槽形结构使得连接装置40和60能沿与引线30和50到管芯16接触区22的连线相垂直的方向移动,但不能在指向接触区22的方向上相对于引线30、50和管芯接触区22移动,也不能在图3所示的水平面内相对于引线30、50或焊接区22转动。但在装配过程中,连接装置40、60却可以在竖直平面(即图4,5所示平面)内转动。这正是所期望的,图为这样可以在待安装的管芯16的厚度发生各种实质性变化时,不用改变引线框架或连接装置,从而简化了生产过程。图4所示的结构对达到此目的是特别有用的,因为对准装置32和42的嵌套弯折表面形成了一个可转动的枢纽。使得在未改变对准装置32和42空间位置的条件下,连接装置40能相对于引线30在竖直平面内转动。从这方面来说,连接装置40靠近接触区22的一端也应该是弯曲的,如图4中的固定装置46所示。
连接装置40和60具有固定装置46和66,用以同管芯接触区22相连接。图4表示了固定装置46具有略具圆形的底部48的情形,图5所示的固定装置66的底部68基本上是扁平的。在两种情况下,固定装置46和66都必须朝管芯接触区22凸起,以免焊料溢出到绝缘材料18的表面上。固定装置46和66可以是半圆柱形式其它基本上为轴对称的形状,也可以是半椭球形或别的三维形 状,如卡尔福斯(Kalfus)等人所解释的。
连接片40和60通过焊接材料36和56与引线30和50连接,并通过焊接材料38和58与管芯接触区22相连。导电性焊料即可作为适当的焊接材料使用。焊接材料36、56和38、58必须能同时被液化或同时保持液态,而且与此同时,管芯的焊接材料20也必须保持液态。焊接材料20可以为导电材料,但这不是必须的,因为在很多情况下,可以在管芯上的其它地方做出连接到引线端(图中没有画出)的接触区。
如果材料20、36、56和38、58是焊料,那么必须选择熔点相同的材料。如果这些固定或焊接材料中的一种或多种是玻璃或塑料(不管是否导电),那么它们在装配过程中必须在其他导电性焊接材料为液态或部分液态的同时也暂时地,至少部分地处于液态。换句话说,固定或焊接材料具有一个共同的状态是很重要的,例如在一个共同的温度范围内或在共同的焊接条件下,或其它共同条件下,它们处于半固态或至少部分液态。
焊接材料的完全熔化是人们所期望的,但并不是必要的,最低限度是,焊接材料必须充分熔化以使连接片(最好还有电子器件)能在半固态或部分液态的焊接材料上浮动,并能相对于支撑件12、引线30和50自由地作横向移动。正如后面将要详细描述的那样,在支撑件12、引线30、50以及管芯16与连接片40、60之间装上各种焊接材料后,使各种不同的焊接材料暂时地熔化或处于液态,以便连接片40、60能在液化了的焊接材料36、56和38、58上浮动,以及使管芯16能在液化了的焊接材料20上浮动。这样,靠表面张力和相匹配的对准装置的作用,使管芯、连接片和引线自行 对准。如果管芯的焊接材料和连接片的焊接材料能同时处于液态,即可获得最佳效果,那么,即使只有连接片的焊接材料同时处于液态,也能获得一些改善。
我们发现选取金属合金材料作为焊料非常适用,当然,也可选取其它材料。在焊料的选取中,重要的是选取的材料要易于沾润引线但不易于沾润管芯上不需要与引线或焊料相接触的临近焊接位置的区域,因为导电引线通常是电导率很高的金属,而管芯的临近区域通常为钝化绝缘材料所覆盖,所以在这些位置上,所选取的焊料最好要优先沾润这样的金属而不会明显地沾润钝化绝缘材料。就这方面来说,金属合金焊料通常比我们所知道的大部分导电塑料和玻璃更好。
图6-9示出本发明另一个实施例,图6和图8是类似于图3的局部俯视剖面图,图7和图9是类似于图4-5的截面图。在图6和图8中,使用焊接材料20将管芯16安装在支撑件12的底座13上。同前面所述一样,管芯16的接触区或焊接区22是朝上的。
引线70、90和焊接区22通过连接片80、100连接起来。如图6-7所示,引线70的对准装置72是向下凹陷的,其长轴方向指向管芯16和焊接区22,连接片80的对准装置82的底部和两侧84与对准装置72的底部和两侧面74吻合。但对准装置82比对准装置72短一些,以便连接片80能在指向管芯焊接区22的方向上移动,但不能在与此方向垂直的方向上移动,也不能相对于引线70和焊接区22水平地移动。若对准装置72的长、宽和82的长、宽大体相同,那么引线70和连接片80之间在任何方向上都不能相对运动。导电性的焊接材料76,如某种焊料,把对准装 置72和82连接起来。
连接片80的一端向下凸起形成区域86,其底部88通过焊接材料78与焊接区22焊接起来。底部88大体是扁平的或球状的。如图6-9所示,固定区域86比焊接区22的面积大,在这种情况下,区域86必须是凹陷的,也就是说,向接触区22凸起,以便当86的底部88偏离焊接区22的中心时,使固定区域的下表面88和绝缘材料18的上表面之间保持一定的距离。这样可以避免焊接材料溢出到18的表面上,这在上面所提到的卡尔福斯等人的共同申请中有详细描述。
图8-9所示为本发明的另一个实施例,其中,引线90上的对准装置92和连接片100上的对准装置102基本上是旋转对称的。对准装置92的底部和侧面94与对准装置102的底部和侧面104相吻合。这种设计使连接片100和引线90之间可相对转动,但不能相对作横向运动。引线90和连接片100通过导电的焊接材料96连接起来。
从以上的叙述可知,可以选择允许对准装置相对运动的自由度,来适应管芯的位置和在生产过程中可能出现的引线对准误差的类型。本领域普通技术人员将会了解,基于这里的描述,再结合他们具体的环境,可以明白究竟图示中的哪一种实施例最能满足他们的要求。
图10说明了本发明的方法,引线框架120分为六个独立部分120A-F,每一部分说明按照本发明制造电子器件的一个步骤。本领域普通技术人员应很清楚,在实际过程中,引线框架120的各部分120A-F都要经过一组不同步骤的处理。在120A-F的每一部分中示出的不同步骤只不过是为了使说明更简要。
取一个硅整流器管芯作为样品,其横向大小为37×37到105×105密耳(0.94到2.7mm2),四周为隆起的绝缘材料所包围,如卡尔福斯等人所述。焊接区22的典型尺寸为29到94平方密耳(0.74到2.4mm2)。
引线框架120与图3和图5所示的形状相符,但正如本领域普通技术人员将了解的那样,这只是为了说明的方便,并不局限于此,任何已描述的引线和连接片的形状或与其等价的形状都可应用。引线框架120上有常规的框条122、124和带有工位孔126的边框128。
在120A中,提供了具有管芯底座13的支撑件12和具有对准装置52的引线50。在图示中,是假定由支撑件12和底座13完成与管芯16一个侧面的电接触。不过,本领域普通技术人员都知道这不是必要的,即支撑件12和底座13可以仅作为管芯16的机械支撑或传热装置。底座13的典型大小为80×90到115×135密耳(2.0×2.2到2.9×3.4mm2),引线框架120的典型厚度为5-15密耳(0.13到0.38mm)或更大一些。
120B中,管芯焊接材料20被加在管芯底座13上。一般均使用一种钎焊焊剂或钎焊锭料作为焊接材料20。对于硅半导体管芯,这种焊剂的成分取为88∶10∶2(Pb∶Sn∶Ag)是合适的。但也可以使用其它公知的焊接材料。把大约0.5到3.0毫克的焊剂涂在底座13上就可形成令人满意的焊接材料20,但数量上多一点或少一点也可以。考虑到不同的焊接区域的相对大小,可以使用数量大致相同的同种焊剂作为焊接材料56和58。
在120c中,管芯16被安装在焊接材料20上,引线焊接材料58的提供可以作为这一生产步骤的一部分,也可以在以后的步骤中添加。这里故意把管芯16画得与底座13稍有些未对准,以便说明本发明的结构和方法所产生的自对准作用。
如果焊接材料56、58还没有涂上,那么现在涂上是很方便的。前面所述的焊剂的成份对焊接材料56和58都是适用的,其数量根据焊接区22的大小来确定,一般情况下和前面所述数量相似或略少。
在步骤120D,把连接片60放到焊接材料56和58上,铜制的连接片60的厚度取为5到15密耳(0.13到0.48mm)或略厚一点都是合适的。焊接区固定装置66必须比焊接区22窄5-15密耳(0.13-0.38mm)。连接片60和对准装置62可以比引线50略微窄一些,但这不是必须的。虽然在图中没有表示出来,但图6-9所描述的各类连接片同样能在这里得到很好的结果。
对准装置62置于对准装置52上的焊接材料56之上,固定装置66置于接触区22上的焊接材料58之上。管芯16及连接片60不必完全精确地放置,在120D中,连接片60故意相对于管芯16和引线50有略微的未对准,用以说明本发明的自对准功能。
当装配完毕的管芯、连接片、引线框架以及其间的焊接材料被加热时,管芯16在20上浮动,连接片60在焊料56和58上浮动,槽62和52完全吻合。对上面所说的焊剂,加热到大约340℃的最高温度持续三分钟就可以了。米尔瓦基(Milwaukee)市的林德堡(Lindberg)公司生产的具有两吋宽的带子的二十呎长、 四区燃氢带式加热炉WI可以用来熔化焊剂,不过用其它的炉子也行。在可控的保护气氛中熔化焊剂的装置和方法在本领域中是公知的。
对准装置52和62之间焊料浸润的接触面设计得比管芯焊接区22和固定装置66之间的,或管芯16和底座13之间的要大,这保证了将连接片60和引线50上的槽52相对准的表面张力占主导地位。这样,连接片60自动地趋于引线50的中心,并且,由于对准装置52的作用,连接片60正好也指向底座13的中心。
因为底座13基本上被焊料20所覆盖,所以管芯16在20上没有一个非常优先的位置,它能滑到覆有焊料的任何部位,但不会超出焊料的边缘。只要焊接材料处于液态,管芯16就能在底座13上焊料所沾润的区域内移动。
当焊料熔化时,连接片60上的固定装置66和管芯焊接区22被熔化的焊料58连接起来。因为连接片60靠近焊接区22的那个部分66比焊接区22略小,并且固定装置66沿其周边离开焊接区22向上弯曲,所以,管芯焊接区22和固定装置66趋于自对准,使66正好处于22的中心。
由于连接片60被对准装置52、62和其间的表面张力所限制,在管芯16和管芯底座13上滑动以便使22处于固定装置66中心时,连接片60也必然保持在引线50的中心位置。这样,焊接材料20、56和58处于液态时,在它们上面浮动的管芯16、连接片60和引线50的组合运动使这几个部分自动对准。这就是图120E所示的情形。
焊接材料一熔化,自对准就开始了。之后,冷却该组件使焊接材 料凝固,从而把各部分连接起来并保持对准好的位置。
在120F中,示出包覆在已装配好的部分上的封装材料130的压制件,这是众所周知的常规工艺。封装以后,去掉框条122、124和边框128,得到一个完整的元件,这些操作都是常规工艺。
在焊料熔化操作中,要轻轻地摇动各部分以便于浮动和滑动运动,这种运动同表面张力和对准装置结合起来使得各部分自行对准。摇动量不必太大,由焊料回流炉中移动的金属带所引入的震动就足够了。
在120B-C所示的固定管芯的步骤中,焊接材料基本上覆盖住底座13,但这不是必须的。在13的中心涂上一滴焊剂,在把管芯16放于其上以后,焊剂就被挤压而水平地散向四周,这样同样会得到很好的结果。不过,这样做时,必须十分小心地把焊剂和管芯置于13的中心,因为底座13上沾润有焊剂的面积的任一点减少都会使焊料熔化和自对准过程中管芯16可以在其上滑动的面积减小。
正如所描述的那样,禁止水平面内转动的引线对准装置和连接片是人们所需要的,因为连接片的水平转动会削弱连接片与管芯相连的一端和管芯底座中心对准的趋势。这样,就对准装置而言,图3-7所示的设置比图8-9所示的设置要好一些。本发明的所有结构都允许连接片在竖直平面内相对于引线和管芯作转动,以适应管芯厚度的变化和焊接区22及对准装置32、52、72或92的高度变化。
通过以上的描述,本领域普通技术人员均很明白:本发明提供了一种改进的自对准器件结构,使管芯处于底座中心,连接引线处于焊接区的中心,同时也使连接引线和管芯的外引线对准。这样,由于获 得了较牢固的焊接连接,减少了生产中的缺陷,也大大提高了可靠性。
此外,管芯焊接区和连线之间的自对准功能增强了器件抗电冲击的能力。一般情况下,连接到管芯焊接区上的引线要比焊接区本身小,以保证不会因没有对准而接触到周围的绝缘材料。由于器件的自对准功能,管芯的焊接区和与其相连的引线之间只需要提供较小的对准余地,这样,连接装置引线部分可以做得比非对对准器件的大一些。这就允许较多的高电导率金属(例如,铜连线)靠近接触区,并允许在接触区与引线之间填充较多的焊料,而不至于溢出到芯片上临近的绝缘材料上。这种组合提高了器件的抗电冲击性,又不至于由于焊料的漫延而增加产生短路的可能性。
而且,本发明允许连接片在竖直平面内运动从而改进了制造公差。
此外,基于这里的描述,本领域普通技术人员应清楚地认识到运用已经描述的原理和精神即可对本发明作很多更改,并得到各种变型。因此,在下面的权利要求书中,包括了所有这样的更改和变型。

Claims (7)

1、一种半导体器件,其特征在于包括:
一片电子芯片,其第一表面用以连接引线装置,第二表面上具有用以与接触引线连接的焊接区;
引线装置,其第一部分用以容纳电子芯片,第二部分具有第一对准装置,用以与连接装置对准;和
连接装置,用于将引线连接到电子芯片上,其第一部分与焊接区连接,第二部分有一与第一对准装置配合的第二对准装置,用以将引线装置和焊接区之间的连接装置对准,包括在焊接区和连接装置的第一部分之间的第一焊接材料以及在第一、第二对准装置之间的第二焊接材料,其中,第一和第二焊接材料有共同的液化状态。
2、按照权利要求1的半导体器件,其中,第一焊接材料为在焊接区和连接装置的第一部分之间的第一焊料,第二焊接材料为在第一、第二对准装置之间的第二焊料。
3、按照权利要求1的半导体器件,还包括在电子芯片与引线装置的第一部分之间的第三焊接材料,其中,第一、第二和第三焊接材料有共同的液化状态。
4、按照权利要求1的半导体器件,其中第一对准装置包括第一凹陷部分,第二对准装置包括一个与第一凹陷部分相配合的第二凹陷部分。
5、按照权利要求1的半导体器件,其中第一对准装置包括第一凸起部分,第二对准装置包括一个与第一凸起部分相配合的第一凹陷部分。
6、一种装配半导体器件的方法,其特征在于包括以下步骤:
提供一个引线框架,其第一部分用以容纳管芯,第二部分用以连接半导体管芯上的焊接区,第二部分上有第一对准装置;
在引线框架的第一部分上装配上一半导体管芯,该管芯有一连接外引线的焊接区;和
把连接装置安装在管芯的焊接区和第一对准装置之间,连接引线有与第一对准装置相配合的第二对准装置。
通过在连接装置和焊接区以及彼此配合的第一、第二对准装置之间放置在装配过程中至少部分暂时为液态的焊接材料,使得连接装置在管芯和引线框架的第二部分之间被对准。
7、按照权利要求6的方法,其中,对准步骤包括:通过在半导体管芯和引线框架的第一部分之间填充焊接材料来实现管芯和连接引线的对准,这种焊接材料在装配过程中至少部分暂时为液态。
CN89106979A 1988-09-09 1989-09-07 半导体器件的自对准电极 Expired CN1015585B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/242,926 US4935803A (en) 1988-09-09 1988-09-09 Self-centering electrode for power devices
US242,926 1988-09-09

Publications (2)

Publication Number Publication Date
CN1041065A CN1041065A (zh) 1990-04-04
CN1015585B true CN1015585B (zh) 1992-02-19

Family

ID=22916669

Family Applications (1)

Application Number Title Priority Date Filing Date
CN89106979A Expired CN1015585B (zh) 1988-09-09 1989-09-07 半导体器件的自对准电极

Country Status (7)

Country Link
US (1) US4935803A (zh)
EP (1) EP0362547B1 (zh)
JP (1) JP2658423B2 (zh)
KR (1) KR900005586A (zh)
CN (1) CN1015585B (zh)
DE (1) DE68928428T2 (zh)
MY (1) MY105130A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1518099B (zh) * 2003-01-16 2010-05-05 松下电器产业株式会社 引线框架及其制造方法和使用引线框架的半导体器件

Families Citing this family (201)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0671062B2 (ja) * 1989-08-30 1994-09-07 株式会社東芝 樹脂封止型半導体装置
AU645283B2 (en) * 1990-01-23 1994-01-13 Sumitomo Electric Industries, Ltd. Substrate for packaging a semiconductor device
US5103289A (en) * 1990-02-06 1992-04-07 Square D Company Dual sip package structures
FR2678773B1 (fr) * 1991-07-05 1997-03-14 Thomson Csf Procede de cablage entre des sorties de boitier et des elements d'hybride.
JP3044872B2 (ja) * 1991-09-25 2000-05-22 ソニー株式会社 半導体装置
US5528079A (en) * 1991-12-23 1996-06-18 Gi Corporation Hermetic surface mount package for a two terminal semiconductor device
US5821611A (en) * 1994-11-07 1998-10-13 Rohm Co. Ltd. Semiconductor device and process and leadframe for making the same
US5799858A (en) * 1995-09-16 1998-09-01 Samsung Aerospace Industries, Ltd. Die bonding device
FR2742000B1 (fr) * 1995-11-30 1998-04-24 Sgs Thomson Microelectronics Composant semiconducteur a montage par brasure
US5751061A (en) * 1995-12-18 1998-05-12 Motorola, Inc. Semiconductor diode device with non-planar heatsink and method of manufacture
US5969410A (en) * 1996-05-09 1999-10-19 Oki Electric Industry Co., Ltd. Semiconductor IC device having chip support element and electrodes on the same surface
US6249041B1 (en) 1998-06-02 2001-06-19 Siliconix Incorporated IC chip package with directly connected leads
US7030474B1 (en) 1998-06-24 2006-04-18 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US7112474B1 (en) 1998-06-24 2006-09-26 Amkor Technology, Inc. Method of making an integrated circuit package
US7071541B1 (en) 1998-06-24 2006-07-04 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6143981A (en) 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6893900B1 (en) 1998-06-24 2005-05-17 Amkor Technology, Inc. Method of making an integrated circuit package
US7005326B1 (en) 1998-06-24 2006-02-28 Amkor Technology, Inc. Method of making an integrated circuit package
US7332375B1 (en) 1998-06-24 2008-02-19 Amkor Technology, Inc. Method of making an integrated circuit package
US6040626A (en) * 1998-09-25 2000-03-21 International Rectifier Corp. Semiconductor package
US6396127B1 (en) * 1998-09-25 2002-05-28 International Rectifier Corporation Semiconductor package
US6448633B1 (en) * 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
WO2000042655A1 (en) * 1999-01-11 2000-07-20 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device
KR20000057810A (ko) 1999-01-28 2000-09-25 가나이 쓰토무 반도체 장치
US6307755B1 (en) 1999-05-27 2001-10-23 Richard K. Williams Surface mount semiconductor package, die-leadframe combination and leadframe therefor and method of mounting leadframes to surfaces of semiconductor die
US7211877B1 (en) * 1999-09-13 2007-05-01 Vishay-Siliconix Chip scale surface mount package for semiconductor device and process of fabricating the same
KR100379089B1 (ko) 1999-10-15 2003-04-08 앰코 테크놀로지 코리아 주식회사 리드프레임 및 이를 이용한 반도체패키지
KR100526844B1 (ko) * 1999-10-15 2005-11-08 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조방법
KR100403142B1 (ko) * 1999-10-15 2003-10-30 앰코 테크놀로지 코리아 주식회사 반도체패키지
KR20010037247A (ko) * 1999-10-15 2001-05-07 마이클 디. 오브라이언 반도체패키지
US20070176287A1 (en) * 1999-11-05 2007-08-02 Crowley Sean T Thin integrated circuit device packages for improved radio frequency performance
US6580159B1 (en) 1999-11-05 2003-06-17 Amkor Technology, Inc. Integrated circuit device packages and substrates for making the packages
US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US6703707B1 (en) * 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6319755B1 (en) 1999-12-01 2001-11-20 Amkor Technology, Inc. Conductive strap attachment process that allows electrical connector between an integrated circuit die and leadframe
US6459147B1 (en) * 2000-03-27 2002-10-01 Amkor Technology, Inc. Attaching semiconductor dies to substrates with conductive straps
US6521982B1 (en) 2000-06-02 2003-02-18 Amkor Technology, Inc. Packaging high power integrated circuit devices
US6639308B1 (en) * 1999-12-16 2003-10-28 Amkor Technology, Inc. Near chip size semiconductor package
KR100421774B1 (ko) * 1999-12-16 2004-03-10 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조 방법
KR100583494B1 (ko) * 2000-03-25 2006-05-24 앰코 테크놀로지 코리아 주식회사 반도체패키지
US6870254B1 (en) * 2000-04-13 2005-03-22 Fairchild Semiconductor Corporation Flip clip attach and copper clip attach on MOSFET device
US6989588B2 (en) * 2000-04-13 2006-01-24 Fairchild Semiconductor Corporation Semiconductor device including molded wireless exposed drain packaging
US7042068B2 (en) 2000-04-27 2006-05-09 Amkor Technology, Inc. Leadframe and semiconductor package made using the leadframe
JP3274126B2 (ja) * 2000-05-26 2002-04-15 東芝コンポーネンツ株式会社 コネクター型半導体素子
US6897567B2 (en) 2000-07-31 2005-05-24 Romh Co., Ltd. Method of making wireless semiconductor device, and leadframe used therefor
JP3602453B2 (ja) 2000-08-31 2004-12-15 Necエレクトロニクス株式会社 半導体装置
JP3700563B2 (ja) * 2000-09-04 2005-09-28 セイコーエプソン株式会社 バンプの形成方法及び半導体装置の製造方法
US6566164B1 (en) 2000-12-07 2003-05-20 Amkor Technology, Inc. Exposed copper strap in a semiconductor package
KR20020058209A (ko) * 2000-12-29 2002-07-12 마이클 디. 오브라이언 반도체패키지
KR100731007B1 (ko) * 2001-01-15 2007-06-22 앰코 테크놀로지 코리아 주식회사 적층형 반도체 패키지
US6545345B1 (en) 2001-03-20 2003-04-08 Amkor Technology, Inc. Mounting for a package containing a chip
US6967395B1 (en) 2001-03-20 2005-11-22 Amkor Technology, Inc. Mounting for a package containing a chip
KR100393448B1 (ko) 2001-03-27 2003-08-02 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
KR100369393B1 (ko) 2001-03-27 2003-02-05 앰코 테크놀로지 코리아 주식회사 리드프레임 및 이를 이용한 반도체패키지와 그 제조 방법
US6597059B1 (en) 2001-04-04 2003-07-22 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package
US7064009B1 (en) 2001-04-04 2006-06-20 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package and method of making same
US7045883B1 (en) 2001-04-04 2006-05-16 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package and method of making same
US6614102B1 (en) 2001-05-04 2003-09-02 Amkor Technology, Inc. Shielded semiconductor leadframe package
EP1271648A1 (en) * 2001-06-22 2003-01-02 Siliconx (Taiwan) Ltd Power semiconductor package and method for making the same
US7485952B1 (en) 2001-09-19 2009-02-03 Amkor Technology, Inc. Drop resistant bumpers for fully molded memory cards
US6900527B1 (en) 2001-09-19 2005-05-31 Amkor Technology, Inc. Lead-frame method and assembly for interconnecting circuits within a circuit module
US6630726B1 (en) 2001-11-07 2003-10-07 Amkor Technology, Inc. Power semiconductor package with strap
US6593527B1 (en) * 2002-04-17 2003-07-15 Delphi Technologies, Inc. Integrated circuit assembly with bar bond attachment
US6818973B1 (en) 2002-09-09 2004-11-16 Amkor Technology, Inc. Exposed lead QFP package fabricated through the use of a partial saw process
US6919620B1 (en) 2002-09-17 2005-07-19 Amkor Technology, Inc. Compact flash memory card with clamshell leadframe
JP2004111745A (ja) * 2002-09-19 2004-04-08 Toshiba Corp 半導体装置
US7190062B1 (en) 2004-06-15 2007-03-13 Amkor Technology, Inc. Embedded leadframe semiconductor package
US7361533B1 (en) 2002-11-08 2008-04-22 Amkor Technology, Inc. Stacked embedded leadframe
US7723210B2 (en) 2002-11-08 2010-05-25 Amkor Technology, Inc. Direct-write wafer level chip scale package
US6905914B1 (en) 2002-11-08 2005-06-14 Amkor Technology, Inc. Wafer level package and fabrication method
US6798047B1 (en) 2002-12-26 2004-09-28 Amkor Technology, Inc. Pre-molded leadframe
US6847099B1 (en) 2003-02-05 2005-01-25 Amkor Technology Inc. Offset etched corner leads for semiconductor package
US6750545B1 (en) 2003-02-28 2004-06-15 Amkor Technology, Inc. Semiconductor package capable of die stacking
US7001799B1 (en) 2003-03-13 2006-02-21 Amkor Technology, Inc. Method of making a leadframe for semiconductor devices
US6794740B1 (en) 2003-03-13 2004-09-21 Amkor Technology, Inc. Leadframe package for semiconductor devices
US7095103B1 (en) 2003-05-01 2006-08-22 Amkor Technology, Inc. Leadframe based memory card
US7008825B1 (en) 2003-05-27 2006-03-07 Amkor Technology, Inc. Leadframe strip having enhanced testability
US6897550B1 (en) 2003-06-11 2005-05-24 Amkor Technology, Inc. Fully-molded leadframe stand-off feature
US7245007B1 (en) 2003-09-18 2007-07-17 Amkor Technology, Inc. Exposed lead interposer leadframe package
US6921967B2 (en) * 2003-09-24 2005-07-26 Amkor Technology, Inc. Reinforced die pad support structure
US7138707B1 (en) 2003-10-21 2006-11-21 Amkor Technology, Inc. Semiconductor package including leads and conductive posts for providing increased functionality
US7144517B1 (en) 2003-11-07 2006-12-05 Amkor Technology, Inc. Manufacturing method for leadframe and for semiconductor package using the leadframe
US7211879B1 (en) 2003-11-12 2007-05-01 Amkor Technology, Inc. Semiconductor package with chamfered corners and method of manufacturing the same
US7057268B1 (en) 2004-01-27 2006-06-06 Amkor Technology, Inc. Cavity case with clip/plug for use on multi-media card
US7091594B1 (en) 2004-01-28 2006-08-15 Amkor Technology, Inc. Leadframe type semiconductor package having reduced inductance and its manufacturing method
JP2005243685A (ja) * 2004-02-24 2005-09-08 Renesas Technology Corp 半導体装置
JP4628687B2 (ja) * 2004-03-09 2011-02-09 ルネサスエレクトロニクス株式会社 半導体装置
US7181919B2 (en) * 2004-03-31 2007-02-27 Denso Corporation System utilizing waste heat of internal combustion engine
US20050218482A1 (en) * 2004-04-01 2005-10-06 Peter Chou Top finger having a groove and semiconductor device having the same
US20080003722A1 (en) * 2004-04-15 2008-01-03 Chun David D Transfer mold solution for molded multi-media card
US7202554B1 (en) 2004-08-19 2007-04-10 Amkor Technology, Inc. Semiconductor package and its manufacturing method
US8232635B2 (en) * 2004-08-25 2012-07-31 International Rectifier Corporation Hermetic semiconductor package
US7217991B1 (en) 2004-10-22 2007-05-15 Amkor Technology, Inc. Fan-in leadframe semiconductor package
US7557432B2 (en) * 2005-03-30 2009-07-07 Stats Chippac Ltd. Thermally enhanced power semiconductor package system
US7598600B2 (en) * 2005-03-30 2009-10-06 Stats Chippac Ltd. Stackable power semiconductor package system
US8288200B2 (en) * 2005-11-30 2012-10-16 Diodes Inc. Semiconductor devices with conductive clips
US7507603B1 (en) 2005-12-02 2009-03-24 Amkor Technology, Inc. Etch singulated semiconductor package
US7572681B1 (en) 2005-12-08 2009-08-11 Amkor Technology, Inc. Embedded electronic component package
US7859089B2 (en) * 2006-05-04 2010-12-28 International Rectifier Corporation Copper straps
US7902660B1 (en) 2006-05-24 2011-03-08 Amkor Technology, Inc. Substrate for semiconductor device and manufacturing method thereof
US20070278638A1 (en) * 2006-06-02 2007-12-06 Lite-On Semiconductor Corporation Semiconductor package structure
US20070290325A1 (en) * 2006-06-16 2007-12-20 Lite-On Semiconductor Corporation Surface mounting structure and packaging method thereof
US7968998B1 (en) 2006-06-21 2011-06-28 Amkor Technology, Inc. Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package
US20080054420A1 (en) * 2006-08-23 2008-03-06 Semiconductor Components Industries, Llc. Semiconductor package structure and method of manufacture
US7687893B2 (en) 2006-12-27 2010-03-30 Amkor Technology, Inc. Semiconductor package having leadframe with exposed anchor pads
US7829990B1 (en) 2007-01-18 2010-11-09 Amkor Technology, Inc. Stackable semiconductor package including laminate interposer
TW200836315A (en) * 2007-02-16 2008-09-01 Richtek Techohnology Corp Electronic package structure and method thereof
US7982297B1 (en) 2007-03-06 2011-07-19 Amkor Technology, Inc. Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same
US7977774B2 (en) 2007-07-10 2011-07-12 Amkor Technology, Inc. Fusion quad flat semiconductor package
US7687899B1 (en) 2007-08-07 2010-03-30 Amkor Technology, Inc. Dual laminate package structure with embedded elements
JP4744491B2 (ja) * 2007-08-09 2011-08-10 新電元工業株式会社 半導体装置
US7777351B1 (en) 2007-10-01 2010-08-17 Amkor Technology, Inc. Thin stacked interposer package
US8089159B1 (en) 2007-10-03 2012-01-03 Amkor Technology, Inc. Semiconductor package with increased I/O density and method of making the same
US7821111B2 (en) * 2007-10-05 2010-10-26 Texas Instruments Incorporated Semiconductor device having grooved leads to confine solder wicking
US7847386B1 (en) 2007-11-05 2010-12-07 Amkor Technology, Inc. Reduced size stacked semiconductor package and method of making the same
US7956453B1 (en) 2008-01-16 2011-06-07 Amkor Technology, Inc. Semiconductor package with patterning layer and method of making same
US7723852B1 (en) 2008-01-21 2010-05-25 Amkor Technology, Inc. Stacked semiconductor package and method of making same
JP5252934B2 (ja) * 2008-01-25 2013-07-31 新電元工業株式会社 接続子の接続方法および該接続方法を用いた接続子の接続構造
TWI456707B (zh) * 2008-01-28 2014-10-11 Renesas Electronics Corp 半導體裝置及其製造方法
JP4974943B2 (ja) * 2008-03-26 2012-07-11 新電元工業株式会社 樹脂封止半導体装置
US8067821B1 (en) 2008-04-10 2011-11-29 Amkor Technology, Inc. Flat semiconductor package with half package molding
US7768135B1 (en) 2008-04-17 2010-08-03 Amkor Technology, Inc. Semiconductor package with fast power-up cycle and method of making same
JP2009267054A (ja) * 2008-04-24 2009-11-12 Sanyo Electric Co Ltd 半導体装置およびその製造方法
US7808084B1 (en) 2008-05-06 2010-10-05 Amkor Technology, Inc. Semiconductor package with half-etched locking features
JP5368008B2 (ja) * 2008-05-26 2013-12-18 ローム株式会社 パッケージ型二端子半導体装置
KR100983882B1 (ko) * 2008-07-07 2010-09-27 주식회사 뉴인텍 커패시터용 부스바 조립방법 및 그 제품
US8125064B1 (en) 2008-07-28 2012-02-28 Amkor Technology, Inc. Increased I/O semiconductor package and method of making same
US8184453B1 (en) 2008-07-31 2012-05-22 Amkor Technology, Inc. Increased capacity semiconductor package
US8410590B2 (en) * 2008-09-30 2013-04-02 Infineon Technologies Ag Device including a power semiconductor chip electrically coupled to a leadframe via a metallic layer
US7847392B1 (en) 2008-09-30 2010-12-07 Amkor Technology, Inc. Semiconductor device including leadframe with increased I/O
US7989933B1 (en) 2008-10-06 2011-08-02 Amkor Technology, Inc. Increased I/O leadframe and semiconductor device including same
US8008758B1 (en) 2008-10-27 2011-08-30 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe
US8089145B1 (en) 2008-11-17 2012-01-03 Amkor Technology, Inc. Semiconductor device including increased capacity leadframe
US8072050B1 (en) 2008-11-18 2011-12-06 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe including passive device
US7875963B1 (en) 2008-11-21 2011-01-25 Amkor Technology, Inc. Semiconductor device including leadframe having power bars and increased I/O
US7982298B1 (en) 2008-12-03 2011-07-19 Amkor Technology, Inc. Package in package semiconductor device
US8487420B1 (en) 2008-12-08 2013-07-16 Amkor Technology, Inc. Package in package semiconductor device with film over wire
US8680656B1 (en) 2009-01-05 2014-03-25 Amkor Technology, Inc. Leadframe structure for concentrated photovoltaic receiver package
US20170117214A1 (en) 2009-01-05 2017-04-27 Amkor Technology, Inc. Semiconductor device with through-mold via
US8058715B1 (en) 2009-01-09 2011-11-15 Amkor Technology, Inc. Package in package device for RF transceiver module
US8026589B1 (en) 2009-02-23 2011-09-27 Amkor Technology, Inc. Reduced profile stackable semiconductor package
US7960818B1 (en) 2009-03-04 2011-06-14 Amkor Technology, Inc. Conformal shield on punch QFN semiconductor package
US8575742B1 (en) 2009-04-06 2013-11-05 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe including power bars
US20100289129A1 (en) * 2009-05-14 2010-11-18 Satya Chinnusamy Copper plate bonding for high performance semiconductor packaging
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
US8076183B2 (en) * 2009-10-27 2011-12-13 Alpha And Omega Semiconductor, Inc. Method of attaching an interconnection plate to a semiconductor die within a leadframe package
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8324511B1 (en) 2010-04-06 2012-12-04 Amkor Technology, Inc. Through via nub reveal method and structure
JP5270614B2 (ja) * 2010-05-24 2013-08-21 三菱電機株式会社 半導体装置
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8440554B1 (en) 2010-08-02 2013-05-14 Amkor Technology, Inc. Through via connected backside embedded circuit features structure and method
US8487445B1 (en) 2010-10-05 2013-07-16 Amkor Technology, Inc. Semiconductor device having through electrodes protruding from dielectric layer
US8570688B1 (en) * 2010-11-08 2013-10-29 Magnecomp Corporation Electrical connections to a microactuator in a hard disk drive suspension
US8791501B1 (en) 2010-12-03 2014-07-29 Amkor Technology, Inc. Integrated passive device structure and method
US8674485B1 (en) 2010-12-08 2014-03-18 Amkor Technology, Inc. Semiconductor device including leadframe with downsets
US8390130B1 (en) 2011-01-06 2013-03-05 Amkor Technology, Inc. Through via recessed reveal structure and method
US8648450B1 (en) 2011-01-27 2014-02-11 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands
TWI557183B (zh) 2015-12-16 2016-11-11 財團法人工業技術研究院 矽氧烷組成物、以及包含其之光電裝置
JP5857361B2 (ja) * 2011-02-15 2016-02-10 新電元工業株式会社 半導体装置
CN103503132B (zh) * 2011-06-09 2016-06-01 三菱电机株式会社 半导体装置
CN102254889A (zh) * 2011-07-05 2011-11-23 启东市捷捷微电子有限公司 一种大功率半导体器件及其封装方法
US8240545B1 (en) * 2011-08-11 2012-08-14 Western Digital (Fremont), Llc Methods for minimizing component shift during soldering
TWI435456B (zh) * 2011-08-18 2014-04-21 Au Optronics Corp 電極焊接結構、背電極太陽能電池模組及太陽能電池模組製作方法
DE102011086687A1 (de) * 2011-11-21 2013-05-23 Robert Bosch Gmbh Verfahren zum Kontaktieren eines Halbleiters und Kontaktanordnung für einen Halbleiter
US8552548B1 (en) 2011-11-29 2013-10-08 Amkor Technology, Inc. Conductive pad on protruding through electrode semiconductor device
US9704725B1 (en) 2012-03-06 2017-07-11 Amkor Technology, Inc. Semiconductor device with leadframe configured to facilitate reduced burr formation
US8883567B2 (en) * 2012-03-27 2014-11-11 Texas Instruments Incorporated Process of making a stacked semiconductor package having a clip
US9048298B1 (en) 2012-03-29 2015-06-02 Amkor Technology, Inc. Backside warpage control structure and fabrication method
US9129943B1 (en) 2012-03-29 2015-09-08 Amkor Technology, Inc. Embedded component package and fabrication method
EP2677540A1 (en) * 2012-06-19 2013-12-25 Nxp B.V. Electronic device and method of manufacturing the same
JP5653974B2 (ja) * 2012-08-01 2015-01-14 ローム株式会社 パッケージ型二端子半導体装置
CN106449539B (zh) * 2013-02-01 2019-08-02 苏州固锝电子股份有限公司 防偏位贴片式半导体器件结构
US11469205B2 (en) 2013-03-09 2022-10-11 Adventive International Ltd. Universal surface-mount semiconductor package
US9620439B2 (en) 2013-03-09 2017-04-11 Adventive Ipbank Low-profile footed power package
KR101486790B1 (ko) 2013-05-02 2015-01-28 앰코 테크놀로지 코리아 주식회사 강성보강부를 갖는 마이크로 리드프레임
KR101563911B1 (ko) 2013-10-24 2015-10-28 앰코 테크놀로지 코리아 주식회사 반도체 패키지
JP2015142072A (ja) * 2014-01-30 2015-08-03 株式会社東芝 半導体装置
US9673122B2 (en) 2014-05-02 2017-06-06 Amkor Technology, Inc. Micro lead frame structure having reinforcing portions and method
JP6387318B2 (ja) * 2015-03-27 2018-09-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6512473B2 (ja) * 2015-03-31 2019-05-15 新電元工業株式会社 半導体装置の製造方法及び半導体装置の製造装置
WO2016179111A1 (en) * 2015-05-04 2016-11-10 Adventive Technology, Ltd. Low-profile footed power package
US10163762B2 (en) * 2015-06-10 2018-12-25 Vishay General Semiconductor Llc Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
CN105590907A (zh) * 2016-03-01 2016-05-18 江苏捷捷微电子股份有限公司 一种汽车用二极管器件及其制造方法
DE102017209780A1 (de) 2016-06-17 2017-12-21 Infineon Technologies Ag Durch flussfreies Löten hergestelltes Halbleiterbauelement
JP2018056356A (ja) * 2016-09-29 2018-04-05 株式会社東芝 半導体装置
US10189706B2 (en) * 2016-11-08 2019-01-29 Dunan Microstaq, Inc. Method for self-aligning solder-attached MEMS die to a mounting surface
CN110476235B (zh) * 2017-03-27 2024-02-23 三菱电机株式会社 半导体装置、电力变换装置
US11688714B2 (en) * 2017-09-05 2023-06-27 Shindengen Electric Manufacturing Co., Ltd. Semiconductor package with three leads
JP7281267B2 (ja) * 2017-11-06 2023-05-25 ローム株式会社 半導体装置、半導体装置の製造方法
JP7043225B2 (ja) 2017-11-08 2022-03-29 株式会社東芝 半導体装置
US10204844B1 (en) 2017-11-16 2019-02-12 Semiconductor Components Industries, Llc Clip for semiconductor package
JP6437701B1 (ja) * 2018-05-29 2018-12-12 新電元工業株式会社 半導体モジュール
JP7175643B2 (ja) * 2018-06-22 2022-11-21 新電元工業株式会社 半導体装置、及び、半導体装置の製造方法
DE102018130147A1 (de) 2018-11-28 2020-05-28 Infineon Technologies Ag Halbleitervorrichtung und verfahren zum herstellen einer halbleitervorrichtung
DE102019206824A1 (de) * 2019-05-10 2020-11-12 Robert Bosch Gmbh Kontaktanordnung und Leistungsmodul
JP7271381B2 (ja) * 2019-09-20 2023-05-11 株式会社東芝 半導体装置
JP7347329B2 (ja) * 2020-05-27 2023-09-20 株式会社デンソー 半導体装置およびその製造方法
JP2022144247A (ja) * 2021-03-18 2022-10-03 株式会社デンソー 半導体モジュール、および、これを用いた電子装置
US20220352055A1 (en) * 2021-04-30 2022-11-03 Texas Instruments Incorporated Heat-dissipating wirebonded members on package surfaces
US11908826B2 (en) 2022-04-12 2024-02-20 Semiconductor Components Industries, Llc Flexible clip with aligner structure

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3290564A (en) * 1963-02-26 1966-12-06 Texas Instruments Inc Semiconductor device
US3374533A (en) * 1965-05-26 1968-03-26 Sprague Electric Co Semiconductor mounting and assembly method
DE1614364C3 (de) * 1966-06-01 1979-04-05 Rca Corp., New York, N.Y. (V.St.A.) Verfahren zur Montage eines Halbleiter-Kristallelementes
US3365620A (en) * 1966-06-13 1968-01-23 Ibm Circuit package with improved modular assembly and cooling apparatus
US3500136A (en) * 1968-01-24 1970-03-10 Int Rectifier Corp Contact structure for small area contact devices
US3569797A (en) * 1969-03-12 1971-03-09 Bendix Corp Semiconductor device with preassembled mounting
US3763403A (en) * 1972-03-01 1973-10-02 Gen Electric Isolated heat-sink semiconductor device
US3869787A (en) * 1973-01-02 1975-03-11 Honeywell Inf Systems Method for precisely aligning circuit devices coarsely positioned on a substrate
US3997963A (en) * 1973-06-29 1976-12-21 Ibm Corporation Novel beam-lead integrated circuit structure and method for making the same including automatic registration of beam-leads with corresponding dielectric substrate leads
US4012765A (en) * 1975-09-24 1977-03-15 Motorola, Inc. Lead frame for plastic encapsulated semiconductor assemblies
US4117508A (en) * 1977-03-21 1978-09-26 General Electric Company Pressurizable semiconductor pellet assembly
US4158745A (en) * 1977-10-27 1979-06-19 Amp Incorporated Lead frame having integral terminal tabs
US4346396A (en) * 1979-03-12 1982-08-24 Western Electric Co., Inc. Electronic device assembly and methods of making same
US4252864A (en) * 1979-11-05 1981-02-24 Amp Incorporated Lead frame having integral terminal tabs
DE3528427A1 (de) * 1985-08-08 1987-04-02 Bbc Brown Boveri & Cie Elektrische verbindungslasche fuer halbleiterbauelemente
US4766479A (en) * 1986-10-14 1988-08-23 Hughes Aircraft Company Low resistance electrical interconnection for synchronous rectifiers
JPS6373946U (zh) * 1986-10-31 1988-05-17
JPH0438524Y2 (zh) * 1986-12-19 1992-09-09
US4800419A (en) * 1987-01-28 1989-01-24 Lsi Logic Corporation Support assembly for integrated circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1518099B (zh) * 2003-01-16 2010-05-05 松下电器产业株式会社 引线框架及其制造方法和使用引线框架的半导体器件

Also Published As

Publication number Publication date
DE68928428T2 (de) 1998-07-16
JPH02121356A (ja) 1990-05-09
CN1041065A (zh) 1990-04-04
MY105130A (en) 1994-08-30
KR900005586A (ko) 1990-04-14
US4935803A (en) 1990-06-19
JP2658423B2 (ja) 1997-09-30
DE68928428D1 (de) 1997-12-11
EP0362547A1 (en) 1990-04-11
EP0362547B1 (en) 1997-11-05

Similar Documents

Publication Publication Date Title
CN1015585B (zh) 半导体器件的自对准电极
KR0139540B1 (ko) 반도체 디바이스 및 그 제작방법
US4994412A (en) Self-centering electrode for power devices
EP1439587B1 (en) Mounting of an LED assembly with self-alignment
CN100589243C (zh) 半导体器件
US6995469B2 (en) Semiconductor apparatus and fabricating method for the same
CN2838038Y (zh) 半导体封装物
CN101636830A (zh) 半导体装置及其制造方法
CN100423248C (zh) 半导体装置及其安装体
JP4106039B2 (ja) ワイヤボンディング方法
US6278180B1 (en) Ball-grid-array-type semiconductor device and its fabrication method and electronic device
US11984417B2 (en) Semiconductor structure and manufacturing method thereof
US5110761A (en) Formed top contact for non-flat semiconductor devices
US4067041A (en) Semiconductor device package and method of making same
CN104282637A (zh) 倒装芯片半导体封装结构
US3584265A (en) Semiconductor having soft soldered connections thereto
CN101044619A (zh) 具有电接触的衬底及其制造方法
JP7107199B2 (ja) 半導体装置
CN116613128A (zh) 具有柔性互连件的半导体裸片组合件以及相关联方法和系统
CN2849967Y (zh) 凸块接合结构
EP2800130A1 (en) Chip-to-substrate transient liquid phase bonding using a spacer
CN115565976B (zh) 半导体结构及半导体结构的制作方法
CN115565977B (zh) 半导体结构及半导体结构的制作方法
US20230317672A1 (en) Semiconductor device
JP7404726B2 (ja) 半導体装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C13 Decision
GR02 Examined patent application
C14 Grant of patent or utility model
GR01 Patent grant
C53 Correction of patent of invention or patent application
COR Change of bibliographic data

Free format text: CORRECT: PATENTEE; FROM: MOTOROLA INC. TO: MOTOROLA, INC.

CP01 Change in the name or title of a patent holder

Patentee after: Motorola Inc.

Patentee before: Motorola. Inc

C53 Correction of patent of invention or patent application
COR Change of bibliographic data

Free format text: CORRECT: PATENTEE; FROM: MOTOROLA, INC. TO: SEMICONDUCTOR COMPONENT INDUSTRY CO., LTD

CP03 Change of name, title or address

Address after: Arizona USA

Patentee after: Semiconductor Components Industry, LLC

Address before: Illinois Instrunment

Patentee before: Motorola Inc.

C15 Extension of patent right duration from 15 to 20 years for appl. with date before 31.12.1992 and still valid on 11.12.2001 (patent law change 1993)
OR01 Other related matters
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee