CN101044619A - 具有电接触的衬底及其制造方法 - Google Patents
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Abstract
公开了一种具有第一金属接触焊盘(13a、…、13d)的衬底(10),将所述第一接触焊盘(13a、…、13d)和第二衬底(20)的第二接触焊盘(23a、…、23d)焊接在一起。根据本发明,所述第一接触焊盘(13a、…、13d)相对于所述第一表面的最大平面延伸(Din)不超过20μm。因此,当将第一衬底(10)和第二衬底(20)焊接到一起时,可以实现0或几乎为0的远离Xin。例如,该方法可应用于倒装芯片技术,其中优选地,将简称为UBM的“凸块下方金属化”和简称为ISB的“浸没焊料凸块”用于制造所述衬底(10)。
Description
技术领域
本发明涉及一种具有第一表面的衬底,所述第一表面包括通过其间的绝缘区来分离的第一金属接触焊盘,将所述第一接触焊盘和第二衬底的第二表面上的第二接触焊盘焊接在一起,其中所述衬底上的所述第一接触焊盘和第二衬底上相应的第二接触焊盘彼此面对。
此外,本发明涉及一种包括衬底和第二衬底的电子器件,所述衬底具有包括第一金属接触焊盘的第一表面,所述第二衬底具有包括第二金属接触焊盘的第二表面,其中将第一接触焊盘和第二接触焊盘焊接到一起,并且第一衬底上的第一接触焊盘和第二衬底上相应的第二接触焊盘彼此面对。
最后,本发明涉及一种制造该衬底的方法。
背景技术
所述衬底广泛地用于现有的技术水平。例如,管芯承载和电子电路还包括接触焊盘,采用公知的“倒装芯片技术”将管芯与“支撑”衬底相连。
术语“倒装芯片”指可以按照“面朝下”方式直接安装到衬底、板、或载体上的电子部件或半导体器件。通过在芯片表面上建立的导电凸块实现电连接,这就是为什么该安装工艺本质上是“面朝下”。在安装期间,利用精确定位于它们的目标位置上的凸块,将芯片倒装到衬底、板或载体上,(因此得名“倒装芯片”)。因为倒装芯片不要求引线键合,它们占据比它们的传统引线键合的对应物更少的空间。
倒装芯片与传统半导体封装结构上不同,因此要求与传统半导体装配不同的装配工艺。倒装芯片组件包括三个主要步骤:1)芯片的凸块形成;2)将形成有凸块的芯片朝下附加到衬底或板上;以及3)下方填充,就是采用不导电的机械保护材料填充芯片和衬底或板之间的空隙的工艺。在凸块形成、附加和下方填充步骤中使用许多不同的材料和技术,从而倒装芯片存在许多组变量。
用于倒装芯片凸块形成的许多公知工艺之一包括:通过溅射、镀覆、印刷或类似的工艺将所谓的“凸块下方金属化”(简称为UBM)用于键合焊盘上。当然,其组合也是可能的。优选地,UBM包括具有良好焊接润湿性的无电镀(electroless)NiAu,但是其他材料组合也是可用的。用于相当高温度的一种替代物是无电镀的NiPdAu。UBM工艺去除了键合焊盘上的钝化氧化物层,并且限定了焊料润湿区。然后,可以通过合适的方法将焊料沉积到UBM上,例如蒸发、电镀、丝网印刷或配制(dispensing)。
针对低成本的晶片凸块形成,已经实现了焊料膏的丝网印刷,并且倒装芯片焊接对此很感兴趣。除了成本效率,可以获得包括无铅合金的不同焊料膏。然而,由于可用的焊料膏和丝网几何图形,目前该工艺的间距对于大量生产最低限于200μm,对于测试限于150μm。
另外的一种方法是所谓的“浸没焊料凸块形成”(简称为ISB),可以用作低成本替代的电镀。可以将ISB用于焊盘,通常具有100μm的尺寸,最低40μm的非常精细的间距。利用ISB,将晶片浸没到液体焊料中,使UBS变湿,并且在UBM的顶部上形成较小的焊料帽。该焊料帽的高度强烈地依赖于焊盘尺寸。液体焊料表面上的有机液体防止焊料的氧化,并且提高润湿性。在焊接之后,可以容易地去除残留物。工艺本身没有关于晶片尺寸的限制。甚至可以处理单独的管芯。还修改该工艺以适合无铅焊料的要求。不同的焊接材料是可用的,例如PbSn63、SnBi42、SnAg3.5、SnCu0.7。
焊料凸块形成的整个工艺通常在芯片级别执行。随后将已形成焊料凸块的晶片锯成单独的倒装芯片,通过使组件受到足够高以熔化焊料的温度来将所述倒装芯片晶片安装到板或衬底上,从而形成互连。为此目的,使用热电极键合机,即拾取和放置工具。热电极键合机的放置头可以用于向倒装芯片器件提供能量,为了提供足够的热能以完成回流工艺。低熔点软焊料的浸没焊料凸块形成与快速热电极键合的结合,可以替代智能标签粘结技术。
最后,对倒装芯片器件进行下方填充。这通常通过沿倒装芯片边缘的针分配(needle dispensation)来实现。然后,毛细作用将分配的下方填充物向内吸引,直到填充了间隙为止。然后执行热固化以形成持久的键合。
已经注意到,这里使用的术语“衬底”不但涵盖在倒装芯片技术中具有的意思,而且涵盖包括电子电路的管芯。芯片产品的“衬底”和“管芯”之间的区别不适用于本发明。每当需要术语“衬底”为其芯片相关意思时,代替地使用术语“支撑衬底”。此外,应该考虑的是,当使用相应的工艺时,通常称作“凸块下方金属化”的工艺因为上位语言的原因在这里称作“金属接触焊盘”。因为本发明不局限于倒装芯片技术也不局限于UBM工艺或ISB工艺,所以使用该上位语言。
图1a示出了现有技术的衬底40的剖面图,图1b示出了相应的顶视图。衬底40可以是较大的电子电路的一部分,因此图1a和图1b仅示出了该电子电路的截取部分,所述电子电路通常包括大量这些部分。
所述衬底40包括第一表面上的第一金属键合焊盘41。在衬底40上设置了第一绝缘层42,所述第一绝缘层42也覆盖了第一金属键合焊盘41的边界区,因此形成第一键合焊盘41的上部侧面上的柱形凹槽。在第一金属键合焊盘41上设置了第一接触焊盘43,所述第一接触焊盘43本身从所述第一绝缘层42突出。由于柱形凹槽的原因,第一接触焊盘43具有凸起的边缘。最后,将焊料凸块44设置在第一接触焊盘43上。焊料凸块44的高度Hpr取决于第一接触焊盘43的直径Dpr,并且典型地为所述直径Dpr的0.3倍。如图1a和图1b所示的配置通常是半成品。针对该示例,假设所述配置是包括电子电路的管芯的一部分。
为了完成电子器件60,将该管芯倒装芯片安装到支撑衬底上。该现有技术支撑衬底的一部分如图2所示。图2示出了其中将图1a的一部分和相同的镜像反转部分焊接到一起的配置。所述镜像部分包括在第二表面上具有第二金属键合焊盘51的第二衬底50。在第二衬底50下面设置了第二绝缘层52,所述第二绝缘层52还覆盖了第二金属键合焊盘51的边界区域,因此,在第二键合焊盘51的下部侧面上形成柱形凹槽。在第二金属键合焊盘51以下设置了第二接触焊盘53,所述第二接触焊盘53本身从所述第二绝缘层52突出。由于柱形凹槽的原因,第二接触焊盘53具有凸起的边缘。因为在第一接触焊盘43上已经存在焊料,省略了分离的焊料凸块44。当将两个部分焊接到一起时,通过焊料的表面张力将第一和第二接触焊盘43和53吸到一起。图2示出了两个部分的连接导致所谓的远离(stand off)Xpr,即接触焊盘43和53之间的距离。远离Xpr还取决于第一接触焊盘43的直径Dpr,并且典型地为所述直径Dpr的0.15倍。在该实例中,针对第一和第二接触焊盘43和53假设相同的直径。不同直径当然将导致不同的结果。
在具有使电子器件的尺寸最小化的一般趋势的线路中,还努力使所述远离Xpr最小化。但是,因为接触焊盘必须具有确定的尺寸,所以该远离也具有确定的尺寸。
发明内容
本发明的目的在于找到一种解决方案,提供0或接近0的远离。
该目的通过前述种类的衬底来实现,其中所述第一接触焊盘相对于所述第一表面的最大平面延伸不超过20μm。已经令人意外地发现,不但当第一接触焊盘具有0尺寸(这当然没什么意义)时,而且当它们不超过确定的尺寸(即,20μm)时,0远离或接近0远离是可实现的。图5的曲线示出了所述效果。根据前述研究,该图显示焊料凸块的高度Hpr(虚线)和远离Xpr作为焊盘直径D的函数。可以容易地看出,焊料凸块高度Hpr强烈地依赖于焊盘直径D,并且是焊盘直径D的约0.3倍。前述研究预见了远离Xpr也有类似的(线性)效果。远离Xpr是焊盘直径D的0.15倍(虚线)。但是,近来的研究示出了当第一接触焊盘不超过20μm时(实线),令人惊讶地可实现0远离或接近0远离Xin。针对20μm以下的较小焊盘直径,将通过ISB工艺拾取的焊料设置在组合的接触焊盘的外围周围,从而对于远离的增加没有贡献。
有利地,可以将这些结果用于制造非常小的电子器件。具体地,这对于所谓的射频识别标签(简称为RFID)是有趣的,当前大量地需求射频识别标签。依靠本发明,可以使用相当容易并且因此便宜的生产工艺UBM和ISB,建立具有非常低的装配高度的这些标签。
应该注意的是,“0远离”的具体值不但依赖于接触焊盘的尺寸,而且依赖于它们的表面。因此,精细组织的表面导致比粗糙表面更小的值。另外,可以用较小的、或不用任何力量效果来执行焊接工艺,所述力量效果也影响所述值。
因为该发明术语中的“远离”表示接触之间的距离,在UBM的情况下存在第一和第二衬底之间的一些距离,UBM通常从所述衬底的表面突出。因此,衬底之间的距离受到UBM层厚度的影响,并且不小于连接构件的UBM层厚度的总和,实际上在微米的量级。因此,通过本发明的衬底实现的电子器件通常根据公知技术进行下方填充。
如果相对于所述第一表面,所述第一接触焊盘的最小平面延伸不低于5μm是有利的。已经发现接触焊盘应该具有确定的尺寸,至少使得它们易于制造。所述范围介于5μm至20μm之间,具体地针对UBM和ISB工艺这是有利的。例如,已经在具有最小到7μm直径的焊盘上执行了无电镀的NiAu,这当然不理解成“物理”下限。在不远的将来可以生产更小的NiAu接触焊盘。然而,这些小尺度在用于这些工艺的电解液带来新的要求。因此,焊盘直径的“实际的”较低值考虑是5μm。
另外,当第一接触焊盘具有凸起边缘时是有利的。当将焊料放到接触焊盘上时,在焊料与接触焊盘的金属接触的地方形成金属间化合物。因为将所包含的部分“吸到一起”(“sucking together”)的倾向不及所必需的那样强,这些金属间化合物妨碍了0远离。在凸起边缘的情况下,所述金属间化合物主要在中心形成,即接触焊盘的凹槽。因此,它们实质上不会妨碍两个接触焊盘的紧密接近。接触焊盘,具体地具有从第一和第二衬底的表面突出的凸起边缘的接触焊盘导致附加的优势,这在0远离的情况下尤为如此。在这种情况下,代替整个表面的接触,仅存在点接触,这明显地有助于实现接触焊盘的0远离。
根据本发明的另一个优选解决方案是衬底,其中将金属键合焊盘设置在第一接触焊盘和所述第一表面之间,金属键合焊盘在边界区域中部分地被绝缘层覆盖,并且所述第一接触焊盘从所述绝缘层突出。例如,该结构是UBM工艺的结果,相对易于处理。因此,制造前述衬底所需的技术和经济努力相当低。这里应该提到的是,本发明不局限于UBM。
有利地,因为然后第一衬底准备焊接到还包括第二金属接触焊盘的第二衬底上,所以衬底包括第一接触焊盘上的焊料凸块。优选地,使用ISB工艺制造焊料凸块,但是不局限于此。前述ISB的替代物是波动焊接,可以用于本发明相关工艺。另外可应用的技术是丝网印刷和镀覆,与ISB相比这两者都相对昂贵。这里还应该注意的是,焊接并不依赖于使用凸块下方金属化。还可以用任意接触焊盘完成该焊接。
此外,有利地,焊料凸块由低熔点焊料组成。因此,衬底可以由诸如纸或塑料之类的温度敏感材料组成。迄今为止的现有技术公开了在100℃以下熔化的焊料。关于这种物质,参考日期为2004年5月25日的US 6,740,544“Solder compositions for attaching a die to asubstrate”,具体地在表1的第6列。此外,该文件公开了通过所谓的“焊料剂”(solder agent)来提高焊料的熔点的可能性。通过引用将所述文件结合在本文中。当器件操作于较高的环境温度条件时,前述方法尤为有利。
另外,如果更接近的第一金属接触焊盘形成电接触是有利的。优选地,具有5μm和20μm之间的尺寸的一个单独的接触焊盘仅能够驱动确定的电流。如果根据电子电路的确定设计必需的电流超过了所述限制,可能形成包括多个更接近的第一金属接触焊盘的电接触。由此,电接触可以驱动任意想要的电流而无需增加远离。应该提到的是,这里接触焊盘不必彼此邻近。还可以想像的是,它们之间存在另一个电接触的金属接触焊盘。
此外,本发明的目的通过包括衬底和第二衬底的电子器件来实现,所述衬底具有包括第一金属接触焊盘的第一表面,所述第二衬底具有包括第二金属接触焊盘的第二表面,其中将第一接触焊盘和第二接触焊盘焊接到一起,第一衬底上的第一接触焊盘和第二衬底上相应的第二接触焊盘彼此面对,并且所述第一和第二接触焊盘相对于所述第一和第二表面的最大平面延伸不超过20μm。
本发明的目的还通过利用凸块下方金属化工艺(简称为UBM),制造具有包括第一金属接触焊盘的第一表面的衬底的方法来实现,其中所述第一接触焊盘相对于所述第一表面的最大平面延伸不超过20μm。
这里应该注意的是,当讨论本发明的衬底时引用的优点和各种实施例,对于本发明的器件和本发明的方法也是有效的。因此,省略了针对本发明器件和本发明方法实施例和它们的优势的具体引用。
附图说明
参考这里其中描述的实施例,本发明的这些和其他方面将显而易见,并且对其进行描述。现在将仅作为示例并且参考附图描述本发明的实施例,其中:
图1a是现有技术衬底的剖面图;
图1b是图1a的衬底的顶视图;
图2是现有技术电子器件的剖面图;
图3a是本发明衬底的剖面图;
图3b是图3a的衬底的顶视图;
图4是本发明电子器件的剖面图;
图5示出了焊盘直径和凸块高度之间以及焊盘直径和远离之间的关系;
图6示出了五边形形式的接触焊盘。
具体实施方式
图3a示出了本发明衬底10的剖面图,图3b示出了相应的顶视图。衬底10可以是较大的电子电路的一部分,因此图1a和图1b仅示出了该电子设备的截取部分,所述电子电路通常包括大量这些部分。
所述衬底10包括第一表面上的第一金属键合焊盘11(例如由Cu、Ni、Co、Nb等构成)。在衬底10上设置了第一绝缘层12,还覆盖了第一金属键合焊盘11的边界区域。绝缘层12在第一键合焊盘11的上部侧面上形成了四个柱形凹槽。在第一金属键合焊盘11和凹槽中设置了四个第一接触焊盘13a、...、13d,从所述第一绝缘层12突出。由于柱形凹槽的原因,第一接触焊盘13a、...、13d具有凸起的边缘。最后,将焊料凸块14a、...、14d设置在第一接触焊盘13a、...、13d上。焊料凸块14a、...、14d的高度Hin取决于第一接触焊盘13a、...、13d的直径Din,并且是所述直径Din的约0.3倍。如图1a和图1b所示的配置通常是半成品。针对该示例,假设所述配置是包括电子电路的管芯的一部分。
为了完成电子器件30,将该管芯倒装芯片安装到支撑衬底上。一部分该支撑衬底如图4所示。图4示出了其中将图3a的部分和相同的镜像反转部分焊接到一起的配置。所述镜像部分包括第二表面上具有第二金属键合焊盘21的第二衬底20。在第二衬底20下面设置了第二绝缘层22,所述第二绝缘层22还覆盖了第二金属键合焊盘21的边界区域。再次在第二键合焊盘21的下部侧面中形成柱形凹槽。在第二金属键合焊盘21和凹槽中设置了第二接触焊盘23a、...、23d(由于剖面视图的原因没有示出23c和23d),所述第二接触焊盘23a、...、23d从所述第二绝缘层22突出。由于柱形凹槽的原因,第二接触焊盘23a、...、23d具有凸起的边缘。省略了分离的焊料凸块24a、...、24d,因为已经将它们焊接到第一接触焊盘13a、...、13d上。当将两个部分都焊接到一起时,通过焊料凸块14a、...、14d的表面张力将第一和第二接触焊盘13a、...、13d和23a、...、23d吸到一起。图4示出了这两个部分的连接导致远离Xin,即接触焊盘13a、...、13d和23a、...、23d之间的距离。与远离Xin强烈线性地依赖于焊盘直径Din的之前观点相反,图4(和图5)显示远离Xin令人惊奇地为0或几乎为0,尽管接触焊盘13a、...、13d和23a、...、23d之间的直径大于0。
焊料凸块14a、...、14d;44的高度不但取决于接触焊盘13a、...、13d;14a、...、14d;43;44的焊盘直径Din,而且取决于其形状。因此,图6示出了第一接触焊盘73的示例,所述第一接触焊盘73是多边形形状的,具体地是五边形。这里应该注意的是,第一接触焊盘73仅用作示例。因此,针对第一接触焊盘73,可以想像多种形式,例如三角形、矩形(尤其是方形)、六边形和八边形。此外,例如椭圆形、卵形或腰形也是可能的。现在图6示出了具有最大平面延伸Din和最小平面延伸din的这种第一接触焊盘73,优选地在20μm至5μm的范围内。
应该注意的是,多个第一接触焊盘13a、...、13d形成单独的电接触并不是强制的。事实上,本发明还可应用于一个单独的第一接触焊盘13a、...、13d形成电接触的情况。此外,通过UBM工艺制造或象UBM这样的工艺来制作第一接触焊盘13a、...、13d并不是强制的。第一接触焊盘13a、...、13d可以是第一衬底10的第一表面上的平面物体,或者嵌入其中。
还应该注意到上述实施例所示不是限制本发明,本领域的普通技术人员在不脱离所附权利要求所限的本发明范围的情况下,将能够设计许多替代实施例。在权利要求中,不应该将括号中放置的任意参考符号解释为限制权利要求。术语“包括”不排除在任何权利要求或说明书中整体所列元件或步骤以外的元件或步骤的存在。单数的元件不排除多个该元件,反之亦然。在列举了几种手段的设备权利要求中,可以将这些装置的几个由一个或相同项目的硬件来具体实现。唯一的事实在于在多个彼此不同的从属权利要求引用的某些措施不表示不能有利地使用这些措施的组合。
Claims (13)
1.一种具有第一表面的衬底(10),所述第一表面包括通过其间的绝缘区来分离的第一金属接触焊盘(13a、…、13d),将所述第一接触焊盘(13a、…、13d)和第二衬底(20)的第二表面上的第二接触焊盘(23a、…、23d)焊接在一起,其中所述衬底(10)上的所述第一接触焊盘(13a、…、13d)和第二衬底(20)上相应的第二接触焊盘(23a、…、23d)然后彼此面对,并且所述第一接触焊盘(13a、…、13d)相对于所述第一表面的最大平面延伸(Din)不超过20μm。
2.根据权利要求1所述的衬底(10),其中,所述第一接触焊盘(13a、…、13d)相对于所述第一表面的最小平面延伸(din)不低于5μm。
3.根据权利要求1所述的衬底(10),其中,所述第一接触焊盘(13a、…、13d)具有凸起边缘。
4.根据权利要求1所述的衬底(10),其中,将金属键合焊盘(11)设置在第一接触焊盘(13a、…、13d)和所述第一表面之间,金属键合焊盘(11)由边界区域中的绝缘层(12)部分地覆盖,并且所述第一接触焊盘(13a、…、13d)从所述绝缘层(12)突出。
5.根据权利要求1所述的衬底(10),包括第一接触焊盘(13a、…、13d)上的焊料凸块(14a、…、14d)。
6.根据权利要求1所述的衬底(10),其中,焊料凸块(14a、…、14d)由低熔点焊料组成。
7.根据权利要求1至6任一项所述的衬底(10),其中,多个更接近的第一金属接触焊盘(13a、…、13d)形成电接触。
8.一种包括衬底(10)和第二衬底(20)的电子器件(30),所述衬底(10)具有包括第一金属接触焊盘(13a、…、13d)的第一表面,所述第二衬底(20)具有包括第二金属接触焊盘(23a、…、23d)的第二表面,其中将第一接触焊盘(13a、…、13d)和第二接触焊盘(23a、…、23d)焊接到一起,第一衬底(10)上的第一接触焊盘(13a、…、13d)和第二衬底(20)上相应的第二接触焊盘(23a、…、23d)彼此面对,并且所述第一和第二接触焊盘(13a、…、13d,23a、…、23d)相对于所述第一和第二表面的最大平面延伸(Din)不超过20μm。
9.一种制造具有包括第一金属接触焊盘(13a、…、13d)的第一表面的衬底(10)的方法,通过简称为UBM的凸块下方金属化工艺来实现,其中,所述第一接触焊盘(13a、…、13d)相对于所述第一表面的最大平面延伸(Din)不超过20μm。
10.根据权利要求9所述的方法,其中,所述第一接触焊盘(13a、…、13d)相对于所述第一表面的最小平面延伸(din)不低于5μm。
11.根据权利要求9所述的方法,其中,使用简称为ISB的浸没焊料凸块形成工艺来制造所述第一接触焊盘(13a、…、13d)上的焊料凸块(14a、…、14d)。
12.根据权利要求9所述的方法,其中,将低熔点焊料用于制造焊料凸块(14a、…、14d)。
13.根据权利要求9至12任一项所述的方法,其中,多个更接近的第一金属接触焊盘(13a、…、13d)形成电接触。
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Cited By (5)
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CN101754579B (zh) * | 2009-11-16 | 2012-02-22 | 华为终端有限公司 | 城堡式模块及终端设备 |
CN103474420A (zh) * | 2012-06-05 | 2013-12-25 | 台湾积体电路制造股份有限公司 | 三维集成电路结构和用于半导体晶圆的混合接合方法 |
CN103531562A (zh) * | 2012-07-04 | 2014-01-22 | 颀邦科技股份有限公司 | 半导体封装结构及其导线架 |
CN104681530A (zh) * | 2013-11-26 | 2015-06-03 | 日月光半导体制造股份有限公司 | 半导体结构及其制造方法 |
CN106252247A (zh) * | 2016-09-05 | 2016-12-21 | 江苏纳沛斯半导体有限公司 | 半导体结构及其形成方法 |
Families Citing this family (1)
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US20090310320A1 (en) * | 2008-06-16 | 2009-12-17 | Weston Roth | Low profile solder grid array technology for printed circuit board surface mount components |
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GB0001918D0 (en) * | 2000-01-27 | 2000-03-22 | Marconi Caswell Ltd | Flip-chip bonding arrangement |
US6596618B1 (en) * | 2000-12-08 | 2003-07-22 | Altera Corporation | Increased solder-bump height for improved flip-chip bonding and reliability |
US20020093106A1 (en) * | 2001-01-17 | 2002-07-18 | Ashok Krishnamoorthy | Bonding pad for flip-chip fabrication |
US6862378B2 (en) * | 2002-10-24 | 2005-03-01 | Triquint Technology Holding Co. | Silicon-based high speed optical wiring board |
-
2005
- 2005-10-18 EP EP05794401A patent/EP1805799A1/en not_active Withdrawn
- 2005-10-18 JP JP2007537448A patent/JP2008517475A/ja not_active Withdrawn
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101754579B (zh) * | 2009-11-16 | 2012-02-22 | 华为终端有限公司 | 城堡式模块及终端设备 |
CN103474420A (zh) * | 2012-06-05 | 2013-12-25 | 台湾积体电路制造股份有限公司 | 三维集成电路结构和用于半导体晶圆的混合接合方法 |
CN103474420B (zh) * | 2012-06-05 | 2016-06-22 | 台湾积体电路制造股份有限公司 | 三维集成电路结构和用于半导体晶圆的混合接合方法 |
CN103531562A (zh) * | 2012-07-04 | 2014-01-22 | 颀邦科技股份有限公司 | 半导体封装结构及其导线架 |
CN103531562B (zh) * | 2012-07-04 | 2016-07-06 | 颀邦科技股份有限公司 | 半导体封装结构及其导线架 |
CN104681530A (zh) * | 2013-11-26 | 2015-06-03 | 日月光半导体制造股份有限公司 | 半导体结构及其制造方法 |
CN104681530B (zh) * | 2013-11-26 | 2017-09-26 | 日月光半导体制造股份有限公司 | 半导体结构及其制造方法 |
CN106252247A (zh) * | 2016-09-05 | 2016-12-21 | 江苏纳沛斯半导体有限公司 | 半导体结构及其形成方法 |
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WO2006043235A1 (en) | 2006-04-27 |
JP2008517475A (ja) | 2008-05-22 |
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